| PART |
Description |
Maker |
| HCS109HMSR HCS109KMSR FN2466 HCS109MS HCS109D HCS1 |
Radiation Hardened Dual JK Flip Flop HC/UH SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP16
Radiation Hardened Dual JK Flip Flop(抗辐射双J-K触发 辐射加固JK触发器拖鞋（抗辐射双JK触发器）
From old datasheet system
Flip Flop, JK, Dual, Rad-Hard, High-Speed, CMOS, Logic
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| HCTS74KTR HCTS74T HCTS74DTR |
DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATORS 20-LCCC -55 to 125
Radiation Hardened Dual-D Flip-Flop with
Set and Reset(抗辐射双D触发器（带置位、复位）)
Radiation Hardened Dual-D Flip-Flop with Set and Reset
HCT SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, CDIP14
|
Intersil Corporation
|
| MC10H131FNG MC10H131FN MC10H13106 MC10H135FNG MC10 |
Dual D Type Master?Slave Flip?Flop
Dual D Type Master−Slave Flip−Flop
Dual J?K Master?Slave Flip?Flop
Universal Hexadecimal Counter
Four?Bit Universal Shift Register
Quad 2?Input Multiplexer (Non?Inverting)
12?Bit Parity Generator?Checker
Binary to 1?8 Decoder (Low)
Binary to 1?8 Decoder (High)
8?Line Multiplexer
8?Input Priority Encoder
5?Bit Magnitude Comparator
Dual Binary to 1?4?Decoder (High)
|
ONSEMI[ON Semiconductor]
|
| 74AUP2G80GN 74AUP2G80GD |
Low-power dual D-type flip-flop; positive-edge trigger AUP/ULP/V SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, INVERTED OUTPUT, PDSO8
Low-power dual D-type flip-flop; positive-edge trigger 低功耗双D型触发器;上升沿触
|
NXP Semiconductors N.V.
|
| HD74LS107A HD74LS107AFP HD74LS107AP HD74LS107ARP |
Dual J-K Flip-Flops with Clear
Dual J-K Negative-edge-triggered Flip-Flops(with Clear)
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|SOP|14PIN|PLASTIC
FLIP-FLOP|DUAL|J/K TYPE|LS-TTL|DIP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| HD74HC73 HD74HC73FP HD74HC73P |
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|DIP|14PIN|PLASTIC
Dual J-K Flip-Flops (with Clear)
FLIP-FLOP|DUAL|J/K TYPE|HC-CMOS|SOP|14PIN|PLASTIC
|
HITACHI[Hitachi Semiconductor]
|
| DM74ALS109A DM74ALS109AN DM74ALS109AM DM74ALS109AM |
From old datasheet system
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDSO16
ALS SERIES, DUAL POSITIVE EDGE TRIGGERED J-KBAR FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16
Dual J-K Positive-Edge-Triggered Flip-Flop with Preset and Clear(???杈圭?瑙????-K瑙?????甯??缃??娓??绔?伎
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor Corporation
|
| HCTS109HMSR HCTS109KMSR HCTS109K HCTS109D HCTS109D |
Dual Positive-Edge-Triggered D-Type- Flip-Flops With Clear And Preset 14-CDIP -55 to 125 辐射加固双JK触发器拖
Radiation Hardened Dual JK Flip Flop
From old datasheet system
|
Intersil, Corp.
INTERSIL[Intersil Corporation]
|
| IW4027BD IW4027BN |
Dual JK flip-flop, high-voltage silicon-gate CMOS
|
INTEGRAL
|
| 74LCX74SJ 74LCX74MX_NL 74LCX74 74LCX74BQX 74LCX74M |
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs
Low Voltage Dual D-Type Positive Edge-Triggered Flip-Flop with 5V Tolerant Inputs LVC/LCX/Z SERIES, DUAL POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, QCC14
|
FAIRCHILD[Fairchild Semiconductor]
Fairchild Semiconductor, Corp.
|
