| PART |
Description |
Maker |
| ISPLSI2128VE ISPLSI2128VE-100LB100 ISPLSI2128VE-10 |
3.3V In-System Programmable SuperFAST?High Density PLD
CRYSTAL 32.768KHZ 12.5PF SMD
3.3V In-System Programmable SuperFAST?/a> High Density PLD
3.3V In-System Programmable SuperFAST⑩ High Density PLD
3.3V In-System Programmable SuperFAST High Density PLD
CRYSTAL 12.0 MHZ 20PF SMD
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PQFP176
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PBGA208
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 6 ns, PBGA208
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 10 ns, PBGA100
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PBGA100
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PQFP160
3.3V In-System Programmable SuperFASTHigh Density PLD EE PLD, 7.5 ns, PQFP100
3.3V In-System Programmable SuperFASTHigh Density PLD 3.3在系统可编程超快⑩高密度可编程逻辑器件
3.3VIn-SystemProgrammableSuperFASTHighDensityPLD
3.3V In-System Programmable SuperFAST?/a> High Density PLD
|
LATTICE[Lattice Semiconductor]
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| ISPLSI2032VL-135LT44I ISPLSI2096VL ISPLSI2096VL-10 |
2.5VIn-SystemProgrammableSuperFASTHighDensityPLD
2.5V In-System Programmable SuperFAST⑩ High Density PLD
2.5V In-System Programmable SuperFAST High Density PLD
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 8 ns, PQFP128
2.5V In-System Programmable SuperFASTHigh Density PLD EE PLD, 10 ns, PQFP44
|
LATTICE[Lattice Semiconductor]
LATTICE [Lattice Semiconductor]
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| 5384VA ISPLSI5384VA-70LB208 ISPLSI5384VA-70LB272 I |
In-System Programmable 3.3V SuperWIDEHigh Density PLD EE PLD, 13 ns, PBGA272
In-System Programmable 3.3V SuperWIDEHigh Density PLD EE PLD, 9.5 ns, PBGA208
In-System Programmable 3.3V SuperWIDEHigh Density PLD EE PLD, 9.5 ns, PBGA272
In-System Programmable 3.3V SuperWIDEHigh Density PLD EE PLD, 19 ns, PBGA388
In-System Programmable 3.3V SuperWIDE High Density PLD
|
Lattice Semiconductor, Corp.
Lattice Semiconductor Corporation
|
| 81080V ISPLSI81080V-60LB272 ISPLSI81080V-90LB492 I |
3.3V In-System Programmable SuperBIG High Density PLD
3.3V In-System Programmable SuperBIGHigh Density PLD EE PLD, 14.5 ns, PBGA492
3.3V In-System Programmable SuperBIGHigh Density PLD 3.3在系统可编程SuperBIG⑩高密度可编程逻辑器件
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| ISPLSI2032E ISPLSI2032E-110LJ44 ISPLSI2032E-110LT4 |
In-SystemProgrammableSuperFASTHighDensityPLD
In-System Programmable SuperFASTHigh Density PLD
In-System Programmable SuperFAST High Density PLD 在系统可编程超快高密度可编程逻辑器件
|
Lattice Semiconductor Corporation
Lattice Semiconductor, Corp.
|
| ISPLSI2192VE100LB144 ISPLSI2192VE100LB144I ISPLSI2 |
3.3V In-System Programmable SuperFAST?High Density PLD
3.3V In-System Programmable SuperFAST?/a> High Density PLD
3.3V In-System Programmable SuperFAST High Density PLD
3.3V In-System Programmable SuperFAST垄芒 High Density PLD
3.3V In-System Programmable SuperFAST⑩ High Density PLD
EE PLD, 13 ns, PQFP128
|
LATTICE SEMICONDUCTOR CORP
|
| STP80N03L-06 4881 |
N-Channel Enhancement Mode "Ultra High Density" Power MOS Transistor(Ｎ沟道增强模式高密度功率ＭＯＳ晶体管) N沟道增强模式“超高密度”功率MOS晶体管（不适用沟道增强模式高密度功率马鞍山晶体管）
N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR
N - CHANNEL ENHANCEMENT MODE ULTRA HIGH DENSITY POWER MOS TRANSISTOR
From old datasheet system
N - CHANNEL ENHANCEMENT MODE "ULTRA HIGH DENSITY" POWER MOS TRANSISTOR
|
STMicroelectronics N.V.
ST Microelectronics
STMICROELECTRONICS[STMicroelectronics]
SGS Thomson Microelectronics
|
| ISPLSI2064E-100LT100 ISPLSI2064E-135LT100 ISPLSI20 |
In-System Programmable SuperFAST High Density PLD
In-System Programmable SuperFASTHigh Density PLD
|
Lattice Semiconductor Corporation
|
| ISPLSI1032 ISPLSI1032-60LG_883 ISPLSI1032-80LJ ISP |
In-System Programmable High Density PLD EE PLD, 17 ns, PQCC84
High-Density Programmable Logic
|
Lattice Semiconductor, Corp.
LATTICE[Lattice Semiconductor]
Lattice Semiconductor Corporation
|
| IDT72V2103L10PF IDT72V2113L10PFI IDT72V2113L7-5BCI |
3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 128K X 18 OTHER FIFO, 10 ns, PQFP80
3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 128K X 18 OTHER FIFO, 6.5 ns, PQFP80
3.3 VOLT HIGH-DENSITY SUPERSYNC II NARROW BUS FIFO 3.3伏高密度SUPERSYNC二窄总线先进先出
Octal bus transceiver/register (3-State) - Description: Transceiver/Register (3-State) ; Fmax: 350 MHz; Logic switching levels: TTL ; Number of pins: 24 ; Output drive capability: -32/ 64 mA ; Propagation delay: 4.4 ns; Voltage: 4.5-5.5 V
|
Integrated Device Technology, Inc.
|
| M38230G4-XXXFP M38230G4-XXXHP M38231G4-XXXHP M3823 |
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 512Kb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 3.1 to 3.6 V
18-Mbit (512K x 36/1M x 18) Pipelined SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2 M x 18/512K x 72) Flow-Through SRAM with NoBL(TM) Architecture; Architecture: NoBL, Flow-through; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 3.1 to 3.6 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 36 Mb; Organization: 512Kb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 1Mb x 72; Vcc (V): 3.1 to 3.6 V
72-Mbit (2M x 36/4M x 18/1M x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture (2.5 Cycle Read Latency); Architecture: QDR-II , 4 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V
72-Mbit DDR-II SRAM 2-Word Burst Architecture (2.0 Cycle Read Latency); Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit (1M x 36/2M x 18/512K x 72) Pipelined Sync SRAM; Architecture: Standard Sync, Pipeline SCD; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
18-Mbit (512K x 36/1M x 18) Flow-Through SRAM; Architecture: Standard Sync, Flow-through; Density: 18 Mb; Organization: 1Mb x 18; Vcc (V): 3.1 to 3.6 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 4Mb x 18; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit(2M x 36/4M x 18/1M x 72) Pipelined SRAM with NoBL(TM) Architecture; Architecture: NoBL, Pipeline; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 2.4 to 2.6 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit QDR(TM)-II SRAM 4-Word Burst Architecture; Architecture: QDR-II, 4 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER 单芯8位CMOS微机
Sync SRAM; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
36-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 36 Mb; Organization: 1Mb x 36; Vcc (V): 1.7 to 1.9 V 单芯位CMOS微机
72-Mbit DDR-II SRAM 2-Word Burst Architecture; Architecture: DDR-II CIO, 2 Word Burst; Density: 72 Mb; Organization: 2Mb x 36; Vcc (V): 1.7 to 1.9 V
36-Mbit QDR(TM)-II SRAM 2-Word Burst Architecture; Architecture: QDR-II, 2 Word Burst; Density: 36 Mb; Organization: 2Mb x 18; Vcc (V): 1.7 to 1.9 V
|
Renesas Electronics Corporation.
Renesas Electronics, Corp.
|
