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| 2SJ117 Silicon P-Channel MOS FET ADE-208-1180 (Z) 1st. Edition Mar. 2001 Application High speed power switching Features * * * * High speed switching Good frequency characteristics Wide area of safe operation Suitable for switching regulator, DC-DC converter and ultrasonic power oscillators. Outline TO-220AB D 1 2 3 1. Gate 2. Drain (Flange) 3. Source G S 2SJ117 Absolute Maximum Ratings (Ta = 25C) Item Drain to source voltage Gate to source voltage Drain current Drain peak current Body to drain diode reverse drain current Channel dissipation Channel temperature Storage temperature Notes: 1. Value at TC = 25C Symbol VDSS VGSS ID I D(pulse) I DR Pch* Tch Tstg 1 Ratings -400 20 -2 -4 -2 40 150 -55 to +150 Unit V V A A A W C C Electrical Characteristics (Ta = 25C) Item Drain to source breakdown voltage Gate to source leak current Symbol Min V(BR)DSS I GSS -400 -- -- -2.0 -- Typ -- -- -- -- 5 Max -- 1 -1 -5.0 7 Unit V A mA V Test conditions I D = -10 mA, VGS = 0 VGS = 20 V, VDS = 0 VDS = -320 V, VGS = 0 I D = -1 mA, VDS = -10 V I D = -1 A, VGS = -15 V*1 S pF pF pF ns ns ns ns V ns I F = -1 A, VGS = 0 I F = -1 A, VGS = 0, diF/dt = 100 A/s I D = -2 A, VGS = -15 V, RL = 15 I D = -1 A, VDS = -20 V*1 VDS = -10 V, VGS = 0, f = 1 MHz Zero gate voltage drain current I DSS Gate to source cutoff voltage Static drain to source on state resistance Forward transfer admittance Input capacitance Output capacitance Reverse transfer capacitance Turn-on delay time Rise time Turn-off delay time Fall time Body to drain diode forward voltage Body to drain diode reverse recovery time Note: 1. Pulse test |yfs| Ciss Coss Crss t d(on) tr t d(off) tf VDF t rr VGS(off) RDS(on) 0.4 -- -- -- -- -- -- -- -- -- 0.7 520 110 15 10 25 45 35 -0.8 300 -- -- -- -- -- -- -- -- -- -- 2 2SJ117 Switching Time Test Circuit Vin Monitor Vout Monitor D.U.T RL 50 Vin -15 V Vout td (on) 90% 10% tr td (off) 90% 90% 10% tf Vin 10% Waveforms VDD . = -30 V . 6 |
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