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| BU2500FV / BU2501FV Optical disc ICs 8bit 12-channel D/A converter BU2500FV / BU2501FV BU2500FV / BU2501FV is a 12ch high-performance 8bit D/A converter which adopts the R-2R system. The BU2500FV utilizes a 5V supply voltage and the BU2501FV a 3V. Each channel output incorporates a Rail to Rail output type buffer amplifier. Three wire serial data input and cascade connection is possible. Small package (0.65mm pitch and 20pin) is adopted. Applications CD-R, CD-RW, DVC, Digital camera and industrial equipment Features 1) High-performance 8bit 12-channel D/A converter adopting the R-2R system. 2) Output of each channel incorporates a Rail to Rail output type buffer amplifier. 3) Digital input compatible with TTL levels. 4) 12bit 3wire serial data input, cascade connection is possible. 5) Buffer amplifier of each channel is highly-stable. Prevents oscillation even with capacitance loads. Absolute maximum ratings (Ta=25C) Parameter Supply voltage Symbol VCC VDD Limits -0.3~+6.0 -0.3~+6.0 -0.3~+6.0 -0.3~+6.0 400 Unit V V V V mW Upper reference voltage of D/A converter Input voltage Output voltage Power dissipation Operating temperature Storage temperature VIN VOUT Pd Topr Tstg -25~+85 -55~+125 C C Reduced by 4mW for each increase in Ta of 1C over 25C. Recommended operating conditions (Ta=25C) Parameter Supply voltage (BU2500FV) Supply voltage (BU2501FV) Symbol VCC VCC Limits 4.5~5.5 2.7~3.6 Unit V V 1/3 BU2500FV / BU2501FV Optical disc ICs Block diagram GND AO2 AO1 DI CLK LD Do AO12 AO11 Vcc 20 19 18 17 16 15 14 13 12 11 12bit SHIFT REGISTER 8bit R-2R D/A CONVERTER D/A D0 1 2 3 4 5 6 7 D8 9 10 11 D/A D/A ch2 8bit Latch 1 L ADDRESS DECODER 12 L 11 L 8bit Latch L L L L L L L ch3 8bit R-2R D/A CONVERTER BUFFER OPERATIONAL AMPLIFIER 4 D/A 5 D/A 6 D/A 7 D/A 8 D/A 9 D/A 10 D/A 1 Vss (VrefL) 2 AO3 3 AO4 4 AO5 5 AO6 6 AO7 7 AO8 8 AO9 9 AO10 10 VDD (VrefH) 2/3 BU2500FV / BU2501FV Optical disc ICs Pin descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 Pin name Vss Ao3 Ao4 Ao5 Ao6 Ao7 Ao8 Ao9 Ao10 VDD Vcc Ao11 Ao12 Do LD Analog / Digital Analog Analog Analog Analog Analog Analog Analog Analog Analog Analog - Analog Analog Digital Digital I/O - O O O O O O O O - - O O O I Function D/A converter lower reference voltage input terminal 8bit D/A converter output terminal (CH3) 8bit D/A converter output terminal (CH4) 8bit D/A converter output terminal (CH5) 8bit D/A converter output terminal (CH6) 8bit D/A converter output terminal (CH7) 8bit D/A converter output terminal (CH8) 8bit D/A converter output terminal (CH9) 8bit D/A converter output terminal (CH10) D/A converter upper reference voltage input terminal Power supply terminal 8bit D/A converter output terminal (CH11) 8bit D/A converter output terminal (CH12) Terminal to output MSB data of 12-bit shift register When H-level signal is input to this terminal, the value stored in 12-bit shift register is loaded in decoder and D/A converter output register. Shift clock input terminal. Input signal at DI pin is input to 12-bit shift register at rise of shift clock pulse Serial data input terminal to input 12-bit long serial data 8bit D/A converter output terminal (CH1) 8bit D/A converter output terminal (CH2) GND terminal Circuit 5 3 3 3 3 3 3 3 3 4 - 3 3 2 1 16 17 18 19 20 CLK DI Ao1 Ao2 GND Digital Digital Analog Analog - I I O O - 1 1 3 3 - External dimensions (Unit : mm) BU2500FV / BU2501FV 6.50.2 6.40.3 1.150.1 4.40.2 0.1 0.3Min. 20 11 1 10 0.150.1 0.1 0.65 0.220.1 SSOP-B20 3/3 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design. The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix1-Rev1.0 |
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