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* The IC04 LOCMOS HE4000B Logic Family Specifications HEF, HEC * The IC04 LOCMOS HE4000B Logic Package Outlines/Information HEF, HEC
HEF4053B MSI Triple 2-channel analogue multiplexer/demultiplexer
Product specification File under Integrated Circuits, IC04 January 1995
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
DESCRIPTION The HEF4053B is a triple 2-channel analogue multiplexer/demultiplexer with a common enable input (E). Each multiplexer/demultiplexer has two independent inputs/outputs (Y0 and Y1), a common input/output (Z), and select inputs (Sn). Each also contains two-bidirectional analogue switches, each with one side connected to an independent input/output (Y0 and Y1) and the other side connected to a common input/output (Z).
HEF4053B MSI
With E LOW, one of the two switches is selected (low impedance ON-state) by Sn. With E HIGH, all switches are in the high impedance OFF-state, independent of SA to SC. VDD and VSS are the supply voltage connections for the digital control inputs (SA to SC and E). The VDD to VSS range is 3 to 15 V. The analogue inputs/outputs (Y0, Y1 and Z) can swing between VDD as a positive limit and VEE as a negative limit. VDD-VEE may not exceed 15 V. For operation as a digital multiplexer/demultiplexer, VEE is connected to VSS (typically ground).
Fig.1 Functional diagram.
FAMILY DATA, IDD LIMITS category MSI See Family Specifications
January 1995
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Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
PINNING Y0A to Y0C Y1A to Y1C SA to SC E ZA to ZC FUNCTION TABLE Fig.2 Pinning diagram. E L HEF4053BP(N): 16-lead DIL; plastic (SOT38-1) HEF4053BD(F): 16-lead DIL; ceramic (cerdip) (SOT74) HEF4053BT(D): 16-lead SO; plastic (SOT109-1) ( ): Package Designator North America Notes L H INPUTS Sn L H X
HEF4053B MSI
independent inputs/outputs independent inputs/outputs select inputs enable input (active LOW) common inputs/outputs
CHANNEL ON Y0n-Zn Y1n-Zn none
1. H = HIGH state (the more positive voltage) L = LOW state (the less positive voltage) X = state is immaterial
Fig.3 Schematic diagram (one switch).
RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) Supply voltage (with reference to VDD) Note 1. To avoid drawing VDD current out of terminal Z, when switch current flows into terminals Y, the voltage drop across the bidirectional switch must not exceed 0,4 V. If the switch current flows into terminal Z, no VDD current will flow out of terminals Y, in this case there is no limit for the voltage drop across the switch, but the voltages at Y and Z may not exceed VDD or VEE. January 1995 3 VEE -18 to + 0,5 V
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
HEF4053B MSI
Fig.4 Logic diagram.
January 1995
4
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
DC CHARACTERISTICS Tamb = 25 C VDD-VEE V 5 ON resistance 10 15 5 ON resistance 10 15 5 ON resistance `' ON resistance between any two channels OFF-state leakage current, all channels OFF OFF-state leakage current, any channel 10 15 5 10 15 5 10 15 5 10 15 IOZY IOZZ - - - - - - RON RON RON RON SYMBOL TYP. 350 80 60 115 50 40 120 65 50 25 10 5 MAX. 2500 245 175 340 160 115 365 200 155 - - - - - 1000 - - 200 nA nA nA nA nA nA E at VSS E at VDD
HEF4053B MSI
CONDITIONS Vis = 0 to VDD-VEE see Fig.6
Vis = 0 see Fig.6 Vis = VDD-VEE see Fig.6 Vis = 0 to VDD-VEE see Fig.6
Fig.5 Operating area as a function of the supply voltages.
January 1995
5
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
HEF4053B MSI
Fig.6 Test set-up for measuring RON.
Iis = 200 A VSS = VEE = 0 V
Fig.7 Typical RON as a function of input voltage.
January 1995
6
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
AC CHARACTERISTICS VEE = VSS = 0 V; Tamb = 25 C; input transition times 20 ns VDD V Dynamic power dissipation per package (P) 5 10 15 TYPICAL FORMULA FOR P (W) 2 500 fi + (foCL) x VDD2 11 500 fi + (foCL) x 29 000 fi + (foCL) x VDD2 VDD2 where fi = input freq. (MHz)
HEF4053B MSI
fo = output freq. (MHz) CL = load capacitance (pF) (foCL) = sum of outputs VDD = supply voltage (V)
AC CHARACTERISTICS VEE = VSS = 0 V; Tamb = 25 C; input transition times 20 ns VDD V Propagation delays Vis Vos HIGH to LOW 5 10 15 5 LOW to HIGH Sn Vos HIGH to LOW 10 15 5 10 15 5 LOW to HIGH Output disable times E Vos HIGH 5 10 15 5 LOW Output enable times E Vos HIGH 5 10 15 5 LOW 10 15 January 1995 tPZL tPZH 260 95 65 280 105 70 7 525 190 130 565 205 140 ns ns ns ns ns ns note 3 note 3 10 15 tPLZ tPHZ 200 115 110 200 120 110 400 230 220 400 245 215 ns ns ns ns ns ns note 3 note 3 10 15 tPLH tPHL tPLH tPHL 10 5 5 15 5 5 200 85 65 275 100 65 20 10 10 30 10 10 400 170 130 555 200 130 ns ns ns ns ns ns ns ns ns ns ns ns note 2 note 2 note 1 note 1 SYMBOL TYP. MAX.
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
VDD V Distortion, sine-wave response Crosstalk between any two channels Crosstalk; enable or address input to output OFF-state feed-through ON-state frequency response 5 10 15 5 10 15 5 10 15 5 10 15 5 10 15 Notes Vis is the input voltage at a Y or Z terminal, whichever is assigned as input. Vos is the output voltage at a Y or Z terminal, whichever is assigned as output. 1. RL = 10 k to VEE; CL = 50 pF to VEE; E = VSS; Vis = VDD (square-wave); see Fig.8. SYMBOL TYP. 0,25 0,04 0,04 - 1 - - 50 - - 1 - 13 40 70 MAX. % % % MHz MHz MHz mV mV mV MHz MHz MHz MHz MHz MHz note 8 note 7 note 6 note 5 note 4
HEF4053B MSI
2. RL = 10 k; CL = 50 pF to VEE; E = VSS; Sn = VDD (square-wave); Vis = VDD and RL to VEE for tPLH; Vis = VEE and RL to VDD for tPHL; see Fig.8. 3. RL = 10 k; CL = 50 pF to VEE; E = VDD (square-wave); Vis = VDD and RL to VEE for tPHZ and tPZH; Vis = VEE and RL to VDD for tPLZ and tPZL; see Fig.8. 4. RL = 10 k; CL = 15 pF; channel ON; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD); fis = 1 kHz; see Fig.9. 5. RL = 1 k; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD); V os 20 log -------- = - 50 dB; see Fig. 10. V is 6. RL = 10 k to VEE; CL = 15 pF to VEE; E or Sn = VDD (square-wave); crosstalk is Vos (peak value); see Fig.8. 7. RL = 1 k; CL = 5 pF; channel OFF; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD); V os 20 log -------- = - 50 dB; see Fig. 9. V is 8. RL = 1 k; CL = 5 pF; channel ON; Vis = 12 VDD (p-p) (sine-wave, symmetrical about 12 VDD); V os 20 log -------- = - 3 dB; see Fig. 9. V is
January 1995
8
Philips Semiconductors
Product specification
Triple 2-channel analogue multiplexer/demultiplexer
HEF4053B MSI
Fig.8
Fig.9
(a)
(b)
Fig.10
APPLICATION INFORMATION Some examples of applications for the HEF4053B are: * Analogue multiplexing and demultiplexing. * Digital multiplexing and demultiplexing. * Signal gating. NOTE If break before make is needed, then it is necessary to use the enable input. January 1995 9

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