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Z89314/318 CPS95TV0403
CUSTOMER PROCUREMENT SPECIFICATION
Z89314/318
DIGITAL TELEVISION CONTROLLER
FEATURES
s Part Number Z8 ROM (Kbyte) Z8 RAM* (Kbyte)
512 512
Speed (MHz)
12 12
s s s s s s
0C to +70C Temperature Range Direct Closed Caption Decoding TV Tuner Serial Interface Customized Character Set Character Control Mode Directly Controlled Receiver Functions
Z89314 16 Z89318 10 *General-Purpose
s s s
40-Pin DIP Package 4.5- to 5.0-Volt Operating Range Z89C00 RISC Processor Core
GENERAL DESCRIPTION
The Z89314/318 are members of Zilog's family of Digital Television Controllers designed to provide complete audio and video control of television receivers, video recorders, and advanced on-screen display facilities. The powerful Z89C00 RISC processor core allows users to control on-board peripheral functions and registers using the standard processor instruction set. In closed caption mode, text can be decoded directly from the composite video signal and displayed on the screen with assistance from the processor's digital signal processing capabilities. The character representation in this mode allows for a simple attribute control through the insertion of control characters. The character control mode provides access to the full set of attribute controls. The modification of attributes is allowed on a character-by-character basis. The insertion of control characters permits direction of other character attributes. Display attributes include underlining, italics, blinking, eight foreground/background colors, character position offset delay, and background transparency are made possible through a fully customized 512 character set, formatted in two 256 character banks. Serial interfacing with the television tuner is provided through the tuner serial port. This version of the Z89300 series does not offer I2C capability Additional hardware provides the capability to display two to three times normal size characters. The smoothing logic contained in the on-screen display circuit improves the appearance of larger fonts. Fringing circuitry can be activated to improve the visibiity of text by surrounding the character lines with a one-pixel border. Receiver functions such as color and volume can be directly controlled by eight 8-bit pulse width modulated ports.
Notes: All Signals with a preceding front slash, "/", are active Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is active Low, only). Power connections follow conventional descriptions below: Connection Power Ground Circuit VCC GND Device VDD VSS
CPS95TV0403 (8/95)
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Z89314/318 CPS95TV0403
GENERAL DESCRIPTION (Continued)
Capture IRIN ADC Port 17 Port 00 ADC0 ADC1 ADC2 PWM PWM1 PWM2 PWM3 PWM4 PWM5 PWM6
Port 0
Port1 Port 10 Port 11 Port 12 Port 13 Port 14 Port 15 Port 16
Port 00 Port 01 Port 02 Port 03 Port 04 Port 05 Port 06 Port 07 Port 08 Port 09
Control XTAL1 XTAL2 LPF HSYNC VSYNC /Reset CPU RAM 512 x 16
Address ROM Addr Data
Register Addr/Data
OSD V1 V2 V3 BLANK ROM 16K x 16 Z89314 10K x 16 Z89318
ROM Data
Functional Block Diagram
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Z89314/318 CPS95TV0403
PIN DESCRIPTION
N/A PWM9 IRIN Port 18 Port 00/ADC2 Port 01 Port 02 Port 03 Port 04 Port 05 Port 06 Port 07 Port 08 Port 09 Port 10 Port 11 Port 12 Port 13 Port 14 Port 15 Port 16
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
40 39 38 37 36 35 34 33 32
PWM6 PWM5 PWM4 PWM3 PWM2 PWM1 CVI/ADC0 LPF XTAL2 GND XTAL1 VCC /Reset Port 17/ADC1 VBlank V1 V2 V3 VSync HSync
Z89314 Z89318
31 30 29 28 27 26 25 24 23 22 21
40-Pin DIP Configuration
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Z89314/318 CPS95TV0403
PIN DESCRIPTION (Continued) Z89314/318
Pin Name VCC GND IRIN ADC[5:0] Z89314 40-Pin 29,- 31,- 2 -,-,-,4,27,34 Configuration Direction Reset PWR PWR I AI - - I I
Function +5 V 0V Infrared Remote Capture Input 4-Bit Analog to Digital Converter Input 8-Bit Pulse Width Modulator Output Bit Programmable Input/Output Ports
PWM[8:1]a Port0[F:0]b
Port1[9:0]a
Bit Programmable Input/Output Ports
-,-,40,39,38 37,36,35 -,-,-,-,-,-, 13,12,11 10,9,8,7,6,5,4 -,3,27,20, 19,18,17, 16,15,14 30 32 33 21 22 28 23,24,25 26 N/A 20
OD B
O I
B
I
XTAL1 XTAL2 LPF HSYNC VSYNC /RESET V[3:1] Blank Half Blank SCLKe
Crystal Oscillator Input Crystal Oscillator Output Loop Filter H_Sync V_Sync Device Reset OSD Video Output (Typically Drive B, G, and R Outputs) OSD Blank Output OSD Half Blank Output Internal Processor SCLK
AI AO AB B B I O O O O
I O O I I I O O
Notes: a) PWM [8,7] is not available on the 40-pin DIP version. b) Port0 [F:A] is not available on the 40-pin DIP version. c) Port19 is not available on the 40-pin DIP version. d) Half Blank output is a function shared with Port0F. Half Blank output is not available on the 40-pin DIP version. e) Internal processor SCLK is shared with Port16.
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Z89314/318 CPS95TV0403
Z893XX 10 Mohm 68pF 32.768k XTAL1
XTAL2 27k
560pF
32K Oscillator Recommended Circuit
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Z89314/318 CPS95TV0403
ABSOLUTE MAXIMUM RATINGS
Symbol VCC VID VIA VO VO IOH IOH IOL IOL TA TA Parameter Power Supply Voltage Input Voltage Input Voltage Output Voltage Output Voltage Output Current High Output Current High Output Current Low Output Current Low Operating Temperature Storage Temperature 0 -65 Min 0 -0.3 -0.3 -0.3 -0.3 Max 7 VCC +0.3 VCC +0.3 VCC +0.3 VCC +8.0 -10 -100 20 200 70 150 Units V V V V V mA mA mA mA C C Conditions Digital Inputs Analog Inputs (A/D0...A/D4) All Push-Pull Digital Output Open-Drain PWM Outputs (PWM1...PWM8) One Pin All Pins One Pin All Pins
DC CHARACTERISTICS TA = 0C to + 70C; VCC = 4.5 V to + 5.5 V; FOSC = 32.768 KHz
Symbol VIL VIH VPU VOL VOL3 VXL VXH VHY1 IIR IIL ICC ICC1E2 ICC12 ICC2 Parameter Input Voltage Low Input Voltage High Max. Pull-Up Voltage Output Voltage Low Output Voltage High Input Voltage XTAL1 Low Input Voltage XTAL1 High Schmitt Hysteresis Reset Input Current Input Leakage Supply Current Supply Current of the OTP Supply Current Supply Current Min 0 0.6 VCC Max 0.2 VCC VCC 12 0.4 VCC -0.9 0.3 VCC VCC -2.0 3.0 -3.0 0.75 150 3.0 100 700 300 40 Typical 0.4 3.6 0.16 4.75 1.0 3.5 0.5 90 0.01 60 300 100 5 Units V V V V V V V V A A mA A A A PWM0...PWM8 Only @ IOL = 1 mA @ IOL = 0.75 mA External Clock Generator Driven On XTAL1 Input Pin VRL = 0 V @ 0 V and VCC Sleep Mode @ 32 KHz Sleep Mode @ 32 KHz Sleep Mode Conditions
Notes: 1. Not in the EOS. 2. Z89314 is not an OTP. 3. Labeled incorrect.
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Z89314/318 CPS95TV0403
AC CHARACTERISTICS TA = 0C to + 70C; VCC = 4.5 V to 5.5 V; FOSC = 32.768 KHz
Symbol TPC TRC,TFC TDPOR Parameter Input Clock Period Clock Input Rise and Fall Power On Reset Delay Min 16 0.8 Max 100 Typical 32 12 1.2 Units S S s
AC CHARACTERISTICS* TA = 0C to + 70C; VCC = 4.5 V to 5.5 V; FOSC = 32.768 KHz
Symbol TWRES TDHS TDVS TDES TDOS TWHVS Parameter Power-On Reset Min. Width H_Sync Incoming Signal Width V_Sync Incoming Signal Width Time Delay Between Leading Edge of V_Sync and H_Sync in Even Field Time Delay Between Leading Edge of H_Sync in Odd Field H_Sync/V_Sync Edge Width Min 5.5 0.15 -12 20 Max 5TPC 12.5 1.5 +12 44 2.0 Typical 11 1.0 0 32 0.5 Units S S mS S S S
*Notes: The above AC Characteristics are ROM code/software dependent and are not measurable internally.
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Z89314/318 CPS95TV0403
(c) 1995 by Zilog, Inc. All rights reserved. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of Zilog, Inc. The information in this document is subject to change without notice. Devices sold by Zilog, Inc. are covered by warranty and patent indemnification provisions appearing in Zilog, Inc. Terms and Conditions of Sale only. Zilog, Inc. makes no warranty, express, statutory, implied or by description, regarding the information set forth herein or regarding the freedom of the described devices from intellectual property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be responsible for any errors that may appear in this document. Zilog, Inc. makes no commitment to update or keep current the information contained in this document. Zilog's products are not authorized for use as critical components in life support devices or systems unless a specific written agreement pertaining to such intended use is executed between the customer and Zilog prior to use. Life support devices or systems are those which are intended for surgical implantation into the body, or which sustains life whose failure to perform, when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user. Zilog, Inc. 210 East Hacienda Ave. Campbell, CA 95008-6600 Telephone (408) 370-8000 Telex 910-338-7621 FAX 408 370-8056 Internet: http://www.zilog.com
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