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Achieving a 1-chip motor drive.
Optical Disc Motor Drive IC AN41204A
Overview
The AN41204A optical disc motor drive IC incorporates a 1-channel 3-phase full-wave PWM motor driver featuring low vibration and noise as well as a 5-channel PWM output driver for linear input. Integrating a spindle driver and channel driver on a single chip and using small, thin packaging reduces the mounting area. This helps to develop equipment that is more compact, slim and lightweight.
Unit : mm
9.000.20 7.000.10 (4.20) (3.37) 36 37 25 24
Area of no resin flash
(0.75)
48 1 (0.75) 0.50 12 0.200.05 0.10 M 13
Feature
* All-channel PWM driving power consumption is among the lowest of its kind. * Low-vibration and low-noise sinewave PWM is used to drive the spindle section. * Dead zone-less PWM driving for focus, tracking and tilt. * Stepper motor drivers on two channels. * Built-in thermal shutdown function. * Compact, slim package.
7.000.10 9.000.20
SEATING PLANE (1.00) 0.10 0 to 8 0.500.10
(4.20)
(3.37)
0.150.05
HQFP048-P-0707
Applications
Slim DVD recording units (RAM/+RW/-RW), optical disc units such as slim combination drives and car navigation systems.
Products and specifications are subject to change without notice. Please ask for the latest Product Standards to guarantee the satisfaction of your product requirements.
,
New publication, effective from 19 Mar. 2004 M00631AE
1 Kotari-yakemachi, Nagaokakyo, Kyoto 617-8520, Japan Tel. +81-75-951-8151 http://panasonic.co.jp/semicon
0.10 -0.05 1.20 max
+0.10
(1.00)
Block Diagram
VMAC
22
15k 1
1.5k
10 11 9 12 8 13
Logic FB
Predrive
Power MOS
26 25
FO1 RO1
0.01F FB1 15k 2
1.5k
Logic FB
Predrive
Power MOS
24 23
FO2 RO2
0.01F FB2 15k 3
1.5k
Logic
FB
Predrive
Power MOS
20 19 21 43
FO3 RO3 PGAC VMST FO4 RO4
47F
0.01F FB3 4 Connect this part toVREF FB4 0.01F 5 FB5 0.01F
22F
5V
ABS
7 14
Logic FB
Predrive
Power MOS
44 45
ABS
6 15 16
Logic FB
Predrive
Power MOS
47 48 46
FO5 RO5
1.65V
VREF
PGST
VREF reset (5-ch) STBY VDD
18 27 28
Standby (all-ch)
Thermal shut down (All)
Triangular wave oscillator
VMSP1
47F
47F
100
5V
35 42
Distributor
VMSP2 A1 A2 A3 RCS1 RCS2
5V
H1H H1L H2H H2L H3H SFG Mode table H :1FG,All ch.=active OPEN :3FG,All ch.=active L :1FG,ch.1 mute BMS Mode table H OPEN L :R-BRK :S-R-S-BRK :S-BRK H3L 100 VH
29 30 31 32 33 34 Hall bias Generate FG Brake mode selector Absolute value Hall amp. matrix
Upper predrive Lower predrive
37 3-phase bridge 39 40 38
20k 3.3V FG FG 3 Signal output SFG FG 2 friequency select BMS EC ECR
FF OSC
41
17 4 5
36 1
CS GND
Spidle speed control signal input ECECR :BRK
Rcs 0.22
Pin Descriptions
No 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Symbol GND SFG FG EC ECR IN5 IN4 IN3 IN2 IN1 FB1 FB2 FB3 FB4 FB5 VREF BMS STBY RO3 FO3 PGAC VMAC RO2 FO2 Description Control circuit GND SP FG mode select input SP FG signal input SP control signal input SP reference voltage input Ch.5 control signal input Ch.4 control signal input Ch.3 control signal input Ch.2 control signal input Ch.1 control signal input Ch.1 feedback output Ch.2 feedback output Ch.3 feedback output Ch.4 feedback output Ch.5 feedback output Ch reference voltage input SP Break mode select input Total shutdown input Ch.3 inverted output Ch.3 non-inverted output Ch.1 to 3 Coil drive GND Ch1 to 3 Coil drive power supply Ch.2 inverted output CH2 non-inverted output No 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 Symbol RO1 FO1 VDD H1H H1L H2H H2L H3H H3L VH VMSP1 CS A1 RCS1 A2 A3 RCS2 VMSP2 VMST FO4 RO4 PGST FO5 RO5 Description Ch.1 inverted output Ch.1 non-inverted output Control circuit power supply SP Hall element 1 positive input SP Hall element 1 negative input SP Hall element 2 positive input SP Hall element 2 negative input SP Hall element 3 positive input SP Hall element 3 negative input Hall-bias output SP Motor drive power supply SP current detection SP Driver output 1 SP Driver common Source output SP Driver output 2 SP Driver output 3 SP Driver common Source output SP Motor drive power supply
Ch.4 and 5 Motor drive power supply
Ch.4 non-inverted output Ch.4 inverted output Ch4 and 5 Motor drive GND Ch.5 non-inverted output CH5 inverted output
Absolute Maximum Ratings
Parameter Storage temperature Operating ambient temperature Supply voltage Supply current Symbol Tstg Topr VMST,VMAC VDD IVMSP IVMAC IVMST IVDD Supply voltage applied range Power dissipation
Drive power supply/output instantaneous current spindle
Rating -55 to 150 -30 to 85 6.0 1200 3000 2000 100 -0.3 to 6.0 307.9 3000
Unit C C V mA
Note 1 1
2
VMSP,VMST, VMAC,VDD PD I (o)
V mW mA 3
Note) 4 o=37,38,39,40,41 p=19,20,23,24,25,26
Drive output current for ch.1,2 and ch.3 Drive output current for ch.4 and ch.5 Drive output voltage Drive output voltage Control signal input voltage Hall bias current
I (p) I (q) V (l) V (m) V (n)
1000 1000 7.0 7.0 GND to VDD
mA mA V V V
q=44,45,47,48 l=19,20,23,24,25,26, 44,45,47,48 m=37,39,40 n=2,3,4,5,6,7,8,9,10,1 1,12,13,14,15,16,17,18 ,28,29,30,31,32,33 x=34
IHB(x)
30
mA
Note)1: Ta = 25C except storage temperature and operating ambient temperature. 2: Make sure that channels 1 to 5 do not have a current flow exceeding 1000 mA. 3: Power dissipation shows the value of only package at Ta = 85C. 4: The above drive output current ( 3000 mA) is permissible for a period exceeding 1 ms. Note) Do not apply current or voltage from outside to any pin not listed above other than power supply and ground pin. In the current circuit, (+) means current flowing into IC and (-) means current flowing out of IC.
Operating Supply Voltage Range
Parameter Operating Supply Voltage Range Symbol VDD VMAC VMST VMSP Min. 4.0 3.5 Typ. 5.0 5.0 Max. 5.5 5.5 Unit V V
Electrical Characteristics VDD=VMSP=VMAC=VMSL=5.0V,ECR=VREF=1.65V,STBY=3.3V,RL=8 Note) 1, Ta=25C2C unless otherwise specified.
Parameter Power supply current in standby mode Control supply current in standby mode Control supply current under no input [Standby operation] STBY high-level input voltage STBY low-level input voltage [VREF Rest] High-level input voltage Low-level input voltage [SP Driver block] Hall bias resistance Input bias current
Common-mode input voltage range
Symbol IVMS IDDS IDDA
Condition STBY=L STBY=H STBY=H
Min.
Typ. 12
Max. 20 20 16
Unit A A mA
VSBH VSBL
(Active) (Reset)
1.8

0.7
V V
VRRH VRRL
(Active) (Reset)
1.1

0.5
V V
RHB
IBH=20mA
20
40
60
IBH VHBR VINH
1.5 50
2.5 200
3 4.0 1000
A V
mVp-p
Allowable Input current Reference input voltage range Dead zone (+) Dead zone (+) Input/Output gain Input bias current
Upper-side output-ON resistance Lower-side output-ON resistance
INECR
INSPDZ(+) INSPDZ(-)
1.1 7 7 RCS=0.22 1.07 -1
50 50 1.33
2.2 88 88 1.59 1
V mV mV A/V A
ACS IBH
ROH ROH ITL
IO=-500mA IO= 500mA RCS=0.22
800
0.32 0.29 1000
0.50 0.45 1200
mA
Torque limit current
Electrical Characteristics VDD=VMSP=VMAC=VMSL=5.0V,ECR=VREF=1.65V,STBY=3.3V,RL=8 Note) 1, Ta=25C2C unless otherwise specified.
Parameter
High-level FG output Low-level FG output
High-level SFG input voltage Low-level SFG input voltage
Symbol
Condition
VFG=3.3V,IFG= -0.01mA RFG=20k VFG=3.3V,IFG= -0.01mA RFG=20k
Min.
2.6 2.6
Typ.

Max.
0.2 0.5
Unit
V V V V
FGH FGL
VSFGH VSFGL

High-level BMS input voltage Low-level BMS input voltage VBMGH VBMGL
(Reverse Brake) (Short Brake)
2.6

0.5
V V
[ch. Driver block] Ch.1 output-ON resistance (Upper + Lower) Ch.2 and ch.3 output-ON resistance (Upper + Lower) Ch.4 and ch.5 output-ON resistance (Upper + Lower) Ch.1 to ch.3 output offset voltage Ch.4 and ch.5 output offset voltage Ch.1 to ch.3 voltage gain(+)
Ch.4 and ch.5 voltage gain(+)
RON1 RON2, 3 RON4, 5 VOFS1 to 3 VOFS4 ,5 G1,2,3 G4,5 GR1to5 VZD4,5 FTR
RL=8 RL=8

1.5 1.3
2.3 2.0

RL=8
1.1
1.7
RL=8 VIN=VREF=1.65V RL=8 VIN=VREF=1.65V RL=8,RIN=15k RL=8,RIN=0 RL=8 RL=8,RIN=0
-70 -50 14.3 16.0 -1.5 10 172
16.3 18.0 25 230
+70 +50 18.3 20.0 +1.5 40 288
mV mV dB dB dB mV kHz
(+)/(-) relative gain Ch4,5 input conversion dead zone PWM frequency
(Reference values for design)
Parameter
[Thermal shutdown] Thermal shutdown circuit operating temperature Thermal shutdown hysteresis width Symbol
Condition
Min.
Typ.
Max.
Unit
TTSD
TTSD

160 30

C C
Phase Conditions of Hall Input and Output Current
A
B
C
D
E
F
H1
H3
H2
H2
H1
H3
Hall input
ECR EC FG1 FG3
Flow out BMS="L"
IA1
Flow in Flow out BMS="L" or Open BMS="H"
IA2
Flow in Flow out BMS="H"
BMS="L"
IA3
Flow in BMS="H"
BMS="H" : Reverse Brake BMS="L" : Short Brake
Package Dissipation
3.0
2.5
2.510
Mounted on standard board (four layer) (glass epoxy:50mmx50mmx0.8mm Heatsink mounted Rth(j-a)=49.8 C/W
Power dissipation PD (W)
2.0
Mounted on standard board (one surface ) (glass epoxy:50mmx50mmx0.8mm With out heatsink mounted Rth(j-a)=92.7 C/W
1.5
1.348
1.0
0.592 0.5
Independent IC without a heat sink Rth(j-a)=211.1 C/W
0 0
25
50
75
100
125
150
Ambient temperature Ta ( C)

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