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| BU2374FV Multimedia ICs VCO + phase comparator IC for PLL system BU2374FV BU2374FV is a VCO+phase comparator IC used to construct PLL system. PLL system is constructed and low jitter clocks can be generated by adopting external LPF and divider. Through a mechanism incorporated in this IC the output could be switched into quarter. Another function can set in the center point of frequency by adjusting external resistance. !Applications TV !External dimensions (Unit : mm) 5.0 0.2 !Features 1) VDD=3.3V5% operating guaranteed 2) Oscillating range of VCO is 37MHz~60MHz 3) High-speed edge trigger type phase comparator 4) VCO can be fine-adjusted by external resistor. 5) VCO and phase comparator can be controlled independently. 6) Small SSOP-B14 package 1.15 0.1 6.4 0.3 4.4 0.2 0.1 14 8 1 7 0.15 0.1 0.65 0.1 0.22 0.1 SSOP-B14 !Absolute maximum ratings (Ta=25C) Parameter Symbol VDD VIN Pd Tstg Limits -0.5 to +7.0 -0.5 to VDD+0.5 400 -30 to +125 Unit V V mW C Applied voltalge Inpuit voltage Power dissipation Storage temperature An operation is not guaranteed. In case it is used at Ta=25C or more, 4.0mW is reduceed at every 1C. Radiation resistance design is not used. Power dissipation is measured when BU2374FV is placed on the board. !Recommended operating conditions(Ta=25C) Parameter Supply voltage Input H voltage range Input L voltage range Operating temperature Output load Symbol VDD VIH VIL Topr CL Min. 3.15 0.8VDD 0 -20 Typ. Max. 3.45 VDD 0.2VDD +75 15 Unit V V V C pF - - - - - - 0.3Min. 1/7 Multimedia ICs !Block diagram Logic VDD VCO VDD VCO divide select Through or 1/4 Level Shifter VCO Bias resistor Terminal (Connect a resistor between vco VDD) VCO Output VCO frequency Control input (Force DC Voltage) Frequency Input 1 VCO GND Frequency Input 2 Pmos Gate VCO Powerdown and Output disable (H : disable L : enable) Phase Detector Phase Detector Output-Enable (H : disable L : enable) Phase Detect Output Nmos Gate Logic GND Test Pin (Normally L or Open) BU2374FV 2/7 BU2374FV Multimedia ICs !Pin descriptions Pin No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 Pin name LOGIC VDD SELECT VCO OUT FIN-A FIN-B PFD_OUT LOGIC_GND TEST PFD_INHIBIT VCO_INHIBIT VCO_GND VCO_IN BIAS VCO_VDD Digital VDD VCO output frequency select (H:1/4 output, L:1/1 output) VCO output Input reference frequency is applied to Fin A Input for VCO external counter output frequency PD output Digital GND TEST input with Pull-down resistor (Normaly OPEN or 'L') Contorol Pin for PD (H:PD disable (Hi impedance state), L:PD enable) VCO mode select (H:VCO OUT disable (L Fix), L:VCOOUT enable) GND for VCO (Analog GND) VCO control voltage input For adjusting VCO output frequency range (An external resistor connect between VCO_VDD and BIAS) VDD for VCO (Analog VDD) Functions 3/7 BU2374FV Multimedia ICs !Input / output circuits Pin No. Equivalent circuit Output Pin (Pin3) From inside IC Output Pin (Pin6) From inside IC From inside IC Input Pin (Schmitt triger) ( Pin2, 4, 5, 8, 9, 10) Pin8 : with pull-down resistance To inside IC From inside IC Input Pin (Pin12) Input Pin (Pin13) From inside IC From inside IC 4/7 BU2374FV Multimedia ICs !Electrical characteristics (Unless otherwise noted,Ta=25C, VCC=3.3V) Parameter VCO section VCO_OUT Output H voltage VCO_OUT Output L voltage input current (VCO_INHIBIT, SELECT) input impedance (VCO_IN) VCO current consumption (inhibit) VCO current consumption (normal operation) VCO control voltage VCO frequency range Bias Resistor range Frequency sersibility Output duty Output Rise-time Output Fall-time 1 Value of design guarantee (all guarantee range) Symbol Min. 3.0 - - - - - 0.5 37 2.0 - 45 - - Typ. - - - 10 - 12.5 - - - 23 50 2.5 2.5 Max. - 0.3 + -1 - 1 - VDD-0.5 60 3.0 - 55 - - Unit V V A M A mA V MHz K MHz/V % nsec nsec 1 2 Conditions IOH=-2.0mA IOL=2.0mA VOH VOL IIH, IIL Zi IDD(INH) IDD(vco) VI(vco_in) frange Rbias 1 Duty tr tf at VCO_INHIBIT=VDD PFD_INHIBIT=VDD Output 50MHz at 1/2 VDD point Time is from VDD 0.2 to vdd 0.8 Time is from VDD 0.8 to vdd 0.2 Bias R=2.0k 37MHz to 54MHz Bias R=2.4k 45MHz to 58MHz Bias R=3.0k 53MHz to 60MHz 2 Frequency sersibility { f1(VCOIN=2.0V)-f2(VCOIN=1.0V)} / 1.0V 3 When FSEL is H and output frequency is 1/4, culculate 5/7 BU2374FV Multimedia ICs (Unless otherwise noted,Ta=25C, VCC=3.3V) Parameter PFD section PFD_OUT Output H voltage PFD_OUT Output L voltage input current (PFD_INHIBIT, FIN A, FIN B) PFD current consumption (inhibit) PFD current consumption (normal operation) PFD Function Symbol Min. 3.0 - - - - - Typ. - - - - 0.5 - Max. - 0.3 + -1 Unit V V A A mA - Conditions IOH=-2.0mA IOL=2.0mA VOH VOL IIH, IIL IDD(INH) IDD(vco) - 1 - - at VCO_INHIBIT=VDD PFD_INHIBIT=VDD FIN_A and B=GND FIN_A and FIN_B=1MHz 4 4 FIN-A FIN-B PD OUT Even if Fin-A and Fin-B are same phase, PD out is off about 2.5nsec. (VDD=3.0V) PD OUT Output time [nsec] 2.5nsec H output (P-MOS Tr) 2.5nsec Phase error [nsec] (between Fin-A positive edge and Fin-B positive edge) L output (N-MOS Tr) Input pin (FIN_A, FIN_B, VCO_INHIBIT, PFD_INHIBIT, SELECT) Output (V) 0.2VDD Vhys 0.8VDD VthL 1/2VDD VthH Input (V) 6/7 BU2374FV Multimedia ICs !Application example LOGIC VDD 1 LOGIC VDD 2 SELECT 3 VCO OUT Bypass capacitor VCO VDD 14 R VCO VDD H:VCO_OUT 1/4 divide L :VCO_OUT normal BIAS 13 Bypass capacitor VCO IN 12 R R BU2374FV Ref input 4 FIN-A 1/N VCO GND 11 10 9 8 VCO GND 5 FIN-B 6 PFD OUT VCO INHIBIT H:VCO out Disable L:VCO out Enable H:PFD out Disable L:PFD out Enable PFD INHIBIT LOGIC GND 7 LOGIC GND TEST VCO_VDD,VCO_GND Please take care this Power line. Because this line is most weak in digital noise. So this line must be separated from LOGIC_VDD, GND. And place bypass capacitor (0.1F) for power pin as close to BU2374FV as possible. This line is noise source. So it should be separated from AVDD (AGND). And place bypass capacitor (0.1F) for power pin as close to BU2374FV as possible. And this line should be connected VDD of external voc-out divide. Please take care because the bias is weak in digital noise. And place capacitor (0.1F) close to BU2374FV. LOGIC_VDD, LOGIC_GND Bias Recommend to use capacitor that is better to reduce high frequency noise. Recommend to control (SELECT, PFD_INHIBIT, VCO_INHIBIT) by power line (LOGIC_VDD, LOGIC_GND). 7/7 Appendix Notes No technical content pages of this document may be reproduced in any form or transmitted by any means without prior permission of ROHM CO.,LTD. The contents described herein are subject to change without notice. The specifications for the product described in this document are for reference only. Upon actual use, therefore, please request that specifications to be separately delivered. Application circuit diagrams and circuit constants contained herein are shown as examples of standard use and operation. Please pay careful attention to the peripheral conditions when designing circuits and deciding upon circuit constants in the set. Any data, including, but not limited to application circuit diagrams information, described herein are intended only as illustrations of such devices and not as the specifications for such devices. ROHM CO.,LTD. disclaims any warranty that any use of such devices shall be free from infringement of any third party's intellectual property rights or other proprietary rights, and further, assumes no liability of whatsoever nature in the event of any such infringement, or arising from or connected with or related to the use of such devices. Upon the sale of any such devices, other than for buyer's right to use such devices itself, resell or otherwise dispose of the same, no express or implied right or license to practice or commercially exploit any intellectual property rights or other proprietary rights owned or controlled by ROHM CO., LTD. is granted to any such buyer. Products listed in this document use silicon as a basic material. Products listed in this document are no antiradiation design. The products listed in this document are designed to be used with ordinary electronic equipment or devices (such as audio visual equipment, office-automation equipment, communications devices, electrical appliances and electronic toys). Should you intend to use these products with equipment or devices which require an extremely high level of reliability and the malfunction of with would directly endanger human life (such as medical instruments, transportation equipment, aerospace machinery, nuclear-reactor controllers, fuel controllers and other safety devices), please be sure to consult with our sales representative in advance. About Export Control Order in Japan Products described herein are the objects of controlled goods in Annex 1 (Item 16) of Export Trade Control Order in Japan. In case of export from Japan, please confirm if it applies to "objective" criteria or an "informed" (by MITI clause) on the basis of "catch all controls for Non-Proliferation of Weapons of Mass Destruction. Appendix1-Rev1.0 |
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