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T R I Q U I N T S E M I C O N D U C T O R, I N C . TQ8015 D0..15 D0..15 Input Buffers 16 x 16 Crosspoint Switch Matrix 64 CONFIGURE (R2) Sixteen 4-Bit Latches Output Buffers O0..15 O0..15 1.25 Gigabit/sec 16x16 Digital ECL Crosspoint Switch LOAD IA0..3 OA0..3 4 4 (R1) Sixteen 4-Bit Addressable Output Select Latches 4:16 Decoder VCC VEE TQ8015 GND The TQ8015 is a non-blocking 16 x 16 digital crosspoint switch capable of data rates greater than 1.25 Gigabits per second per port. Utilizing a fully differential internal data path and ECL I/O, the TQ8015 offers a high data rate with exceptional signal fidelity. The symmetrical switching and noise rejection characteristics inherent in differential logic result in low jitter and signal skew. The TQ8015 is ideally suited for digital video, data communications and telecommunication switching applications. The non-blocking architecture uses 16 fully independent 16:1 multiplexers (see diagram on page 2), allowing each output port to be independently programmed to any input port. The switch is configured by sequentially loading each multiplexer's 4-bit program latch (OA0:3) with the desired input port address (IA0:3) and enabling the LOAD pin. When complete, the CONFIGURE pin is strobed and all new configurations are simultaneously transferred into the switch multiplexers. Data integrity is maintained on all unchanged data paths. Typical output waveform with all channels driven Features * >20 Gb/s aggregate BW * 1.25 Gb/s/port NRZ data rate * Non-blocking architecture * 500 ps delay match * Differential ECL-level data I/O; CMOS-level control inputs * Low jitter and signal skew * Fully differential data path * Double buffered configuration latches * 132-pin MQFP package Electrical Characteristics Min Data Rate/Port Jitter Channel Propagation Delay Ch-to-Ch Propagation Delay Skew 1.25 150 2000 500 Max Units Gb/s ps peak-peak ps ps Applications Telecom/Datacom Switching Hubs and Routers Video Switching For additional information and latest specifications, see our website: www.triquint.com 1 SWITCHING PRODUCTS RESET 64 TQ8015 Figure 1. TQ8015 architecture. 16 X 1-BIT MULTIPLEXER . . . . . . DATA IN 0 (I0) 16 X 1-BIT MULTIPLEXER Input Buffers . . . . . . DATA OUT 15 (O15) DATA OUT 0 (O0) DATA IN 15 (I15) CONFIGURE RESET LOAD 4:16 4 DECODE OUTPUT SELECT ADDRESS (OA0:3) Configuration Register Program Register 5 4 INPUT ADDRESS (IA0:3) Table 1. Absolute Maximum Ratings5 Symbol TSTOR TCH TC VCC VEE VTT VIN IIN VIN IIN VOUT IOUT PD Parameter Storage Temperature Junction (Channel) Temperature Case Temperature Under Bias Supply Voltage Supply Voltage Load Termination Supply Voltage Voltage Applied to Any ECL Input; Continuous Current Into Any ECL Input; Continuous Voltage Applied to Any CMOS Input; Continuous Current Into Any CMOS Input; Continuous Voltage Applied to Any ECL Output Current From Any ECL Output; Continuous Power Dissipation per Output POUT = (GND - VOUT) x IOUT Absolute Max. Rating -65 C to +150 C -65 C to +150 C -65 C to +125 C 0 V to +7 V -7 V to 0 V VEE to 0 V VEE -0.5 V to +0.5 V -1.0 mA to +1.0 mA -0.5 V to VCC +0.5 V -1.0 mA to +1.0 mA VEE -0.5 V to +0.5 V -40 mA 50 mW Notes 1 2 3 3 4 4 Notes: 1. For die applications. 2. TC is measured at case top. 3. All voltages specified with respect to GND, defined as 0V. 4. Subject to IOUT and power dissipation limitations. 5. Absolute maximum ratings, as detailed in this table, are the ratings beyond which the device's performance may be impaired and/or permanent damage to the device may occur. 2 For additional information and latest specifications, see our website: www.triquint.com TQ8015 Table 2. Recommended Operating Conditions3 Symbol TC VCC VEE VTT RLOAD JC Parameter Case Operating Temperature Supply Voltage Supply Voltage Load Termination Supply Voltage Output Termination Load Resistance Thermal Resistance Junction to Case Min 0 4.5 -5.5 Typ Max 85 5.5 -4.5 Units C V V V Notes 1 -2.0 50 7 2 2 C/W Table 3. Pin Descriptions Signal I0 to I15, NI0 to NI15 O0 to O15, NO0 to NO15 IA0:3 Name/Level Data input true and complement. Differential ECL Data output true and complement. Differential ECL Input address, CMOS Description Differential data input ports. Differential data output ports. Input port selection address that is written into the selected output port program latches (OA0:3). IA3 IA2 IA1 IA0 Input port 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 : : : : : 1 1 1 1 15 Output port selection address. Selects the output port program latches to which the input port selection address (IA0:3) is written. OA3 OA2 OA1 OA0 Output port 0 0 0 0 0 0 0 0 1 1 0 0 1 0 2 : : : : : 1 1 1 1 15 Enables the selected output port program latches while set `high'. Latches the data when set to a 'low' level. Transfers the program latches data to the configuration latches and implements the switch changes while set `high'. Latches the data when set to a `low' level. Sets the switch into broadcast or pass-through configuration, overwriting existing configurations. Broadcast mode: All output ports are connected to data input port 0. This mode is selected by applying a RESET "high" pulse with CONFIGURE held "low". OA0:3 Output select address, CMOS LOAD CONFIGURE CMOS CMOS RESET CMOS For additional information and latest specifications, see our website: www.triquint.com 3 SWITCHING PRODUCTS Notes: 1. TC measured at case top. Use of adequate heatsink is required. 2. The VTT and RLOAD combination is subject to maximum output current and power restrictions. 3. Functionality and/or adherence to electrical specifications is not implied when the device is subjected to conditions that exceed, singularly or in combination, the operating range specified. TQ8015 Table 4. DC Characteristics1 - Within recommended operating conditions, unless otherwise indicated. Symbol VIH VIL IIH IIL VICM VIDIF VIH VIL IIH IIL VOCM VODIF VOH VOL IOH IOL ICC IEE Parameter ECL Input Voltage High ECL Input Voltage Low ECL Input Current High ECL Input Current Low ECL Input Common Mode Voltage ECL Input Differential Voltage (pk-pk) CMOS Input Voltage High CMOS Input Voltage Low CMOS Input Current High CMOS Input Current Low ECL Output Common Mode ECL Output Differential Voltage ECL Output Voltage High ECL Output Voltage Low ECL Output Current High ECL Output Current Low Power Supply Current (+) Power Supply Current (-) Min -1100 VTT -30 -1500 400 3.5 0 Max -500 -1500 +30 -1100 1200 VCC 1.5 +100 -100 Units mV mV A A mV mV V V A A mV mV mV mV mA mA mA mA Test Cond. Notes VIH = -0.7 V VIL = -2.0 V VIH = VCC VIL = 0 V -1500 600 -1000 VTT 20 0 -1100 -600 -1600 27 8 20 -950 Notes: 1. Test conditions unless otherwise indicated: VTT = -2.0 V, RLOAD = 50 W to VTT. Table 5. AC Characteristics1 - Within recommended operating conditions, unless otherwise indicated. Symbol Jitter T1 T2 T3 T4 T5 T6 T7 T8 T9 T10 T11 TR,F Channel Propagation Delay Ch-to-Ch Propagation Delay Skew CONFIG to Data Out (Oi) Delay LOAD Pulse Width CONFIG Pulse Width IAi to LOAD High Setup Time LOAD to IAi Low Hold Time OAi to LOAD High Setup Time LOAD to OAi Low Hold Time Load to CONFIG RESET Pulse Width Output Rise or Fall Time 7 7 0 3 0 3 0 10 250 400 Parameter Maximum Data Rate/Port Min Typ Max 1.25 150 2000 500 5 Units Gb/s ps pk-pk ps ps ns ns ns ns ns ns ns ns ns ps Notes 1,2 1 3 Notes: 1. Test conditions: VTT = -2.0 V, RLOAD = 50 W to VTT; ECL inputs: VIH = -1.1 V; VIL = -1.5 V; CMOS inputs: VIH = 3.5 V, VIL = 1.5 V; ECL outputs: VOH > -1.0 V, VOL < -1.6 V; ECL inputs rise and fall times < 1 ns; CMOS inputs rise and fall times < 20 ns. A bit error rate of 1E-13 BER or better for 223-1PRBS pattern, jitter and rise/fall times are guaranteed through characterization. 2. 1.2 Gb/s Non-Return-Zero (NRZ) data equivalent to 600 MHz clock signal. 3. Rise and fall times are measured at the 20% and 80% points of the transition from VOL max to VOL min. 4 For additional information and latest specifications, see our website: www.triquint.com TQ8015 Figure 2. Switch Configuration Timing RESET Input Address Output Address LOAD T4 T10 CONFIGURE T8 T6 Data1 In T1 Data1 Out OA OB OC OD Invalid Data Out DA DB DC T7 T9 DD DE T3 OE OF OG DF DG T5 Note:1 No data loss on nchanged data paths Notes: 1. No data loss on unchanged paths. Figure 5. Reset Timing RESET T11 CONFIGURE Output Data Broadcast T3 Pass-through Notes: 1. LOAD input must remain LOW to insure correct programming of the switch. 2. "Broadcast" is defined as data input 0 to all data outputs (0...15). 3. "Pass-through" is defined as data input 0 to data output 0, data input 1 to data output 1, and so on. For additional information and latest specifications, see our website: www.triquint.com 5 SWITCHING PRODUCTS TQ8015 Typical Performance Data Figure 4. Data Eye Closure Percent RMS vs. Data Rate (typical) 12 10 Data Eye Period (%) 8 6 4 2 0 0.5 0.7 0.9 1.1 1.3 1.5 1.7 Figure 5. Data Eye Closure Time & Amplitude vs Data Rate (typical) 100 90 80 70 % Recoverable Data Eye Period - (P-P Jitter) x 100 / Period (R) Data Rate (Gb/s) (R) Percent (%) 60 50 40 30 20 Inner Eye Amplitude V (inner eye) x 100 / V (inner eye @ 400 Mb/s) Figure 6. RMS Jitter vs. Data Rate (typical) 45 40 35 10 0 0.5 0.3 0.7 0.5 0.9 0.7 1.1 0.9 1.3 1.1 1.5 1.3 1.7 1.5 Data Rate (Gb/s) Jitter (ps) 30 25 20 15 10 0.5 0.7 0.9 1.1 1.3 1.5 1.7 Data Rate (Gb/s) 6 For additional information and latest specifications, see our website: www.triquint.com TQ8015 Figure 7. Package Pinout GND O12 NO12 GND O13 NO13 GND O14 NO14 GND O15 NO15 GND RESET VEE ND15 D15 GND ND14 D14 GND ND13 D13 GND ND12 D12 GND 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 NO11 O11 GND NO10 O10 GND NO9 O9 GND NO8 O8 GND NO7 O7 VCC VEE GND NO6 O6 GND NO5 O5 GND NO4 O4 GND NO3 O3 GND NO2 O2 Pin 1 Index Top View 132-Pin Package NOTE: All unmarked pins are not connected. Note: Unmarked pins are not connected. 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 ND11 D11 GND ND10 D10 GND ND9 D9 GND ND8 D8 GND ND7 D7 GND VCC VEE ND6 D6 GND ND5 D5 GND ND4 D4 GND ND3 D3 GND ND2 D2 (R) GND NO1 O1 GND NO0 O0 GND IADD3 IADD2 GND IADD1 IADD0 VEE VCC GND CONFIGURE LOAD GND OADD3 OADD2 GND OADD1 OADD0 GND D0 ND0 GND D1 ND1 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 For additional information and latest specifications, see our website: www.triquint.com 7 SWITCHING PRODUCTS TQ8015 Figure 8. Mechanical Dimensions (in inches) Bottom view PIN 1 INDEX Top view 17 18 PIN 1 INDEX CL 117 116 TQ8015-Q A 0.010 PIN WIDTH TYP. TQ8015-Q XXXX YYWW 84 CL XXXX YYWW A 0.400 0.540 0.467 REF. SQ. .003 .003 0.550 .003 50 51 83 LOT CODE DATE CODE Section A-A 0.140 .005 0.170 .010 Notes: 1. Part is symmetrical about the center axes. 2. Centerline bisects center pin in both directions. 3. See pad detail below. 0.025 TYP. 0.015 SEATING PLANE 0.020 MIN. CL 0.010 0.512 CL 0.053 Ordering Information PAD LAYOUT DETAIL TQ8015-Q Additional Information 1.25 16x16 Gb/s ECL Crosspoint Switch For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint: Web: www.triquint.com Email: sales@tqs.com Tel: (503) 615-9000 Fax: (503) 615-8900 For technical questions and additional information on specific applications: Email: applications@tqs.com The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems. Copyright (c) 1997 TriQuint Semiconductor, Inc. All rights reserved. Revision 1.1.A November 1997 8 For additional information and latest specifications, see our website: www.triquint.com |
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