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 CS3845B
CS3845B Current Mode PWM Control Circuit with 50% Max Duty Cycle
Description
The CS3845B provides all the necessary features to implement off-line fixed frequency current-mode control with a minimum number of external components. The CS3845B incorporates a precision temperature-controlled oscillator to minimize variations in frequency. An internal toggle flip-flop, which blanks the output off every other clock cycle, ensures that the duty-cycle never exceeds 50%. The undervoltage lockout feature ensures that VREF is stabilized within specification before the output stage is enabled. The CS3845B has been optimized for lower start up current (500A max). Other features include 1% trimmed band gap reference, pulse-by-pulse current limiting, and a high-current totem pole output for driving capacitive loads.
Features
s Optimized for Off-line Use s Temperature Compensated Oscillator s 50% Maximum Duty-cycle Clamp s Low Start-up Current (500A max) s Pulse-by-pulse Current Limiting s Undervoltage Active Pull Down s Double Pulse Suppression s 1% Trimmed Bandgap Reference s High Current Totem Pole Output
Absolute Maximum Ratings Supply Voltage (ICC<30mA) ..........................................................Self Limiting Supply Voltage (Low Impedance Source)...................................................30V Output Current ...............................................................................................1A Output Energy (Capacitive Load) .................................................................5J Analog Inputs (VFB, VSENSE)...........................................................-0.3V to 5.5V Error Amp Output Sink Current...............................................................10mA Lead Temperature Soldering Wave Solder (through hole styles only) ..........10 sec. max, 260C peak Reflow (SMD styles only) ...........60 sec. max above 183C, 230C peak Block Diagram
Package Options
8 Lead PDIP & SO
V CC
V CC Undervoltage Lock-out
V CC Pwr
COMP VFB
1 2 3 4
8 7 6 5
VREF VCC VOUT Gnd
34V Gnd 8.4V/7.6V V FB Error Amplifier + OSC 2.50V
Set/ 5.0 Volt Reset Reference Internal Bias R V REF Undervoltage Lockout Toggle Flip-Flop
V REF
Sense OSC
14 Lead SO Narrow
COMP 1 NC 2
NOR V OUT
14 13 12 11 10 9 8
COMP
VREF NC VCC VCC Pwr VOUT Gnd Pwr Gnd
R
Oscillator
VFB 3
2R R Sense 1V Current PWM Sensing Latch Comparator S Pwr Gnd R
NC 4 Sense 5 NC 6 OSC 7
Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: info@cherry-semi.com Web Site: www.cherry-semi.com
Rev. 11/19/98
1
A
(R)
Company
CS3845B
Electrical Characteristics: 0TA70C, VCC=15V; RT=10k, CT=3.3nF for sawtooth mode, unless otherwise stated
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
s Reference Section Output Voltage Line Regulation Load Regulation Temperature Stability Total Output Variation Output Noise Voltage Long Term Stability Output Short Circuit s Oscillator Section Initial Accuracy Voltage Stability Temperature Stability Amplitude Discharge Sawtooth Mode, TJ=25C 12VCC25V Sawtooth Mode TMINTATMAX (Note 1) VOSC (peak to peak)(Note 1) TJ=25C; (Note 1) TMINTATMAX (Note 1) 7.5 7.2 47 52 0.2 5 17 8.3 9.3 9.5 57 1.0 kHz % % V mA mA TJ=25C, IREF=1mA 12VCC25V 1IREF20mA (Note 1) Line, Load, Temp. (Note 1) 10Hzf10kHz, TJ=25C (Note 1) TA=125C, 1000 Hrs. (Note 1) TA=25C -30 4.82 50 5 -100 25 -180 4.90 5.00 6 6 0.2 5.10 20 25 0.4 5.18 V mV mV mV/C V V mV mA
s Error Amp Section Input Voltage Input Bias Current AVOL Unity Gain Bandwidth PSRR Output Sink Current Output Source Current VOUT HIGH VOUT LOW s Current Sense Section Gain Maximum Input Signal PSRR Input Bias Current Delay to Output s Output Section Output Low Level Output High Level Rise Time Fall Time ISINK=20mA ISINK=200mA ISOURCE=20mA ISOURCE=200mA TJ=25C, CL=1nF (Note 1) TJ=25C, CL=1nF (Note 1) 13.0 12.0 0.1 1.5 13.5 13.5 50 50 150 150 0.4 2.2 V V V V ns ns (Notes 2&3) VCOMP=5V (Note 2) 12VCC25V (Note 2) VSense=0V TJ=25C (Note 1) 2.85 0.9 3.00 1.0 70 -2 150 -10 300 3.15 1.1 V/V V dB A ns VCOMP=2.5V VFB=0V 2VOUT4V (Note 1) 12VCC25V VFB=2.7V, VCOMP=1.1V VFB=2.3V, VCOMP=5V VFB=2.3V, RL15k to Gnd VFB=2.7V, RL=15k to VREF 65 0.7 60 2 -0.5 5 2.42 2.50 -0.3 90 1.0 70 6 -0.8 6 0.7 1.1 2.58 -2.0 V A dB MHz dB mA mA V V
2
CS3845B
Electrical Characteristics: continued
PARAMETER TEST CONDITIONS MIN TYP MAX UNITS
s Total Standby Current Start-Up Current Operating Supply Current VCC Zener Voltage s PWM Section Maximum Duty Cycle Minimum Duty Cycle s Under-Voltage Lockout Section Start Threshold Min. Operating Voltage
Notes:
300 VFB=VSense=0V RT=10k, CT=3.3nF ICC=25mA 11 34
500 17
A mA V
46
48
50 0
% %
7.8 After Turn On 7.0
8.4 7.6 VCOMP VSense
9.0 8.2
V V
1. These parameters, although guaranteed, are not 100% tested in production. 2. Parameter measured at trip point of latch with VFB=0
3. Gain defined as: A =
; 0 VSense 0.8V.
Package Pin Description
PACKAGE PIN # PIN SYMBOL FUNCTION
8L PDIP & SO 1 2 3 4 5 6 7 8
14L SO 1 3 5 7 9 10 12 14 8 11 2, 4, 6, 13 COMP VFB Sense OSC Gnd VOUT VCC VREF Pwr Gnd VCC Pwr NC Error amp output, used to compensate error amplifier Error amp inverting input Noninverting input in Current Sense Comparator Oscillator timing network with Capacitor to Gnd, resistor to VREF Ground Output drive pin Positive power supply Output of 5V internal reference Output driver Gnd Output driver positive supply No Connection
3
CS3845B
Test Circuit
V REF RT
2N2222 100k 4.7k 1k Error Amp Adjust 4.7k 5k
A COMP V REF
0.1F
V CC
V FB
V CC
CS-3845B
Sense Adjust Sense V OUT
0.1F
1k 1W
V OUT
OSC
Gnd
Gnd CT
Circuit Description Undervoltage Lockout During Undervoltage Lockout (Figure 1), the output driver is biased to sink minor amounts of current. The output should be shunted to ground with a resistor to prevent activating the power switch with extraneous leakage currents. PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (Figure 2). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed-forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. When the power supply sees a sudden large output current increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty cycle tends to exceed the maximum allowed to prevent transformer saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of OSC components.
V CC
ON/OFF Command to reset of IC
CSX845B V ON V OFF 8.4V 7.6V
I CC
<15mA <1mA V ON V OFF V CC
Figure 1: Startup voltage for CS3845B.
4
CS3845B
Circuit Description: continued
Setting the Oscillator
VOSC OSC RESET Toggle F/F Output EA Output Switch Current VCC
The parameters Tc and Td can be determined as follows: t c = RTCT ln
t d = RTCT ln
( (
VREF - Vlower VREF - Vupper
) )
VREF - IdRT - Vlower VREF - IdRT - Vupper
IO
Substituting in typical values for the parameters in the above formulas: VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA, then tc 0.5534RTCT td = RTCT ln
VO
Figure 2: Timing Diagram
(
2.3 - 0.0083 RT 4.0 - 0.0083 RT
)
Vupper Vlower ton tC ton = tC toff = tC+2td
Figure 3: Timing Parameters.
For better accuracy RT should be 10k.
toff td
Grounding High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Gnd in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Sense.
5
CS3845B
Package Specification
PACKAGE DIMENSIONS IN mm (INCHES) PACKAGE THERMAL DATA
D Lead Count 8 Lead PDIP 8 Lead SO Narrow 14 Lead SO Narrow Metric Max 10.16 5.00 8.75 Min 9.02 4.80 8.55 English Max .400 .197 .344 Min .355 .189 .337
Thermal Data RQJC RQJA typ typ
8L PDIP 52 100
8L SO 45 165
14 L SO 30 125
C/W C/W
PDIP: 300 mil wide
7.11 (.280) 6.10 (.240)
8.26 (.325) 7.62 (.300) 3.68 (.145) 2.92 (.115)
1.77 (.070) 1.14 (.045)
2.54 (.100) BSC
.356 (.014) .203 (.008)
0.39 (.015) MIN. .558 (.022) .356 (.014) Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same.
REF: JEDEC MS-001
D
SO Narrow; 150 mil wide
4.00 (.157) 3.80 (.150)
6.20 (.244) 5.80 (.228)
0.51 (.020) 0.33 (.013)
1.27 (.050) BSC
1.75 (.069) MAX 1.57 (.062) 1.37 (.054) 1.27 (.050) 0.40 (.016) 0.25 (.010) 0.19 (.008) D REF: JEDEC MS-012
0.25 (0.10) 0.10 (.004)
Ordering Information
Part Number CS3845BGN8 CS3845BGD8 CS3845BGDR8 CS3845BGD14 CS3845BGDR14
Rev.11/19/98
0C to 70C * * * * *
Description 8L PDIP 8L SO 8L SO (tape & reel) 14L SO 14L SO (tape & reel) 6
Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information.
(c) 1999 Cherry Semiconductor Corporation


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