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8-BIT SHIFT REGISTER SY10E141 SY100E141 FEATURES s s s s s s s s s s s 700MHz min. shift frequency Extended 100E VEE range of -4.2V to -5.5V 8 bits wide Bi-directional Four selectable modes for full functionality Asynchronous Master Reset Fully compatible with industry standard 10KH, 100K ECL levels Internal 75K input pulldown resistors Fully compatible with Motorola MC10E/100E141 Pin-compatible with E241 Available in 28-pin PLCC package DESCRIPTION The SY10/100E141 are 8-bit, full-function shift registers designed for use in new, high-performance ECL systems. The E141 performs serial/parallel in and serial/parallel out, shifting in either direction. The eight inputs D0-D7 accept parallel input data, while DL/DR accept serial input data for left/right shifting. The two select pins, SEL0 and SEL1 permit four modes of operation: Load, Hold, Shift Left and Shift Right, as shown in the Truth Table. Input data is clocked into the register on the rising clock edge after meeting the minimum set-up time. A logic HIGH on the Master Reset (MR) pin asynchronously resets all the registers to zero. BLOCK DIAGRAM DL BITS 1-6 D DR D0 Q R Q0 D D Q R Q D7 D Q R Q7 SEL1 SEL0 CLK MR Rev.: C Amendment: /1 1 Issue Date: February, 1998 Micrel SY10E141 SY100E141 PIN CONFIGURATION D5 VCCO Q7 SEL0 DL D7 D6 PIN NAMES Pin D0-D7 DL, DR 18 17 Function Parallel Data Inputs Serial Data Inputs Mode Select Inputs Clock Data Outputs Master Reset VCC to Output 25 24 23 22 21 20 19 SEL1 CLK MR VEE DR D0 D1 26 27 28 1 2 3 4 5 6 7 8 9 10 11 Q6 Q5 VCC NC VCCO Q4 Q3 SEL0, SEL1 CLK Q0-Q7 MR VCCO PLCC TOP VIEW J28-1 16 15 14 13 12 TRUTH TABLE Function Load Shift Right Shift Left Hold Reset DL X X X L H X X X DR X L H X X X X X SEL0 L L L H H H H X SEL1 L H H L L H H X MR L L L L L L L H CLK Z Z Z Z Z Z Z X Q0 D0 L H L Q0 Q0 Q0 L Q1 D1 Q0 L Q0 Q1 Q1 Q1 L Q2 D2 Q1 Q0 Q1 Q2 Q2 Q2 L Q3 D3 Q2 Q1 Q2 Q3 Q3 Q3 L Q4 D4 Q3 Q2 Q3 Q4 Q4 Q4 L Q5 D5 Q4 Q3 Q4 Q5 Q5 Q5 L Q6 D6 Q5 Q4 Q5 L L L L Q7 D7 Q6 Q5 L H H H L DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0C Symbol IIH IEE Parameter Input HIGH Current Power Supply Current 10E 100E -- -- 131 131 157 157 -- -- 131 131 157 157 -- -- 131 151 157 181 TA = +25C TA = +85C Max. 150 Unit A mA Condition -- -- Min. Typ. Max. Min. Typ. -- -- 150 -- -- Max. Min. Typ. 150 -- -- D4 VCCO Q0 Q1 Q2 D2 D3 2 Micrel SY10E141 SY100E141 AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0C Symbol fSHIFT tPLH tPHL tS Parameter Max. Shift Frequency Propagation Delay to Output CLK MR Set-up Time D SEL0 SEL1 Hold Time D SEL0 SEL1 Reset Recovery Time Minimum Pulse Width CLK, MR Within-Device Skew Rise/Fall Time 20% to 80% 700 625 600 175 350 300 200 100 100 900 400 -- 300 900 750 725 25 200 150 -25 -200 -150 700 -- 60 525 -- 975 975 -- -- -- -- -- -- -- -- -- 800 TA = +25C 700 625 600 175 350 300 200 100 100 900 400 -- 300 900 750 725 25 200 150 -25 -200 -150 700 -- 60 525 -- 975 975 -- -- -- -- -- -- -- -- -- 800 TA = +85C Max. -- 975 975 ps 175 350 300 200 100 100 900 400 -- 300 25 200 150 -25 -200 -150 700 -- 60 525 -- -- -- ps -- -- -- -- -- -- 800 ps ps ps ps -- -- 1 -- -- -- Unit MHz ps 625 600 750 725 Condition -- -- 700 900 Min. Typ. Max. Min. Typ. Max. Min. Typ. tH tRR tPW tskew tr tf NOTE: 1. Within-device skew is defined as identical transitions on similar paths through a device. PRODUCT ORDERING CODE Ordering Code SY10E141JC SY10E141JCTR SY100E141JC SY100E141JCTR Package Type J28-1 J28-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial Commercial 3 Micrel SY10E141 SY100E141 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 4 |
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