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12-BIT PARITY GENERATOR/CHECKER SY10E160 SY100E160 FEATURES s Provides odd-HIGH parity of 12 inputs s Extended 100E VEE range of -4.2V to -5.5V s s s s s s Output register with Shift/Hold capability 900ps max. D to Q, /Q output Enable control Asynchronous Register Reset Differential outputs Fully compatible with industry standard 10KH, 100K ECL levels s Internal 75K input pulldown resistors s Fully compatible with Motorola MC10E/100E160 s Available in 28-pin PLCC package DESCRIPTION The SY10/100E160 are high-speed, 12-bit parity generator/checkers with differential outputs, for use in new, high-performance ECL systems. The output Q takes on a logic HIGH value only when an odd number of inputs are at a logic HIGH. A logic HIGH on the enable input (EN) forces the output Q to a logic LOW. An additional feature of the E160 is the output register. Two multiplexers and their associated signals control the register input by providing the option of holding present data, loading the new parity data or shifting external data in. To hold the present data, the Hold signal (HOLD) must be at a logic LOW level. If the HOLD signal is at a logic HIGH, the data present at the Q output is passed through the first multiplexer. Taking the Shift signal (SHIFT) to a logic HIGH will shift the data at the S-IN pin into the output register. If the SHIFT signal is at a logic LOW, the output of the first multiplexer is then passed through to the register. The register itself is clocked on the rising edge of CLK1 or CLK2 (or both). The presence of a logic HIGH on the reset pin (R) forces the register output Y to a logic LOW. BLOCK DIAGRAM D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 EN HOLD S-IN SHIFT CLK1 CLK2 R PIN CONFIGURATION Q D4 D3 D2 D1 0 MUX 1 SEL 0 MUX 1 SEL D Y 25 24 23 22 21 20 19 Y R D5 D6 D7 VEE D8 D9 D10 D1 Q EN VCCO 26 27 28 1 2 3 4 5 6 7 8 9 10 11 18 17 Q Q VCC Y Y VCCO NC PLCC TOP VIEW J28-1 16 15 14 13 12 D11 HOLD S-IN SHIFT CLK1 CLK2 R Rev.: D Amendment: /0 1 Issue Date: February, 1998 Micrel SY10E160 SY100E160 PIN NAMES Pin D0-D11 S-IN EN HOLD SHIFT CLK1, CLK2 R Q, Q Y, Y VCCO Function Data Inputs Serial Data Input Enable, active LOW Hold, active LOW Shift, active HIGH Clock Inputs Reset Input Direct Output Register Output VCC to Output TRUTH TABLE Number of HIGH Inputs Even Odd Output Q LOW HIGH DC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0C Symbol IIH Parameter Input HIGH Current CLK1, CLK2 R All Other Inputs Power Supply Current 10E 100E -- -- 82 82 98 98 -- -- 82 82 98 98 -- -- 82 94 98 113 TA = +25C TA = +85C Max. 200 300 150 mA -- Unit A -- -- -- -- -- -- 200 300 150 -- -- -- -- -- -- 200 300 150 -- -- -- -- -- -- Condition -- Min. Typ. Max. Min. Typ. Max. Min. Typ. IEE 2 Micrel SY10E160 SY100E160 AC ELECTRICAL CHARACTERISTICS VEE = VEE (Min.) to VEE (Max.); VCC = VCCO = GND TA = 0C Symbol tPLH tPHL Parameter Propagation Delay to Output D to Q EN to Q CLK to Y R to Y Set-up Time D HOLD S-IN SHIFT Hold Time D HOLD S-IN SHIFT Rise/Fall Time 20% to 80% TA = +25C TA = +85C Max. 950 750 700 725 ps 1200 600 350 500 -400 100 300 200 300 900 300 150 250 -900 -300 -150 -250 450 -- -- -- -- -- -- -- -- 650 1200 600 350 500 -400 100 300 200 300 900 300 150 250 -900 -300 -150 -250 450 -- -- -- -- -- -- -- -- 650 1200 600 350 500 -400 100 300 200 300 900 300 150 250 -900 -300 -150 -250 450 -- -- -- -- ps -- -- -- -- 650 ps -- -- -- Unit ps 400 300 275 275 650 550 500 500 950 750 700 725 400 300 275 275 650 550 500 500 950 750 700 725 400 300 275 275 650 550 500 500 Condition -- Min. Typ. Max. Min. Typ. Max. Min. Typ. tS tH tr tf PRODUCT ORDERING CODE Ordering Code SY10E160JC SY10E160JCTR SY100E160JC SY100E160JCTR Package Type J28-1 J28-1 J28-1 J28-1 Operating Range Commercial Commercial Commercial Commercial 3 Micrel SY10E160 SY100E160 28 LEAD PLCC (J28-1) Rev. 03 MICREL-SYNERGY TEL 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA FAX + 1 (408) 980-9191 + 1 (408) 914-7878 WEB http://www.micrel.com This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc. (c) 2000 Micrel Incorporated 4 |
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