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1-A DC Motor Driver
TLE 4205
Overview Features
q q q q q q
Bipolar IC
Max. driver current 1 A Integrated free-wheeling diodes Short-circuit proof to ground Inhibit ESD protected inputs Temperature range - 40 C Tj 150 C P-DIP-18-3
P-DSO-20-6 Type TLE 4205 TLE 4205 G Description TLE 4205 is an integrated power full-bridge DC-motor driver for a wide temperature range, as required in automotive applications for example. The circuit contains two power comparators that can be combined to a full-bridge circuit. For inductive loads there are integrated free-wheeling diodes to + VS and ground. The outputs are shortcircuit proof up to 18 V supply voltage to ground and turn off when overtemperature occurs. This IC is especially suitable for headlight-beam adjustment in automobiles. Ordering Code Q67000-A9025 Q67006-A9114 Package P-DIP-18-3 P-DSO-20-6
Semiconductor Group
1
1998-02-01
TLE 4205
TLE 4205
TLE 4205 G
Q1
1 2 3 4 5 6 7 8 9
18 17 16 15 14 13 12 11 10
AEP00636
VS
Q2 GND -2 +2 + 1 - 1 INH
GND must be connected to Pin 4
Q2 N.C. N.C. GND GND GND GND - 2 + 2 + 1
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
AEP01318
VS Q1 N.C. GND GND GND GND N.C. NH - 1
Figure 1
Pin Configuration (top view)
Semiconductor Group
2
1998-02-01
TLE 4205
Pin Definitions and Functions Pin No. 1 Symbol Q1 Function Output Q1 of channel 1; push-pull B output with DC short-circuit protection to ground. Integrated free-wheeling diodes to ground and the supply voltage. Supply voltage VS; must be blocked to ground with a ceramic capacitor of at least 100 nF directly on the pins of the IC. Output Q2 of channel 2; see pin 1. Ground Inverting input channel 2; to be wired according to general rules. Non-inverting input channel 2; to be wired according to general rules. Non-inverting input channel 1; see pin 6. Inverting input channel 1; see pin 5. Inhibit; the IC is passive when this pin is open or connected to ground. Ground; must be connected to pin 4.
2 3 4 5 6 7 8 9 10-18
VS
Q2 GND - I2 + I2 + I1 - I1 INH GND
Semiconductor Group
3
1998-02-01
TLE 4205
Pin Definitions and Functions (TLE 4205 G) Pin No. Symbol Function 1 Q2 Output 2 of channel 2; push-pull B output with DC short-circuit protection to ground. Integrated free-wheeling diodes to ground and the supply voltage. Not connected Not connected Ground Inverting input channel 2; to be wired according to general rules. Non-inverting input channel 2; to be wired according to general rules. Non-inverting input channel 1; see pin 9. Inverting input channel 1; see pin 8. Inhibit; the IC is passive when this pin is open or connected to ground. Not connected Ground Not connected Output Q1 of channel 1, see pin 1. Supply voltage VS; must be blocked with a ceramic capacitor of at least 100 nF directly on the pins of the IC.
2 3 4-7 8 9 10 11 12 13 14-17 18 19 20
N.C. N.C. GND - I2 + I2 + I1 - I1 INH N.C. GND N.C. Q1
VS
Semiconductor Group
4
1998-02-01
TLE 4205
VS
2 (20)
T1 7 + 1 (10) 8 - 1 (11)
+ -
1 Q1 (19) T2
9 INH (12)
Power Limiting for T1, T3 Temperature Protection
T3 6 +2 (9) 5 -2 (8)
+ -
3 Q2 (1) T4
(4-7) 4, 10-18 (14-17) GND
AEB00637
Figure 2
Block Diagram
Semiconductor Group
5
1998-02-01
TLE 4205
Circuit Description The IC contains two amplifiers with typical open-loop gain of 80 dB at 500 Hz. The input stages consist of PNP-differential amplifiers. This produces a common-mode input range of 0 V to nearly VS and a maximum differential input voltage of VS. The IC is guarded against ground shorts by an SOA-protective circuit. The output transistors are turned off if the chip temperature exceeds approx. 160 C. The IC can be turned off by an inhibit input, which very much reduces current consumption.
VS
(2)
TLE 4205
+2 (6) 10 k 10 k
-2 - 1
(5) (8)
(1)
Q1
(3)
Q2
+ 1
(7) 10 k
10 k
30 k
10 k
200 k
(9) INH
(4) GND
(10-18) GND
AES00665
Figure 3
Circuit Diagram
Semiconductor Group
6
1998-02-01
TLE 4205
Absolute Maximum Ratings Tj = - 40 to 150 C Parameter Supply voltage Differential input voltage Symbol Limit Values min. max. 45 VS V V - V6-5 or V7-8 TLE 4205 V8-9 or V10-11 TLE 4205 G - - I2 - 0.3 - Unit Remarks
VS VID
Output current Supply current Ground current Input voltage
IQ IS IGND VI
-1 2.5 -3 - 15
1 3 2.5
A A A V
VS
V5; V6; V7; V8
TLE 4205 V8; V9; V10; V11 TLE 4205 G
Inhibit input Junction temperature Storage temperature Operating Range Supply voltage Case temperature Case temperature Thermal resistance junction - ambient junction - case Thermal resistance junction - ambient junction - case
VInh Tj Tstg
- 15 - - 50
VS
150 150
V C C
V9 TLE 4205 V12 TLE 4205G
- -
VS TC TC Rth JA Rth JC Rth JA Rth JC
6 - 40 - 40 - - - -
32 105 95 60 15 65 20
V C C
-
PDmax = 3 W; DIP PDmax = 3 W; SO
K/W TLE 4205 K/W TLE 4205 K/W TLE 4205 G K/W TLE 4205 G
Outputs pin 1 (19) and pin 3 (1) short-circuit proof to GND at VS 18 V for TLE 4205 (TLE 4205G)
Semiconductor Group
7
1998-02-01
TLE 4205
Characteristics 6 V < VS < 18 V; - 40 C < Tj < 150 C Parameter Symbol min. General Open-circuit current consumption Open-circuit current consumption Turn-ON dead time ref. to V9 OFF/ON Limit Values typ. max. Unit Test Condition
IS IS td ON
- - -
10 10 10
30 100 20
mA A s
active, both outputs high inhibit |I1,3| < 1 A TLE 4205 |I1,19| < 1 A TLE 4205 G |I1,3| < 1 A TLE 4205 |I1,19| < 1 A TLE 4205 G
Turn-OFF dead time ref. to V9 OFF/ON
td OFF
-
10
20
s
Open-loop gain Inputs Input zero voltage Input-voltage drift Input zero current Input current Input-current drift Input common-mode range, positive Input common-mode range, negative Power-supply rejection ratio Common-mode rejection ratio
GVO
50
80
-
dB
f = 500 Hz
VIO
VIO/T
- 7.5 - - 75 - 300 - - - - 70
- 20 - - - - - - 80
7.5 30 75 300 5
mV V/K mA nA nA/K
RS = 10 k;
- - - - - -
IIO II
II/T
VIC VIC PSSR CMRR
VS - 2 V
- 0.5 200 - V V/V dB
RS = 10 k;
-
Semiconductor Group
8
1998-02-01
TLE 4205
Characteristics (cont'd) 6 V < VS < 18 V; - 40 C < Tj < 150 C Parameter Symbol min. Outputs Saturation voltage Saturation voltage Forward voltage of free-wheeling diode Forward voltage of free-wheeling diode Slew rate of VQ Inhibit Input Switching threshold high Switching threshold low H-input current L-input current
Note: VSat U = upper VSat L = lower
Limit Values typ. max.
Unit
Test Condition
VSat U VSat L VFU VFL
dVqdtr
- - - - -
1.35 0.8 1 1 0.5
1.5 1.2 1.5 1.5 -
V V V V V/s
IQ = - 0.6 A IQ = 0.6 A IF = 0.6 A IF = 0.6 A;
-
VIH VIL IIH IIH
2 - - -
- - 100 0
- 0.8 - -
V V A A
- -
V9 = 5 V V9 = 0 V
Semiconductor Group
9
1998-02-01
TLE 4205
S 2 NH - 2
VS V9 V5 V6 V8 V7
1000 F 63 V
470 nF
9 5 6 8 7 1
Q1
+ 2 - 1 + 1
TLE 4205
3
RL
Q2
VQ1 VQ2
4, 10-18
GND
AES00638
Figure 4
Test Circuit
13.5 V 2 *) 100 F 100 nF
V NH
9
V+ 1 V- 1
7 8
+ -
Amp 1
1
VQ1
220 nF
1
TLE 4205
-
M 220 nF 1
V- 2 V+ 2
*) Value depends on load current and wiring inductivity
Figure 5
Application Circuit
10 1998-02-01
Semiconductor Group
+
5 6
Amp 2
3
VQ2
4, 10-18
AES00639
TLE 4205
Forward Voltage of the Free-Wheeling Diodes versus Junction Temperature
1.6 V
IED00955
Start Point of the SOAProtection Circuit versus Junction Temperature
2.4 A
IED00956
F = 0.6 A
VFU VFL
VF
1.4
I
2.0
1.2 1.0 0.8 0.6
1.6
V S = 13.5 V
1.2
0.8
0.4
0.2
0.4
0
-40
0
40
80
C
120
0
-40
0
40
80 C
120
TJ
TJ
Saturation Voltage versus Junction Temperature
1.6 V
IED00957
Current Consumption versus Junction Temperature
18 mA 16
IED00958
V Sat
1.4
1.2 1.0
I Q = 600 mA VS = 13.5 V VSat U
IS
14
VS = 13.5 V
12
VSat L
0.8
10 8
0.6 0.4
6 4 2
0.2
0
0
0 40 80 C 120
-40
-40
0
40
80
C 120
TJ
TJ
Semiconductor Group
11
1998-02-01
TLE 4205
Package Outlines P-DIP-18-3 (Plastic Dual In-line Package)
7.6 0.2
0.5 min
~ 1.2 1.5 max 2.54 18 0.45
+0.1
3.5 0.3
4.2 max
0.25 +0.1 6.4 -0.2 7.6 +1.2
0.25 18x 10
1 Index Marking
22.7 -0.2
9
0.4 max
GPD05035
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". Semiconductor Group 12
Dimensions in mm 1998-02-01
TLE 4205
P-DSO-20-6 (Plastic Dual Small Outline Package)
2.65 max
0.35 x 45
+0.09
2.45 -0.2
0.2 -0.1
7.6 -0.2 1)
1.27 0.35
+0.15 2)
0.4 +0.8 0.2 24x 20 11 0.1 10.3 0.3
GPS05094
1 12.8 1) 10 -0.2 Index Marking 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side
Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 13
0.23
8 ma
x
Dimensions in mm 1998-02-01

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