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INTEGRATED CIRCUITS
74F269 8-bit bidirectional binary counter
Product specification IC15 Data Handbook 1996 Jan 05
Philips Semiconductors
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
FEATURES
* Synchronous counting and loading * Built-in look-ahead carry capability * Count frequency 115MHz typ * Supply current 95mA typ
DESCRIPTION
The 74F269 is a fully synchronous 8-stage Up/Down Counter featuring a preset capability for programmable operation, carry look-ahead for easy cascading and a U/D input to control the direction of counting. All state changes, whether in counting or parallel loading, are initiated by the rising edge of the clock. TYPICAL SUPPLY CURRENT (TOTAL) 95mA
PIN CONFIGURATION
U/D 1 Q0 Q1 Q2 Q3 Q4 GND Q5 Q6 2 3 4 5 6 7 8 9 24 PE 23 P0 22 P1 21 P2 20 P3 19 VCC 18 P4 17 P5 16 P6 15 P7 14 TC 13 CET
Q7 10 CP 11 CEP 12
TYPE 74F269
TYPICAL fMAX 115MHz
SF00834
ORDERING INFORMATION
DESCRIPTION 24-Pin Plastic Slim DIP (300mil) 24-Pin Plastic SOL 24-Pin Plastic SSOP type II COMMERCIAL RANGE VCC = 5V 10%, Tamb = 0C to +70C N74F269N N74F269D N74F269DB PKG DWG # SOT222-1 SOT137-1 SOT340-1
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS P0 - P7 PE U/D CEP CET CP TC Q0 - Q7 Parallel Data inputs Parallel Enable input (active Low) Up/Down count control input Count Enable Parallel input (active Low) Count Enable Trickle input (active Low) Clock input Terminal Count output (active Low) Flip-flop outputs DESCRIPTION 74F(U.L.) HIGH/LOW 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 1.0/1.0 50/33 50/33 LOAD VALUE HIGH/LOW 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 20A/0.6mA 1.0mA/20mA 1.0mA/20mA
NOTE: One (1.0) FAST Unit Load is defined as: 20A in the High state and 0.6mA in the Low state.
1996 Jan 05
2
853-0056 16186
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
LOGIC SYMBOL
LOGIC SYMBOL (IEEE/IEC)
CTR DIV 256 24 1 12 13 & EN6 2, 3, 5, 6 +/C7 2, 4, 5, 6- 2 3 4 5 6 8 9 10 14 G5 M1[LOAD] M2[COUNT] M3[UP] M4[DOWN]
23
22
21
20
18
17
16
15
P0 24 1 12 13 11 PE U/D CEP CET CP Q0
P1
P2
P3
P4
P5
P6
P7
11
23 TC 14 22 21 20 Q1 Q2 Q3 Q4 Q5 Q6 Q7 18 17 2 3 4 5 6 8 9 10 16 15
1, 7D [1] [2] [4] [8] [16] [32] [64] [128] 3, 5, 6 CT=256 4, 5, 8 CT=0
VCC=Pin 19 GND=Pin 7
SF00835
SF00836
APPLICATION
CP U/D PE
P0 P1 P2 P3 P4 P5 P6 P7 PE U/D CP CEP TC
P0 P1 P2 P3 P4 P5 P6 P7 PE U/D CP TC CEP CET Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
P0 P1 P2 P3 P4 P5 P6 P7 PE U/D CP TC CEP CET Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
P0 P1 P2 P3 P4 P5 P6 P7 PE U/D CP TC CEP CET Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
CET Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
Least significant 8-bit counter
Most significant 8-bit counter SF00851
Figure 1. Synchronous Multistage Counting Scheme
MODE SELECT FUNCTION TABLE
INPUTS CP H= h= L= l= q= X= = (a) = U/D X X h l X X CEP X X l l h X CET X X l l l h PE l l h h h h Pn l h X X X X OUTPUTS Qn L H Count Up Count Down qn qn TC (a) (a) (a) (a) (a) H OPERATING MODE Parallel load Count Up Count Down Hold (do nothing)
High voltage level High voltage level one setup prior to the Low-to-High clock transition Low voltage level Low voltage level one setup time prior to the Low-to-High clock transition Lower case letters indicate the state of the referenced output prior to the Low-to-High clock transition Don't care Low-to-High clock transition TC is Low when CET is Low and the counter is at Terminal Count. Terminal Count Up is with all Qn outputs High and Terminal Count Down is with all Qn outputs Low.
1996 Jan 05
3
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
LOGIC DIAGRAM
2 P0 23 DETAIL A
Q0
P1
22
3 DETAIL A
Q1
P2
21
DETAIL A
4 Q2
P3
20
5 DETAIL A
Q3
6 P4 18 DETAIL A
Q4
P5
17
8 DETAIL A
Q5
9 P6 16 DETAIL A
Q6
10 P7 15 DETAIL A
Q7
PE 24 CP 11 1
U/D
CEP 12 CET 13
14 TOGGLE DETAIL A Pn
TC
D CP
Q Q
PE VCC=Pin 19 GND=Pin 7
CP
SF00837
1996 Jan 05
4
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.) SYMBOL VCC VIN IIN VOUT IOUT Tamb Tstg Supply voltage Input voltage Input current Voltage applied to output in High output state Current applied to output in Low output state Operating free-air temperature range Storage temperature PARAMETER RATING -0.5 to +7.0 -0.5 to +7.0 -30 to +5 -0.5 to VCC 40 0 to +70 -65 to +150 UNIT V V mA V mA C C
RECOMMENDED OPERATING CONDITIONS
LIMITS SYMBOL VCC VIH VIL IIK IOH IOL Tamb Supply voltage High-level input voltage Low-level input voltage Input clamp current High-level output current Low-level output current Operating free-air temperature range 0 PARAMETER MIN 4.5 2.0 0.8 -18 -1 20 70 NOM 5.0 MAX 5.5 V V V mA mA mA C UNIT
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.) LIMITS SYMBOL PARAMETER TEST CONDITIONSNO TAG VCC = MIN, VIL = MAX VIH = MIN, IOH = MAX Low-level Low level output voltage Input clamp voltage Input current at maximum input voltage High-level input current Low-level input current Short-circuit output currentNO TAG ICCH ICC Supply current (total) ICCL VCC = MIN, VIL = MAX VIH = MIN, IOL = MAX VCC = MIN, II = IIK VCC = MAX, VI = 7.0V VCC = MAX, VI = 2.7V VCC = MAX, VI = 0.5V VCC = MAX VCC = MAX PE=CET=CEP=U/D=GND, Pn=4.5V, CP= PE=CET=CEP=U/D=GND, Pn=GND, CP= -60 93 98 10%VCC 5%VCC 10%VCC 5%VCC MIN 2.5 V 2.7 3.4 0.30 0.30 -0.73 0.50 V 0.50 -1.2 100 20 -0.6 -150 120 125 V A A mA mA mA mA TYP
NO TAG
MAX
UNIT
VO OH
High-level High level output voltage
VO OL VIK II IIH IIL IOS
NOTES: 1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type. 2. All typical values are at VCC = 5V, Tamb = 25C. 3. Not more than one output should be shorted at a time. For testing IOS, the use of high-speed test apparatus and/or sample-and-hold techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, IOS tests should be performed last. 1996 Jan 05 5
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
AC ELECTRICAL CHARACTERISTICS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C VCC = +5V CL = 50pF, RL = 500 MIN fMAX tPLH tpPHL tPLH tPHL tPLH tPHL tPLH tPHL tPLH tPHL Maximum clock frequency Propagation delay CP to Qn (Load, PE = Low) Propagation delay CP to Qn (Count, PE = High) Propagation delay CP to TC Propagation delay CET to TC Propagation delay U/D to TC Waveform 1 Waveform 1 Waveform 1 Waveform 1 Waveform 2 Waveform 3 100 3.0 4.0 3.0 4.5 4.5 5.0 3.5 3.0 4.5 4.5 TYP 115 6.0 6.5 6.0 7.0 6.5 6.5 6.0 6.5 7.0 7.0 8.5 8.5 9.0 10.0 9.5 9.5 9.0 9.0 9.0 9.5 MAX Tamb = 0C to +70C VCC = +5V 10% CL = 50pF, RL = 500 MIN 85 3.0 4.0 3.0 4.0 4.0 5.0 3.0 3.0 4.0 4.0 9.0 9.0 10.0 10.5 10.5 10.0 10.0 10.0 10.0 10.0 MAX MHz ns ns ns ns ns ns ns ns ns ns UNIT
AC SETUP REQUIREMENTS
LIMITS SYMBOL PARAMETER TEST CONDITIONS Tamb = +25C VCC = +5V CL = 50pF, RL = 500 MIN ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) ts(H) ts(L) th(H) th(L) tw(H) tw(L) Setup time, High or Low Pn to CP Hold time, High or Low Pn to CP Setup time, High or Low PE to CP Hold time, High or Low PE to CP Setup time, High or Low CEP or CET to CP Hold time, High or Low CEP or CET to CP Setup time, High or Low U/D to CP Hold time, High or Low U/D to CP CP Pulse width High or Low Waveform 4 Waveform 4 Waveform 4 Waveform 4 Waveform 5 Waveform 5 Waveform 6 Waveform 6 Waveform 1 3.5 3.5 1.0 1.0 5.5 6.5 0 0 6.0 8.0 0 0 8.0 6.5 0 0 4.0 4.5 TYP Tamb = 0C to +70C VCC = +5V 10% CL = 50pF, RL = 500 MIN 2.5 2.5 0 1.0 5.5 6.5 0 0 5.0 6.5 0 0 6.5 6.5 0 0 4.0 5.0 MAX ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns UNIT
1996 Jan 05
6
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
TIMING DIAGRAM
PE P0 P1 P2 P3 P4 P5 P6 P7 CP U/D CEP AND CET Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 TC 253 SEQUENCE LOAD 254 255 0 1 2 INHIBIT 2 1 0 255 254 253
COUNT UP
COUNT DOWN
SF00838B
1996 Jan 05
7
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/fMAX CET CP VM tW(H) tPLH VM Qn tPHL VM tPLH VM tW(L) tPHL VM TC VM tPHL VM tPLH VM VM VM
SF00792
TC
VM
Waveform 2. Propagation Delay, CET Input to Terminal Count Output
SF00791A
Waveform 1. Propagation Delay, Clock Input to Output, Clock Pulse Width, and Maximum Clock Frequency
Pn U/D VM tPHL TC VM VM tPLH VM PE VM ts(L)
VM ts VM
VM th VM th = 0 ts(H) VM th = 0
SF00793
Waveform 3. Propagation Delay, Up/Down Count Control Input to Terminal Count Output
CP
VM
VM
SF00844
Waveform 4. Parallel Data and Parallel Enable Setup and Hold Times
CET VM CEP ts(L) th(L) ts(H) th(H) ts(L) th ts(H) th VM VM VM U/D VM VM VM VM
CP
VM
VM
CP
VM
VM
Qn
COUNT
NO CHANGE
Qn
COUNT DOWN
COUNT UP
SF00842
SF00839
Waveform 5. Count Enables Setup and Hold Times
Waveform 6. Up/Down Count Control Setup and Hold Times
1996 Jan 05
8
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
TEST CIRCUIT AND WAVEFORMS
VCC NEGATIVE PULSE VIN PULSE GENERATOR RT D.U.T. VOUT 90% VM 10% tTHL (tf ) CL RL tw VM 10% tTLH (tr ) 0V 90% AMP (V)
tTLH (tr ) 90% POSITIVE PULSE VM 10% tw
tTHL (tf ) AMP (V) 90% VM 10% 0V
Test Circuit for Totem-Pole Outputs DEFINITIONS: RL = Load resistor; see AC ELECTRICAL CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance; see AC ELECTRICAL CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators.
Input Pulse Definition INPUT PULSE REQUIREMENTS family amplitude VM 74F 3.0V 1.5V rep. rate 1MHz tw 500ns tTLH 2.5ns tTHL 2.5ns
SF00006
1996 Jan 05
9
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
DIP24: plastic dual in-line package; 24 leads (300 mil)
SOT222-1
1996 Jan 05
10
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
SO24: plastic small outline package; 24 leads; body width 7.5 mm
SOT137-1
1996 Jan 05
11
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
SSOP24: plastic shrink small outline package; 24 leads; body width 5.3 mm
SOT340-1
1996 Jan 05
12
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
NOTES
1996 Jan 05
13
Philips Semiconductors
Product specification
8-bit bidirectional binary counter
74F269
DEFINITIONS
Data Sheet Identification
Objective Specification
Product Status
Formative or in Design
Definition
This data sheet contains the design target or goal specifications for product development. Specifications may change in any manner without notice. This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product. This data sheet contains Final Specifications. Philips Semiconductors reserves the right to make changes at any time without notice, in order to improve design and supply the best possible product.
Preliminary Specification
Preproduction Product
Product Specification
Full Production
Philips Semiconductors and Philips Electronics North America Corporation reserve the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. LIFE SUPPORT APPLICATIONS Philips Semiconductors and Philips Electronics North America Corporation Products are not designed for use in life support appliances, devices, or systems where malfunction of a Philips Semiconductors and Philips Electronics North America Corporation Product can reasonably be expected to result in a personal injury. Philips Semiconductors and Philips Electronics North America Corporation customers using or selling Philips Semiconductors and Philips Electronics North America Corporation Products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors and Philips Electronics North America Corporation for any damages resulting from such improper use or sale. Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088-3409 Telephone 800-234-7381 Philips Semiconductors and Philips Electronics North America Corporation register eligible circuits under the Semiconductor Chip Protection Act. (c) Copyright Philips Electronics North America Corporation 1996 All rights reserved. Printed in U.S.A. (print code) Document order number: Date of release: July 1994 9397-750-05112

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