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5-V Low Drop Voltage Regulator TLE 4262 Bipolar IC Features q q q q q q q q q Output voltage tolerance 2 % Low-drop voltage Very low standby current consumption Overtemperature protection Reverse polarity protection Short-circuit proof Settable reset threshold Wide temperature range Suitable for use in automotive electronics Ordering Code Package Q67006-A9068 P-DSO-20-6 (SMD) P-DSO-14-4 (SMD) P-DSO-20-6 Type TLE 4262 G w TLE 4262 GM Q67006-A9356 w New type P-DSO-14-4 Functional Description TLE 4262 G is a 5-V low-drop voltage regulator in a P-DSO-20-6 SMD package. The maximum input voltage is 45 V. The maximum output current is more than 200 mA. The IC is short-circuit proof and incorporates temperature protection that disables the IC at overtemperature. The IC regulates an input voltage VI in the range of 6 V < VI < 45 V to VQrated = 5.0 V. A reset signal is generated for an output voltage of VQ < 4.5 V. This voltage threshold can be decreased to 3.5 V by external connection. The reset delay can be set externally with a capacitor. The IC can be switched off via the inhibit input, which causes the current consumption to drop from 720 A to < 50 A. Semiconductor Group 1 1998-11-01 TLE 4262 Dimensioning Information on External Components The input capacitor CI is necessary for compensating line influences. Using a resistor of approx. 1 in series with CI, the oscillating circuit consisting of input inductivity and input capacitance can be damped. The output capacitor is necessary for the stability of the regulating circuit. Stability is guaranteed at values 22 F and an ESR of 3 within the operating temperature range. For small tolerances of the reset delay, the spread of the capacitance of the dalay capacitor and its temperature coefficient should be noted. Pin Configuration (top view) TLE 4262 G TLE 4262 GM INH QRES GND GND GND DRES SRES 1 2 3 4 5 6 7 14 13 12 11 10 9 8 AEP02588 V N.C. GND GND GND N.C. VQ Semiconductor Group 2 1998-11-01 TLE 4262 Pin Definitions and Functions Pin 1 2 4-7, 14-17 9 10 Symbol INH QRES GND DRES SRES Function Inhibit; TTL-compatible, low-active input Reset output; open-collector output internally connected to the output via a resistor of 30 k. Ground Reset delay; connected to ground by a capacitor Reset threshold; for setting the switching threshold connect by a voltage divider from output to ground. If this input is connected to GND, reset is triggered at an output voltage of 4.5 V. 5-V output voltage; block to ground by a 22-F capacitor. Input voltage; block to ground directly at the IC by a ceramic capacitor. Not connected 11 20 3, 8, 12, 13, 18, 19 VQ VI N.C. Semiconductor Group 3 1998-11-01 TLE 4262 Circuit Description The control amplifier compares a reference voltage, which is kept highly accurate by resistance adjustment, to a voltage that is proportional to the output voltage and drives the base of the series transistor via a buffer. Saturation control as a function of the load current prevents any over-saturation of the power element. If the externally scaled down output voltage at the reset threshold input drops below 1.35 V, the external reset delay capacitor is discharged by the reset generator. If the voltage on the capacitor reaches the lower threshold VST, a reset signal is issued on the reset output and not cancelled again until the upper threshold VdT is exceeded. If the reset threshold input is connected to GND, reset is triggered at an output voltage of 4.5 V. The IC can be switched at the TTL-compatible, low-active inhibit input. It also incorporates a number of internal circuits for protection against: q q q Overload Overtemperature Reverse polarity Block Diagram Semiconductor Group 4 1998-11-01 TLE 4262 Absolute Maximum Ratings Parameter Symbol Limit Values min. max. Unit Remarks Input Input voltage Input current VI II - 42 - 45 - V - - internally limited Reset Output Voltage Current VR IR - 0.3 - 42 - V - - internally limited Reset Input Reset threshold VRE - 0.3 6 V - Reset Delay Voltage Current Vd Id - 0.3 - 42 - V - - internally limited Output Voltage Current VQ IQ - 5.25 - VI - V - - internally limited Inhibit Voltage Ve - 42 45 V - Ground Current Semiconductor Group IGND - 0.5 5 - A - 1998-11-01 TLE 4262 Absolute Maximum Ratings (cont'd) Parameter Symbol Limit Values min. max. Unit Remarks Temperature Junction temperature Storage temperature Tj Tstg - - 50 150 150 C C - - Operating Range Input voltage Junction temperature Thermal resistance junction-ambient junction-case *) VI Tj Rth JA Rth JC 5.2 - 40 - - 45 150 70 25 V C *) - K/W soldered K/W - Corresponds with characteristics of drop voltage, output current and power description (see diagrams). Semiconductor Group 6 1998-11-01 TLE 4262 Characteristics VI = 13.5 V; Tj = 25 C; Ve > 3.5 V; (unless specified otherwise) Parameter Symbol Limit Values min. Normal Operation Output voltage typ. max. Unit Test Condition VQ 4.9 5.00 5.10 V 5 mA IQ 150 mA; 6 V VI 28 V; - 40 C Tj 125 C 6 V VI 32 V; IQ = 100 mA Tj > 100 C - Output voltage VQ 4.95 5.00 5.05 V Output current limiting Current consumption; Iq = Ii - IQ IQ Iq Iq Iq Iq 200 - - - - - - - - 250 - 720 10 15 0.35 - 15 54 50 - 15 20 0.6 25 25 - mA A A mA mA V mV mV dB Ve < 0.8 V IQ = 0 mA IQ = 150 mA IQ = 150 mA; Vi = 4.5 V IQ = 150 mA *) IQ = 5 mA to 150 mA VI = 6 V to 28 V; IQ = 150 mA fr = 100 Hz; Vr = 0.5 Vpp Drop voltage Load regulation Supply-voltage regulation Ripple rejection VDr VQ VQ SVR Reset Generator Switching threshold Switching voltage Saturation voltage *) VRT VRE VR 4.2 1.28 - 4.5 1.35 0.10 4.8 1.42 0.40 V V V VRE = 0 V VQ > 3.5 V IR = 1 mA Drop voltage VI 4.5 V; drop voltage = VI - VQ (below regulating range) Note: The reset output is low within the range VQ = 1 V to VRT. Semiconductor Group 7 1998-11-01 TLE 4262 Characteristics (cont'd) VI = 13.5 V; Tj = 25 C; Ve > 3.5 V; (unless specified otherwise) Parameter Symbol Limit Values min. Saturation voltage Charge current Delay switching threshold Switching threshold Delay time Delay time Inhibit Switch-ON voltage Switch-OFF voltage Input current typ. 50 10 1.7 0.35 17 2 max. 100 14 2.1 0.55 - - mV A V V ms s Unit Test Condition VC Id VdT VST tD tt - 7 1.5 0.2 - - VQ < VRT - - - Cd = 100 nF Cd = 100 nF Ve ON Ve OFF Ie 3.5 - 5 - - 10 - 0.8 15 V V A IC turned on IC turned off Ve = 5 V Note: The reset output is low within the range VQ = 1 V to VRT. Semiconductor Group 8 1998-11-01 TLE 4262 Input 6 V...45 V 470 nF KL15 Reset to MC 20 1 11 9 Output 22 F 100 nF 100 k TLE 4262G 2 4 10 56 k AES01084 Application Circuit 1000 F 20 470 nF TLE 4262G 11 Q 22 F 5.6 k e 1 V + Vr V 9 2R d 4 10 VQ VR Ve Cd 100 nF GND V cd V Dr = V - V Q *) Vr SVR = 20 log V Q *) Below Regulating Range AES01082 Test Circuit Semiconductor Group 9 1998-11-01 TLE 4262 V V Q V RT dV d = dt C d Vcd V dT V ST td tt VR Power-on-Reset Overtemperature Voltage Drop Undervoltage at Input Secondary Spike Load Bounce AET01085 Time Response Semiconductor Group 10 1998-11-01 TLE 4262 G Charge Current versus Temperature 16 A d 14 12 10 8 6 4 2 0 -40 AED01086 Switching Voltage VdT and VST versus Temperature 3.2 V V 2.8 AED01087 V = 13.5 V d V = 13.5 V V cd = 1.5 V 2.4 2.0 1.6 1.2 0.8 V dT , V cd V ST 0.4 0 40 80 120 C 160 Tj 0 -40 0 40 80 120 C 160 Tj Reset Switching Threshold versus Temperature AED01088 Current Consumption of Inhibit versus Temperature Output Current 12 AED01089 1.6 V V RE 1.4 1.2 e A 10 8 1.0 0.8 0.6 0.4 2 6 Ve = 5 V 4 0.2 0 -40 0 -40 0 40 80 120 C 160 Tj 0 40 80 120 C 160 Tj Semiconductor Group 11 1998-11-01 TLE 4262 G Output Voltage versus Temperature 5.2 AED01090 Output Current versus Input Voltage 300 AED01091 VQ V 5.1 Q mA 250 T j = 25 C 5.0 200 Ve = 13.5 V 4.9 150 4.8 100 4.7 50 4.6 -40 0 0 40 80 120 C 160 Tj 0 10 20 30 40 V 50 V Input Response Load Response V 2 V 1 0 AED01092 _ t r = t f ~ 1 s 295 mA Q 150 5 AED01093 40 mV V Q 20 0 -20 -40 -10 C Q = 22 F 200 mV V Q 100 0 -100 C Q = 22 F 0 10 20 30 40 s 50 -200 -10 0 10 20 30 40 s 50 t t Semiconductor Group 12 1998-11-01 TLE 4262 Drop Voltage versus Output Current 800 mV V Dr 700 600 500 400 300 200 100 0 AED01094 Current Consumption versus Output Current 32 mA q 28 24 20 AED01095 T j = 125 C 25 C 16 12 8 4 V = 13.5 V 0 50 100 150 200 mA Q 300 0 0 50 100 150 200 mA Q 300 Current Consumption versus Input Voltage 30 AED01096 Output Voltage versus Input Voltage 12 AED01097 q mA 25 VQ V 10 20 R L = 25 8 15 6 R L = 25 10 4 5 2 0 0 10 20 30 40 V 50 V 0 0 2 4 6 8 V 10 V Semiconductor Group 13 1998-11-01 TLE 4262 Package Outlines P-DSO-20-6 (Plastic Dual Small Outline) 0.35 x 45 2.65 max 2.45 -0.2 0.2 -0.1 1.27 0.35 +0.15 2) 20 0.2 24x 11 0.1 0.4 +0.8 10.3 0.3 GPS05094 1 12.8 1) 10 -0.2 Index Marking 1) Does not include plastic or metal protrusions of 0.15 max per side 2) Does not include dambar protrusion of 0.05 max per side Weight approx. 0.6 g Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 14 0.23 +0.0 9 8 ma x 7.6 -0.2 1) Dimensions in mm 1998-11-01 TLE 4262 P-DSO-14-4 (Plastic Dual Small Outline) 0.35 x 45 1.75 max 1.45 -0.2 0.19 +0.06 0.2 -0.1 4 -0.2 1) 1.27 0.35 +0.15 2) 14 0.1 0.2 14x 6 0.2 8 0.4 +0.8 1 7 8.75 -0.21) Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Does not include dambar protrusion of 0.05 max. per side GPS05093 Sorts of Packing Package outlines for tubes, trays etc. are contained in our Data Book "Package Information". SMD = Surface Mounted Device Semiconductor Group 15 8 max. Dimensions in mm 1998-11-01 |
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