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CMOS 3 V/5 V, Wide Bandwidth Quad 2:1 Mux ADG774
FUNCTIONAL BLOCK DIAGRAM
ADG774
S1A D1 S1B S2A D2 S2B S3A D3 S3B S4A D4 S4B 1 OF 2 DECODER
FEATURES Low Insertion Loss and On Resistance: 4 Typical On-Resistance Flatness <2 Bandwidth >200 MHz Single 3 V/5 V Supply Operation Rail-to-Rail Operation Very Low Distortion: <1% Low Quiescent Supply Current (100 nA Typical) Fast Switching Times tON 10 ns tOFF 4 ns TTL/CMOS Compatible APPLICATIONS 10/100 Base-TX/T4 100VG-AnyLAN Token Ring 4 Mbps/16 Mbps ATM25/155 NIC Adapter and Hubs Audio and Video Switching Relay Replacement GENERAL DESCRIPTION
EN
IN
The ADG774 is a monolithic CMOS device comprising four 2:1 multiplexer/demultiplexers with high impedance outputs. The CMOS process provides low power dissipation yet gives high switching speed and low on resistance. The on-resistance variation is typically less than 0.5 with an input signal ranging from 0 V to 5 V. The bandwidth of the ADG774 is greater than 200 MHz and this, coupled with low distortion (typically 0.5%), makes the part suitable for switching fast ethernet signals. The on-resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. Fast switching speed, coupled with high signal bandwidth, also makes the parts suitable for video signal switching. CMOS construction ensures ultralow power dissipation making the parts ideally suited for portable and battery powered instruments. The ADG774 operates from a single 3.3 V/5 V supply and is TTL logic compatible. The control logic for each switch is shown in the Truth Table.
These switches conduct equally well in both directions when ON, and have an input signal range that extends to the supplies. In the OFF condition, signal levels up to the supplies are blocked. The ADG774 switches exhibit break-before-make switching action.
PRODUCT HIGHLIGHTS
1. Wide bandwidth data rates >200 MHz. 2. Ultralow Power Dissipation. 3. Extended Signal Range. The ADG774 is fabricated on a CMOS process giving an increased signal range that fully extends to the supply rails. 4. Low leakage over temperature. 5. Break-Before-Make Switching. This prevents channel shorting when the switches are configured as a multiplexer. 6. Crosstalk is typically -70 dB @ 30 MHz. 7. Off isolation is typically -60 dB @ 10 MHz.
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Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1998
ADG774-SPECIFICATIONS
SINGLE SUPPLY (V
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tD Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB Distortion Charge Injection CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 0.001 IIN IO
NOTES 1 Temperature ranges are as follows: B Version, -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
DD
= +5 V
10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
B Version TMIN to +25 C TMAX 0 V to VDD 2.2 5 0.15 0.5 0.5 1 0.01 0.5 0.01 0.5 0.01 0.5
Units V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min dB typ dB typ MHz typ % typ pC typ pF typ pF typ pF typ
Test Conditions/Comments
VD = 0 V to V DD, IS = -10 mA VD = 0 V to VDD, IS = -10 mA VD = 0 V to VDD; IS = -1 mA
1 1 1 2.4 0.8
VD = 4.5 V, VS = 1 V; VD = 1 V, VS = 4.5 V; Test Circuit 2 VD = 4.5 V, VS = 1 V; VD = 1 V, VS = 4.5 V; Test Circuit 2 VD = VS = 4.5 V; VD = VS = 1 V; Test Circuit 3
0.001
0.5 10 20 4 8 5 1 -65 -75 240 0.5 10 10 20 30
VIN = VINL or VINH
RL = 100 , CL = 35 pF, VS = +3 V; Test Circuit 4 RL = 100 , CL = 35 pF, VS = +3 V; Test Circuit 4 RL = 100 , CL = 35 pF, VS1 = VS2 = +5 V; Test Circuit 5 RL = 100 , f = 10 MHz; Test Circuit 7 RL = 100 , f = 10 MHz; Test Circuit 8 RL = 100 ; Test Circuit 6 RL = 100 CL = 1 nF; Test Circuit 9 f = 1 kHz f = 1 kHz f = 1 MHz VDD = +5.5 V Digital Inputs = 0 V or VDD VIN = +5 V VS/VD = 0 V
1 1 100
A max A typ A typ mA max
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ADG774 SINGLE SUPPLY
Parameter ANALOG SWITCH Analog Signal Range On Resistance (RON) On Resistance Match Between Channels (RON) On Resistance Flatness (RFLAT(ON)) LEAKAGE CURRENTS Source OFF Leakage IS (OFF) Drain OFF Leakage ID (OFF) Channel ON Leakage ID, IS (ON) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current IINL or IINH DYNAMIC CHARACTERISTICS2 tON tOFF Break-Before-Make Time Delay, tD Off Isolation Channel-to-Channel Crosstalk Bandwidth -3 dB Distortion Charge Injection CS (OFF) CD (OFF) CD, CS (ON) POWER REQUIREMENTS IDD 0.001 IIN IO
NOTES 1 Temperature ranges are as follows: B Version, -40C to +85C. 2 Guaranteed by design, not subject to production test. Specifications subject to change without notice.
(VDD = +3 V
10%, GND = 0 V. All specifications TMIN to TMAX unless otherwise noted.)
B Version TMIN to +25 C TMAX 0 V to VDD 4 8 0.15 2 0.5 4 0.01 0.5 0.01 0.5 0.01 0.5
Units V typ max typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max ns typ ns max ns typ ns max ns typ ns min dB typ dB typ MHz typ % typ pC typ pF typ pF typ pF typ
Test Conditions/Comments
VD = 0 V to V DD, IS = -10 mA VD = 0 V to VDD, IS = -10 mA VD = 0 V to VDD, IS = -10 mA
1 1 1 2.0 0.4
VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; Test Circuit 2 VD = 3 V, VS = 1 V; VD = 1 V, VS = 3 V; Test Circuit 2 VD = VS = 3 V; VD = VS = 1 V; Test Circuit 3
0.001
0.5 12 25 5 10 5 1 -65 -75 240 2 3 10 20 30
VIN = VINL or VINH
RL = 100 , CL = 35 pF, VS = +1.5 V; Test Circuit 4 RL = 100 , CL = 35 pF, VS = +1.5 V; Test Circuit 4 RL = 100 , CL = 35 pF, VS1 = VS2 = 3 V; Test Circuit 5 RL = 50 , f = 10 MHz; Test Circuit 7 RL = 50 , f = 10 MHz; Test Circuit 8 RL = 50 ; Test Circuit 6 RL = 50 CL = 1 nF; Test Circuit 9 f = 1 kHz f = 1 kHz f = 1 MHz VDD = +3.3 V Digital Inputs = 0 V or VDD VIN = +3 V VS/VD = 0 V
1 1 100
A max A typ A typ mA max
Table I. Truth Table
EN 1 0 0 REV. 0
IN X 0 1
D1 Hi-Z S1A S1B
D2 Hi-Z S2A S2B
D3 Hi-Z S3A S3B -3-
D4 Hi-Z S4A S4B
Function DISABLE IN = 0 IN = 1
ADG774
ABSOLUTE MAXIMUM RATINGS 1
(TA = +25C unless otherwise noted)
TERMINOLOGY
VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V to +6 V Analog, Digital Inputs2 . . . . . . . . . . . -0.3 V to VDD + 0.3 V or 30 mA, Whichever Occurs First Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . 100 mA Peak Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . 300 mA (Pulsed at 1 ms, 10% Duty Cycle max) Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . . -40C to +85C Storage Temperature Range . . . . . . . . . . . . . -65C to +150C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . +150C SOIC Package, Power Dissipation . . . . . . . . . . . . . . . . 600 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 100C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C QSOP Package, Power Dissipation . . . . . . . . . . . . . . . 566 mW JA Thermal Impedance . . . . . . . . . . . . . . . . . . . 149.97C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . . +215C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . . +220C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 kV
NOTES 1 Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time. 2 Overvoltages at IN, S or D will be clamped by internal diodes. Current should be limited to the maximum ratings given.
PIN CONFIGURATION (SOIC/QSOP)
VDD EN S4A
IN 1 S1A
2
16 15 14
S1B 3
4
S4B D1 TOP VIEW S2A 5 (Not to Scale) 12 D4
13
ADG774
S2B 6 D2 7 GND 8
11 10 9
S3A S3B D3
Most Positive Power Supply Potential. Ground (0 V) Reference. Source Terminal. May be an input or output. Drain Terminal. May be an input or output. Logic Control Input. Logic Control Input. Ohmic resistance between D and S. On Resistance match between any two channels i.e., RON max - RON min. RFLAT(ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (OFF) Source Leakage Current with the switch "OFF." ID (OFF) Drain Leakage Current with the switch "OFF." ID, IS (ON) Channel Leakage Current with the switch "ON." VD (VS) Analog Voltage on Terminals D, S. CS (OFF) "OFF" Switch Source Capacitance. CD (OFF) "OFF" Switch Drain Capacitance. CD, CS (ON) "ON" Switch Capacitance. tON Delay between applying the digital control input and the output switching on. See Test Circuit 4. tOFF Delay between applying the digital control input and the output switching Off. tD "OFF" time or "ON" time measured between the 90% points of both switches, when switching from one address state to another. See Test Circuit 5. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. Off Isolation A measure of unwanted signal coupling through an "OFF" switch. Bandwidth Frequency response of the switch in the ON state measured at 3 dB down. Distortion RFLAT(ON)/RL
VDD GND S D IN EN RON RON
ORDERING GUIDE
Model ADG774BR ADG774BRQ
Temperature Range -40C to +85C -40C to +85C
Package Descriptions R = 0.15" Small Outline IC (SOIC) RQ = 0.15" Quarter Size Outline Package (QSOP)
Package Options R-16A RQ-16
CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the ADG774 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
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Typical Performance Characteristics-ADG774
5.0 4.5 4.0 ON RESPONSE - dB 3.5 3.0 RON - 2.5 2.0 1.5 1.0 0.5 0 1.3 2.5 3.7 VS OR VD DRAIN OR SOURCE VOLTAGE - V 4.9 -6 10k VDD = +4.5V VDD = +5.0V VDD = +3.0V -2 VDD = +2.7V VDD = +5V TA = +25 C 0
-4
100k
1M 10M FREQUENCY - Hz
100M
Figure 1. On Resistance as a Function of VD (V S) for Various Single Supplies
Figure 4. On Response vs. Frequency
3.0 VDD = +5V
0 -10 VDD = +5V RL = 100
2.5 -20 2.0 RON - ATTENUATION - dB 4.9 +85 C -30 -40 -50 -60 -70 -80 -90 0 1.3 2.5 3.7 VS OR VO DRAIN OR SOURCE VOLTAGE - V -100 100k
1.5
+25 C -40 C
1.0
0.5
1M
10M FREQUENCY - Hz
100M
1G
Figure 2. On Resistance as a Function of VD (VS) for Different Temperatures with 5 V Single Supplies
Figure 5. Off Isolation vs. Frequency
4.5 VDD = +3V 4.0 3.5 3.0 RON - 2.5 -40 C 2.0 1.5 1.0 0.5 0 0.6 1.1 1.6 2.1 2.6 VS OR VD DRAIN OR SOURCE VOLTAGE - V +25 C ATTENUATION - dB
0 -10 +85 C -20 -30 -40 -50 -60 -70 -80 -90 -100 100k 1M 10M FREQUENCY - Hz 100M 1G VDD = +5V RL = 100 V P-P = 0.316V
Figure 3. On Resistance as a Function of VD (VS) for Different Temperatures with 3 V Single Supplies
Figure 6. Crosstalk vs. Frequency
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-5-
ADG774
20 VDD = +5V 15 CHARGE INJECTION - pC TA = +25 C
10
5
0
-5
-10 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 SOURCE VOLTAGE - V 4.0 4.5 5.0
Figure 7. Charge Injection vs. Source Voltage
10 BASE TX+ TX1 10 BASE TX- 100 BASE TX+ TX2 100 BASE TX- RJ45 10 BASE TX+ RX1 10 BASE TX- TRANSFORMER 100 BASE TX+ RX2 100 BASE TX-
ADG774
10 BASE TX
100 BASE TX
Figure 8. Full Duplex Transceiver
TX1
120 RX1
100
Figure 9. Loop Back
Figure 10. Line Termination
Figure 11. Line Clamp
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ADG774 Test Circuits
IDS
V1 IS (OFF) S D VS A S D ID (OFF) A VD VS S D ID (ON) A VD
VS
RON = V1/IDS
Test Circuit 1. On Resistance
Test Circuit 2. Off Leakage
Test Circuit 3. On Leakage
+5V 0.1 F VIN VDD S VS IN EN GND D RL 100 VOUT 90% CL 35pF VOUT tON tOFF 90% 3V 50% 50%
Test Circuit 4. Switching Times
+5V 0.1 F
VDD S1A D1 VS S1B VS DECODER EN GND RL 100 CL 35pF VOUT VOUT VIN
3V 50% 0V 50% VS tD tD 50% 50%
Test Circuit 5. Break-Before-Make Time Delay
+5V 0.1 F 0.1 F
+5V
VDD D1 RL 100 IN VS EN GND VIN VOUT S1A
VDD D1 S1B RL 100 VOUT
VS VIN
IN
EN
GND
Test Circuit 6. Bandwidth
Test Circuit 7. Off Isolation
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ADG774
+5V 0.1 F
VDD S1A
D1
100
NC
S2A EN VIN
D2 RL 100
VOUT
GND
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG |VS/VOUT|
Test Circuit 8. Channel-to-Channel Crosstalk
+5V
VDD
ADG774
RS VS S1A S1B S2A S2B S3A S3B S4A S4B 1 OF 2 DECODER EN IN CL 1nF CL 1nF CL 1nF CL 1nF D4 VOUT D3 VOUT D2 VOUT VOUT QINJ = CL VOUT VOUT D1 VOUT VIN 3V
Test Circuit 9. Charge Injection
OUTLINE DIMENSIONS
Dimensions shown in inches and (mm).
16-Lead SOIC (R-16A)
0.3937 (10.00) 0.3859 (9.80)
16 1 9 8
16-Lead QSOP (RQ-16)
0.197 (5.00) 0.189 (4.80)
0.1574 (4.00) 0.1497 (3.80)
0.2550 (6.20) 0.2284 (5.80)
16
9
0.157 (3.99) 0.150 (3.81)
1
0.244 (6.20) 0.228 (5.79)
8
PIN 1 0.0098 (0.25) 0.0040 (0.10)
0.0688 (1.75) 0.0532 (1.35)
0.0196 (0.50) 0.0099 (0.25)
45 PIN 1 0.059 (1.50) MAX
0.0500 SEATING (1.27) PLANE BSC
0.0192 (0.49) 0.0138 (0.35)
0.0099 (0.25) 0.0075 (0.19)
8 0
0.0500 (1.27) 0.0160 (0.41)
0.069 (1.75) 0.053 (1.35)
0.010 (0.25) 0.004 (0.10)
0.025 (0.64) BSC
8 0.012 (0.30) 0 SEATING 0.010 (0.20) 0.008 (0.20) PLANE 0.007 (0.18)
0.050 (1.27) 0.016 (0.41)
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PRINTED IN U.S.A.
C3326-8-7/98
VS

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