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(R) EMIF02-600FU7 10-BIT WIDE EMI FILTER INCUDING ESD PROTECTION Application Specific Discretes A.S.D.TM MAIN APPLICATIONS Where EMI filtering in ESD sensitive equipment is required : Computers and printers Communication systems Mobile phones MCU Boards DESCRIPTION The EMIF02-600FU7 is a highly integrated array designed to suppress EMI / RFI noise in all systems subjected to electromagnetic interferences. Additionally, this filter includes an ESD protection circuitry which prevents the protected device from destruction when subjected to ESD surges up to 15 kV. The EMIF02-600FU7 provides best efficiency when using separated inputs and outputs, in the so-called 4-points structure. SSOP24 FUNCTIONAL DIAGRAM BENEFITS 10-bit EMI bi-directional low-pass-filter Enhanced ESD protection for the protected device, optimized by the four point structure High flexibility in the design of high density boards . . . 10 C E L L S . . . COMPLIESWITHTHE FOLLOWING STANDARDS : IEC 1000-4-2 15kV 8 kV (air discharge) (contact discharge) ESDresponseto IEC1000-4-2 (15 kVairdischarge) Filtering response (with 50 line) TM : ASD is trademark of STMicroelectronics. September 1998 - Ed: 2A 1/9 EMIF02-600FU7 ABSOLUTE MAXIMUM RATINGS (Tamb = 25 C) Symbol VPP Tj T op Tstg TL Parameter and test conditions ESD discharge IEC1000-4-2, air discharge ESD discharge IEC1000-4-2, contact discharge Junction temperature Operatingtemperature range Storage temperature range Lead solder temperature (10 second duration) Value 16 9 150 -40 to + 85 -55 to +150 260 Unit kV C C C C ELECTRICAL CHARACTERISTICS (Tamb =25 C) Symbol VBR IRM VRM VCL Rd IPP RI/O Parameter Breakdown voltage Leakage current @ VRM Stand-off voltage Clamping voltage Dynamic impedance Peak pulse current Serial resistance between Input and Output Symbol VBR IRM RI/O Rd IR = 1 mA VRM = 3V Test conditions Min. 6 Typ. 7 Max. 8 1 Unit V A Serial resistance between Input and Output Ipp = 10 A, t p = 2.5 s (see note 1) 480 600 0.55 720 Note 1 : to calculate the ESD residual voltage, please refer to the paragraph "ESD PROTECT ION" on pages 4 & 5 Fig.1 : Relative variation of leakage current versus reverse voltage(Typical values) IR[VR] / IR[VR=3V] 20.0 10.0 5.0 2.0 1.0 VR (V) 0.5 2.5 3.0 3.5 4.0 4.5 5.0 5.5 2/9 EMIF02-600FU7 TECHNICAL INFORMATION FREQUENCY BEHAVIOR The EMIF02-600FU7 is firstly designed as an EMI/RFI filter. This low-pass filter is characterized by the following parameters: - Cut-off frequency - Insertion loss - High frequency rejection Fig A1 : EMIF02-600FU7frequencyresponse curve. Figure A1 gives these parameters, in particular the signal rejection at the GSM frequency is about -20dBm at 900MHz, while the attenuation for FM broadcast range (around 100MHz) is better than -32dBm Fig A2 : Measurement conditions SPECTRUM ANALYSER TG OUTPUT RF INPUT 50 EMIF02 Vg TEST BOARD Vin Vout 50 EMIF02 3/9 EMIF02-600FU7 ESD PROTECTION In addition to its filtering function, the EMIF02-600FU7 is particularly optimized to perform ESD protection. ESD protection is based on voltage clamping which can be calculated by : VCL = VBR + Rd.IPP This protection function is splitted in 2 stages. As shown in figure A3, the ESD strikes are clamped by the first stage S1 and then its remaining overvoltage is applied to the second stage through the resistor R. Such a configuration makes the output voltage Vout very low. Fig A3 : ESD clamping behavior Rg R ESD Surge Rd Vg Vin Vbr Rd Vout Vbr Rload S1 EMIF02-600FU7 S2 Device to be protected To have a good approximation of the remaining voltages at both Vin and Vout stages, we provide the typical dynamical resistance value Rd. By taking into account these following hypothesis : R>>Rd, RG>>Rd and Rload>>Rd, it gives these formulas: Vin = Rg.Vbr+Rd.Vg Rg R.Vbr+Rd.Vin R Vout = The results of the calculation done for VG=8kV, RG=330 (IEC1000-4-2 standard) and VBR=7V (typ.) give: Vin = 20.33 V Vout = 7.01 V This confirms the very low remaining voltage across the device to be protected. It is also important to note that in this approximation the parasitic inductance effect was not taken into account. This could be few tenths of volts during few ns at the Vin side. This parasitic effect is not present at the Vout side due the low current involved after the resistance R. The measurements shown here after illustrate very clearly (Fig. A5a) the high efficiency of the ESD protection : - no influence of the parasitic inductances on Vout stage - Vout clamping voltage very close to VBR Fig A4 : Measurement conditions LOW-PASS FILTER Vin Vout GND GND GND 4/9 EMIF02-600FU7 Fig A5 : Remaining voltage at both stages S1 (Vin) and S2 (Vout) during ESD surge a) Positive surge b) Negative surge Please note that the EMIF02-600FU7 is not only acting for positive ESD surges but also for negative ones. For these kind of disturbances it clamps close to ground voltage as shown in Fig. A5b. NOTE: DYNAMIC RESISTANCE MEASUREMENT As the value of the dynamic resistance remains stable for a surge duration lower than 20s, the 2.5s rectangular surge is well adapted. In addition both rise and fall times are optimized to avoid any parasitic phenomenon during the measurement of Rd. Fig A6 : Rd measurement current wave I IPP t 2 s 2.5 s 2.5s duration measurement wave CROSSTALK BEHAVIOR 1- Crosstalk phenomena Fig A7 : Crosstalk phenomena RG1 line 1 VG1 VG2 VG1 RG2 line 2 RL1 VG2 RL2 VG2 VG1 DRIVERS RECEIVERS The crosstalk phenomena are due to the coupling between 2 lines. The coupling factor ( 12 or 21 ) increases when the gap across lines decreases, particularly in silicon dice. In the example above the expected signal on load RL2 is 2VG2, in fact the real voltage at this point has got an extra value 21VG1. This part of the VG1 signal represents the effect of the crosstalk phenomenon of the line 1 on the line 2. This phenomenon has to be taken into account when the drivers impose fast digital data or high frequency analog signals in the disturbing line. The perturbed line will be more affected if it works with low voltage signal or high load impedance (few k). The following chapters give the value of both digital and analog crosstalk. 5/9 EMIF02-600FU7 2- Digital Crosstalk Fig A8 : Digital crosstalk measurement +5V 74HC04 Line 1 +5V VG1 Line 2 21 VG1 +5V 74HC04 Square Pulse Generator 5KHz Figure A8 shows the measurement circuit used to quantify the crosstalk effect in a classical digital application. Figure A9 shows that in such a condition signal from 0 to 5V and rise time of 10 ns, the impact on the disturbed line is less than 20mV peak to peak. No data disturbance was noted on the concerned line. The same results were obtained with falling edges. Fig A9 : Digital crosstalk results 3- Analog Crosstalk Fig A10 : Analog crosstalk measurement Fig A11 : Typical analog crosstalk result 0 -10 -20 TG OUTPUT RF INPUT dB -30 -40 TEST BOARD -50 -60 EMIF02 -70 -80 1 F(MHz) 10 100 Figure A10 gives the measurement circuit for the analog application. In figure A11, the curve shows the effect of cell 1/24 on cell 2/23, no difference was found with other couples of adjacent cells. In usual frequency range of analog signals (up to 100MHz) the effect on disturbed line is less than -32 dBm. 6/9 EMIF02-600FU7 PSPICE MODEL Fig A12 : PSpice model of one EMIF02-600FU7cell 5nH Input Dzin 1 Dzout 600 5nH Output 1 0.85nH GND Figure A12 shows the PSpice model of one cell of the EMIF02-600FU7. In this model, the clamping diodes (Dzin and Dzout) are defined by the following PSpice parameters : RS = 0.55 Cjo = 100p M = 0.3333 VJ = 0.6 BV = 7 IBV = 1u This model is available for frequency simulation and for ambient temperature of 27C. The comparison between the PSpice simulation and the measured frequency response is given in figaA13. This shows that the PSpice model is very close to the product behavior. Fig A13 : Comparison between PSpice simulation and measured frequency response 0 dBm PSpice Model -10 Measured (smooth) -20 -30 F(MHz) -40 1 10 100 1000 7/9 EMIF02-600FU7 PACKAGE MECHANICAL DATA SSOP24 L A b D e S a1 E b1 24 13 F 1 12 DIMENSIONS REF. Millimeters Min. A a1 b b1 D E e F L S 5.20 0.25 1.73 0.05 0.25 0.10 8.07 7.60 0.65 5.38 0.2047 0.88 0.010 8max 8.20 Typ. 1.86 Max. 2.00 0.25 0.35 8.33 7.90 Min. 0.002 0.010 Inches Typ. Max. 0.010 0.014 0.014 0.311 0.0256 0.2118 0.0347 0.068 0.073 0.079 Mechanical specifications Lead plating Tin-lead Lead plating thickness Lead material Lead coplanarity Body material Flammability 7m min. 20 m max. Copper alloy 0.08mm max. Molded epoxy UL94V-0 0.35 0.0035 0.299 0.317 0.322 0.328 RECOMMENDED FOOTPRINT 0.65mm 0.45mm 8.3mm 5.3mm 8/9 EMIF02-600FU7 ORDER CODE EMIF ELECTRO MAGNETIC INTERFERENCE FILTER 02 - 600 RI/O value F U 7 RL RL : Tape & Reel SSOP24 package Unidirectional transil diode Four point structure Delivery mode tube tape & reel NUMERICAL CODE Order code EMIF02-600FU7 EMIF02-600FU7RL Marking EMIF02-600 EMIF02-600 Package SSOP24 SSOP24 Weight 0.19g 0.19g Base qty 59 2000 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringementof patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 1998 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com 9/9 |
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