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DATA SHEET
MOS INTEGRATED CIRCUIT
PD7759
ADPCM SPEECH SYNTHESIZER LSIs
The PD7759 is an external ROM type speech synthesis LSI employing the waveform coding method. In addition to the ROM capability of up to 1 Mbit, the PD7759 realizes the synthesis of speech sounds of any length by using the ADPCM data transferred from an external ROM. As the synthesizing method, it adopts the ADPCM method and the PCM + waveform element method. The ADPCM method is suitable for synthesizing clear and natural speech sounds, and the PCM + waveform element method is for the synthesis of sound effects and melodies. And by using them together, the
PD7759 realizes the long-time synthesis of high-quality sounds.
Because of the short turn-around time of speech analysis, the PD7759 can perform the quick system development using a PROM, or the evaluation of an on-chip ROM type of the PD7755 family.
FEATURES
5 q Synthesizing method q Sampling frequency q Bit rate (speech) q Number of Messages 5 q External speech data ROM
Parameters Speech data ROM (External) Products Speech (ADPCM) 50 sec. (TYP.) Synthesizing time
Note1
: ADPCM, PCM + waveform element methods used together : 5, 6 or 8 kHz : 20 to 32 K bps : 256 (MAX.)
Melodies & sound effects Note2 (PCM + waveform element) 340 sec. (TYP.)
PD7759
1 Mbits
Note 1. The synthesizing time for the speech is the value for a 6 kHz sampling. 2. The synthesizing time for the melodies & sound effects is variable according to their tone.
q Speech output q Host CPU interface q Standby mode q Supply voltage q CMOS technology
: Current sink type analog output, 9-bit D/A converter : Compatible with a 4/8-bit CPU : Pop-noise preventive circuit incorporated : 2.7 to 5.5 V
ORDERING INFORMATION
Part Number Package 40-pin plastic DIP (600 mil) 52-pin plastic QFP (s 14 mm) s Quality grade Standard Standard
PD7759C PD7759GC-3BH
Please refer to "Quality grade on NEC Semiconductor Devices" (Document number IEI-1209) published by NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
The information in this document is subject to change without notice. Document No. IC-2323A (O.D.No. IC-6960D) Date Published January 1993 Printed in Japan
The mark 5 shows revised points.
(c)
1988, 1993
PD7759
PIN CONFIGURATION (Top View)
* 40-pin plastic DIP
ASD5 ASD6 ASD7 I0 I1 I2 I3 I4 I5 I6 I7 AEN/ WR SAA DRQ ALE REF AVO BUSY RESET GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 VDD ASD4 ASD3 ASD2 ASD1 ASD0 A8 A7 A6 A5 A4 A3 A2 A1 A0 CS X2 X1 ST MD
* 52-pin plastic QFP
NC CS X2 X1 ST MD NC GND RESET BUSY AVO REF NC NC A0 A1 A2 A3 A4 NC A5 A6 A7 A8 ASD0 NC 39 38 37 36 35 34 33 32 31 30 29 28 27 40 26 41 25 42 24 43 23 44 22 45 21 46 20 PD7759GC-3BH 47 19 48 18 49 17 50 16 51 15 52 14 1 2 3 4 5 6 7 8 9 10 11 12 13
NC ALE DRQ SAA AEN / W R I7 NC I6 I5 I4 I3 I2 NC
BLOCK DIAGRAM
ASD0 to ASD7
A0 to A8
NC ASD1 ASD2 ASD3 ASD4 VDD NC ASD5 ASD6 ASD7 I0 I1 NC
PD7759C
SAA ALE DRQ MD BUSY CS ST
X1 ROM Address & Speech Data Interface OSC X2
REF
AEN/ WR System Controller ADPCM Decoder
D/A Converter
AVO
RESET VDD GND Message Select Interface
I0 to I7
2
PD7759
1. PIN FUNCTIONS
1.1 COMMON FUNCTION TO ALL MODES
Pin (Abbreviation) VDD DRQ 52-pin QFP Pin No. 6 24 40-pin DIP Pin No. 40 14 -- Output Power supply (2.7 to 5.5 V) Speech synthesis data request. D/A converter reference current input. The sink-load current input causes the output current of the REF 28 16 Input D/A converter to change. The D/A converter reference current is passed to VDD via a resistor. In standby mode, REF is set to high impedance. Analog speech signal output. AVO outputs a unipolar sink-load current. The output current is reduced to 0 when the PD7759 is in the AVO 29 17 Output standby mode. The output current of the D/A converter from AVO is changed according to the input current from REF. Maximum output current of the D/A converter is approx. the 34 times the REF input current. Active-low BUSY signal output. When inputting ST signal, BUSY 30 18 Output it outputs a low level signal. MD, ST and WR are invalid while BUSY is low. In standby mode, BUSY is set to high impedance. Reset input. In standby mode, RESET must be at low level more than 12 RESET 31 19 Input clock cycles after clock oscillation becomes stable. In operation mode, RESET must be at low level for 12 clock cycles (oscillation clock). GND 32 20 -- Ground. Ceramic resonator connection for generating a clock signal. The 640 kHz ceramic resonator can be connected. In standby mode, the PD7759 outputs a low-level to X1 and X2 37 24 -- a high-level to X2. I/O Function
5
X1
36
23
--
1, 7, 13, NC 14, 20, 26, 27, 33, 39, 40, 46, 52 -- -- No Connection
3
PD7759
1.2 PIN FUNCTION FOR STAND ALONE MODE
Pin (Abbreviation) I0 I1 I2 I3 I4 I5 I6 I7 52-pin QFP Pin No. 11 12 15 16 17 18 19 21 40-pin DIP Pin No. 4 5 6 7 8 9 10 11 Output/ Input Input Message selection code input. The message selection code signals are positive logics. Ground the pins not used. These pins are connected to the internal latch circuit which latches I0 to I7 data at the rising edge of the ST input. In standby mode, these pins should be set high or low level. If they are biased at or near the typical CMOS threshold, the excess supply current is caused. This signal is at low level while address signal is valid. Controls the latch circuit for the higher 8 bits of the external ROM address. Outputs high level when the start address of a message stored in the directory area of data memory, is being read out. Determines the timing that higher 8 bits of the external ROM ALE 25 15 Output address are externally latched. They must be latched at the falling edge of the signal. MD 34 21 Input set at high-level. Start signal input. When ST goes low while CS is at low level, the PD7759 starts ST 35 22 Input synthesizing the message specified by I0 to I7. In standby mode, this signal resets the standby mode and starts speech synthesis. Chip select signal input. CS A0 A1 A2 A3 A4 A5 A6 A7 A8 ASD0 ASD1 ASD2 ASD3 ASD4 ASD5 ASD6 ASD7 38 41 42 43 44 45 47 48 49 50 51 2 3 4 5 8 9 10 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 1 2 3 Input/ Output (1) Outputs the higher 8 bits of external ROM address. (2) Inputs 8-bit speech synthesis data from the external ROM. These functions are executed from (1) to (2) on a timeshared basis. Output Outputs the lower 9 bits of the external ROM address. Input ST becomes valid when CS goes low. I/O Function
AEN/WR
22
12
SAA
23
13
Output
4
PD7759
1.3 PIN FUNCTION FOR SLAVE MODE
Pin (Abbreviation) I0 I1 I2 I3 I4 I5 I6 I7 52-pin QFP Pin No. 11 12 15 16 17 18 19 21 40-pin DIP Pin No. 4 5 6 7 8 9 10 11 Output/ AEN/WR 22 12 Input Inputs write strobe signal for a speech synthesis data. Input Invalid. Set at high or low level. I/O Function
Invalid. SAA 23 13 Output Leave this pin open. Invalid. ALE 25 15 Output Leave this pin open. Slave mode selection input. MD 34 21 Input Transition between two operation mode is not accepted during synthesis or in the standby mode. Invalid. ST 35 22 Input Set at high level. Chip select signal input. CS 38 25 Input WR becomes valid when CS goes low.
A0 A1 A2 A3 A4 A5 A6 A7 A8 ASD0 ASD1 ASD2 ASD3 ASD4 ASD5 ASD6 ASD7
41 42 43 44 45 47 48 49 50 51 2 3 4 5 8 9 10
26 27 28 29 30 31 32 33 34 35 36 37 38 39 1 2 3 Input Input speech synthesis data from an external source. Output Invalid. Leave these pins open.
5
PD7759
2. ELECTRICAL SPECIFICATIONS ABSOLUTE MAXIMUM RATINGS (Ta = 25 C)
Parameters Power supply voltage Input voltage Output voltage Storage temperature Operating temperature
Symbol VDD VI Vo Tstg Topt
Conditions
Ratings -0.3 to + 7.0 -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 -40 to +125 -10 to +70
Unit V V V C C
RECOMMENDED OPERATING CONDITIONS
Parameters Supply voltage Symbol VDD VIH1 High-level input voltage VIH2 Applied to ASD0 to ASD7, VDD = 5 V 10 % Applied to I0 to I7, ST, CS, RESET, MD, WR Applied to ASD0 to ASD7, VDD = 5 V 10 % 2.2 VDD V Applied to I0 to I7, ST, CS, RESET, MD, WR Conditions MIN. 2.7 0.7 VDD TYP. MAX. 5.5 VDD Unit V V
VIL1 Low-level input voltage VIL2 Clock frequency Remark AC timing test voltage VIL = VOL = 0.3 VDD VIH = VOH = 0.7 VDD fOSC
0
0.3 VDD
V
0 630 640
0.8 650
V kHz
6
PD7759
DC CHARACTERISTICS (Ta = -10 to +70 C, VDD = 2.7 to 5.5 V, fOSC = 640 kHz)
Parameters High-level output voltage Low-level output voltage Input leak current Output leak current Symbol VOH VOL | ILI | | ILO | Conditions IOH = -100 A VDD = 5 V 10 %, IOL = 1.6 mA I0 to I7, ST, CS, WR, ASD0 to ASD7, MD BUSY, A0 to A8 (Stand alone, slave mode) VDD = 5 V (Standby mode) VDD = 5 V Supply current IDD (Stand alone, slave mode) 2.7 V < VDD < 3.5 V = = (Standby mode) 2.7 V < VDD < 3.5 V = = VDD = 2.7 V, RREF = 0 VDD = 5.5 V, RREF = 0 Reference input current
Note
MIN.
TYP. VDD -0.5
MAX.
Unit V
0.4 3 3 10
V
A A
mA
20
A
1
mA
10 140 500 21 68 32 IREF 250 760 30 78 34 IREF 440 1200 39 88 36 IREF
A A A A A A
IREF VDD = 2.7 V, RREF = 50 k VDD = 5.5 V, RREF = 50 k
D/A converter output current
IAVO
2.7 V < VDD < 5.5 V = = VAVO = 2.0 V, D/A input: 1 FFH 0 V < VAVO < VDD = = in the standby mode
D/A converter output leak current
| ILD |
5
A
Note Measuring circuit VDD
RREF REF IREF AVO IAVO
7
PD7759
5 AC CHARACTERISTICS (Ta = -10 to +70 C, VDD = 2.7 to 5.5 V, fOSC = 640 kHz) TIMING REQUIREMENTS (common to all modes)
Parameters Symbol tr1 BUSY rise time tr2 tf1 BUSY fall time tf2 BUSY output stop time tRB CL = 150 pF, VDD = 2.7 to 5.5 V from RESET 2 9.5 CL = 150 pF, VDD = 2.7 to 5.5 V CL = 150 pF, VDD = 5 V 10 % 2 800 Conditions CL = 150 pF, VDD = 5 V 10 % MIN. TYP. MAX. 800 Unit ns
s
ns
s s
2.1 STAND ALONE MODE
(1) TIMING REQUIREMENTS
Parameters RESET pulse width CS set up time CS hold time Symbol tRST tCS tSC for ST from ST In operation mode, from RESET ST set up time tRS In standby mode, from RESET 2.7 V < VDD < 5.5 V = = ST pulse width tCC 4.5 V < VDD < 5.5 V = = 2.7 V < VDD < 5.5 V, from ST = = 4.5 V < VDD < 5.5 V, from ST = = Message select code hold time Speech data set up time Speech data hold time tWD tDR tRDH from ST for DRQ from DRQ 350 5 350 0 2 7.5 1.25 ns 1.6 2 ms Conditions MIN. 18.5 0 0 200 TYP. MAX. Unit
s
ns ns
5
s
s
s
ns ns
Message select code set up time
tDW
s s
8
PD7759
(2) SWITCHING CHARACTERISTICS
Parameters BUSY output delay Speech output delay BUSY hold time ALE pulse width Symbol tSBO tSSO tBD tLL tAL Higher address set up time tAE tLA Higher address hold time tEA AEN pulse width DRQ output delay Higher address pulse width DRQ pulse width ROM read cycle time tAEN tLC tAC tDCC tMRO from ALE from AEN 0 14.1 3.13 6.25 7.81 37.5 for AEN from ALE 0 3.13 for ALE Conditions In operation mode, from ST In operation mode, from BUSY from synthesis 3.13 3.13 MIN. TYP. 6.25 2.1 MAX. 10 2.2 15 Unit
s
ms
s s s s s s s s s s s
TIMING CHART (at reset) (1)
RESET tRST
ST
tRS
(2)
BUSY tRB
RESET
9
PD7759
TIMING CHART (Stand alone mode) (1) CONTROL
tDW CS tCS tCC ST tDW tWD tSC
I0 to I7
VALID tSBO
BUSY tSSO 1FFHIAVO 100H000H(D/A converter input value) Synthesized sound output tBD
10
PD7759
(2) MEMORY ACCESS
tMRO AEN
tAE
tAEN
tEA
A0 to A8 tAC
ASD0 to ASD7 tAL tLA
ALE tLL tDR tRDH
DRQ
tLC
tDCC
11
PD7759
2.2 SLAVE MODE
(1) TIMING REQUIREMENTS
Parameters Symbol tRM MD set up time tBM tMD MD pulse width Speech data set up time Speech data hold time WR input stop time WR pulse width CS set up time CS hold time tMD2 tDW tWD tWR tCC tCW tWC for WR , 5 V 10 % from WR , 5 V 10 % from DRQ 5 V 10 % for WR from WR 350 0 0 Conditions from RESET from BUSY from MD MIN. 200 0 6.2 6.2 350 0 31.7 TYP. MAX. Unit
s
ns
5
s s
ns ns
s
ns ns ns
(2) SWITCHING CHARACTERISTICS
Parameters BUSY output delay Symbol tSBO from MD In operation mode, from MD DRQ output delay tMDR In standby mode, after RESET input, from MD DRQ output stop time tWRQ from WR 50 50 Conditions MIN. TYP. MAX. 9.5 70 Unit
s
s
50000 3
5
s
12
PD7759
TIMING CHART (Slave mode) (1) CONTROL
RESET tRM tBM tMD2
MD tMDR tMD
DRQ
CS tCW tCC WR tDW tWD
ASD0 to ASD7
BUSY tSBO
(2) DATA TRANSFER
DRQ tWRQ
CS tCW
tWC
WR tWR tDW tWD
ASD0 to ASD7
13
PD7759
2.3 STANDBY MODE
(1) TIMING REQUIREMENTS
Parameters Standby escape signal L*Note pulse width Symbol tAW Conditions VDD = 5 V 10 % MIN. 350 TYP. MAX. Unit ns
(2) SWITCHING CHARACTERISTICS
Parameters Operation mode hold time D/A converter activate /inactivate time BUSY set up time Synthesis start time tDA tSB tSSS from L* after D/A converter activation In standby mode, oscillation BUSY output delay tSBS start time is included. 4 80 ms 46.5 6.25 2.1 47 10 2.2 ms Symbol tSTB Conditions after synthesis MIN. TYP. 2.9 MAX. 3 Unit s
s
ms
Note L*: Signal to release standby mode. = CS ST : When operation mode is stand alone mode. CS WR : When operation mode is slave mode
TIMING CHART (Standby mode)
L* tSB BUSY tSBS tSTB max IAVO mid 0 Synthesis tDA tDA tSSS
<<
tAW
14
PD7759
3. PACKAGE DRAWINGS
15
PD7759
5
52 PIN PLASTIC QFP (
14)
A B
39 40
27 26
detail of lead end
D
C
S Q
52 1
14 13
F
G
H
IM
J K
P
N NOTE Each lead centerline is located within 0.20 mm (0.008 inch) of its true position (T.P.) at maximum material condition.
L P52GC-100-3B6,3BH-1 ITEM A B C D F G H I J K L M N P Q S MILLIMETERS 17.6 0.4 14.0 0.2 14.0 0.2 17.6 0.4 1.0 1.0 0.40 0.10 0.20 1.0 (T.P.) 1.8 0.2 0.8 0.2 0.15 +0.10 -0.05 0.12 2.7 0.1 0.1 3.0 MAX. INCHES 0.693 0.016 0.551+0.009 -0.008 0.551+0.009 -0.008 0.693 0.016 0.039 0.039 0.016+0.004 -0.005 0.008 0.039 (T.P.) 0.071 -0.009 0.031+0.009 -0.008 0.006 -0.003 0.005 0.106 0.004 0.004 0.119 MAX.
+0.004 +0.008
16
M
55
PD7759
4. RECOMMENDED SOLDERING CONDITIONS
The following conditions (see tables below) must be met when soldering the PD7759. Please consult with our sales offices in case other soldering process is used, or in case soldering is done under different conditions. For more details, refer to our document "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (IEI-1207). q TYPE OF SURFACE MOUNT DEVICE 5
PD7759GC-3BH:52-pin plastic QFP (s 14 mm) s
Soldering Process Soldering Conditions Solder temperature: 260 C or below, Wave Soldering Flow time: 10 seconds or below, Temperature of pre-heat: 120 C or below (Plastic surface temperature), Number of flow process: 1 Peak package's surface temperature: 230 C or below, Infrared Ray Reflow Reflow time: 30 seconds or below (210 C or higher), Number of reflow process: 1 Peak package's temperature: 215 C or below, VPS Reflow time: 40 seconds or below (200 C or higher), Number of reflow process: 1 Partial Heating Method Terminal temperature: 300 C or below, Time: 3 seconds or below (Per one side of the device) -- VP15-00-1 IR30-00-1 WS60-00-1 Symbol
Caution Do not apply more than one soldering method at any one time, except for "Partial heating method".
q TYPE OF THROUGH HOLE DEVICE
PD7759C:40-pin plastic DIP (600mil)
Soldering Process Wave Soldering (only lead part) Partial Heating Method Soldering Conditions Solder Temperature: 260 C or below Flow time: 10 seconds or below Terminal temperature: 260 C or below Time: 10 seconds or below
Caution Do not jet molten solder on the surface of package.
17
PD7759
The PD7759 has the following user's manual as a separate volume. Please use it for reference. q PD7755 family User's Manual: IEU-1218
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. The devices listed in this document are not suitable for use in aerospace equipment, submarine cables, nuclear reactor control systems and life support systems. If customers intend to use NEC devices for above applications or they intend to use "Standard" quality grade NEC devices for applications not intended by NEC, please contact our sales people in advance. Application examples recommended by NEC Corporation Standard: Computer, Office equipment, Communication equipment, Test and Measurement equipment, Machine tools, Industrial robots, Audio and Visual equipment, Other consumer products, etc. Special: Automotive and Transportation equipment, Traffic control systems, Antidisaster systems, Anticrime systems, etc.
M4 92.6

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