 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| (R) MH89792 E1 Transceiver Preliminary Information Features * * * * * * * * * Complete primary rate 2048kb/s CEPT line driver and receiver Onboard pulse transformers for transmit and receive Meets latest ETSI requirements (ETSI ETS 300 011 (NET 5)) Inductorless clock recovery Loss of signal indication/ polarity selection Programmable polarity of extracted clock & receive data Single +5V operation Compatible with all E1 framers Small footprint area (<330mm 2) MH89792-1 MH89792-2 MH89792-3 ISSUE 3 April 1995 Ordering Information 20 Pin SIL Package 20 Pin SIL Package 20 Pin SIL Package 0C to 70C Description The Mitel MH89792 is a low cost E1 line driver/ receiver with clock extraction requiring no external components. There are three versions available: MH89792-1 for 120 twisted pair cable; MH89792-2 for 75 co-axial links; MH89792-3 for 100 digital twisted pair. Applications * * * * Primary rate ISDN network Interface Multiplexer equipment Private Network links Isochronous LANS/WANS VDD VSS TxA TxB E2o LOSP CLKF/ CLKR RxINV RxA RxB LOS RxD Line Driver Transmit Isolation Transformer 6dB Pad TLA TLB Polarity Selection Clock/Data Clock Recovery Receive Isolation Transformer Line Receiver RLA RLB EQUIPMENT SIDE LINE SIDE Figure 1 - Functional Block Diagram 4-223 MH89792 E2o VDD RxA RxB VSS RxD RxINV CLKF/CLKR LOS LOSP NC RLA RLB TLA TLB NC NC NC TxA TxB 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Preliminary Information Figure 2 - Pin Connections Pin Description Pin # 1 2 3 Name E2o VDD RxA Description 2048kHz Extracted clock (Output). This clock is extracted by the device from the received signal. It is used internally to clock in data received from RLA and RLB. D.C. Power (Input) +5V supply Receiver A (Output). The bipolar CEPT signal received by the device at RLA and RLB inputs is converted to a unipolar format and output at this pin. This pin should be connected to the positive receive pin of the framer. Receiver A (Output). This pin should be connected to the negative receive gain pin of the framer and provides a signal of the same format as RxA. Ground (Input). D.C. power return path. Received Data (Output) This unipolar return to zero format signal is the product of RxA and RxB logically "OR" ed and is required by some framers. RxA/RxB inversion (Input). A logic low applied to this pin will invert the outputs RxA and RxB. A logic high should be applied if no inversion is required. E2o phase selection is achieved by use of this pin. A logic low provides E2o with a falling edge coinciding with the centre of the data bit. A logic high provides E2o with a rising edge. Loss of signal (Output). This pin goes low when 128 continuous zeros are received on the RLA and RLB inputs. When RxINV and LOS are low RxA and RxB are forced high. When RxINV is high and LOS is low RxA and RxB are forced low. LOS is reset when 64 ones are received in two dual E1 framer periods. Loss of signal Polarity (Input). A logic low applied to this pin will invert LOS. A logic high should be applied when LOS is required. No connection. This pin is not fitted. Received Line A (Input). The A wire or Tip Connection of the E1 receive line should be connected to this pin. Receive Line B (Input). The B wire or Ring connection of the E1 receive line should be connected to this pin. 4 5 6 7 8 RxB VSS RxD RxINV CLKF/ CLKR LOS 9 10 11 12 13 LOSP NC RLA RLB 4-224 Preliminary Information Pin Description (Continued) Pin # 14 15 16 17 18 19 20 Name TLA TLB NC NC NC TXA TXB Description MH89792 Transmit Line B (Output). The B wire of Ring connection of the E1 receive line should be connected to this pin. Transmit Line B (Output). The B wire or Tip connection of the E1 receive line should be connected to this pin. No Connection. This pin is not fitted. No Connection. This pin is not fitted. No Connection. This pin is not fitted. Transmit A (Input). A unipolar signal from the framer device used in conjunction with TxB is used to generate the bipolar output signal. Transmit B (Input). A unipolar signal from the framer device used in conjunction with TxA is used to generate the bipolar output signal. Functional Description The MH89792 is a E1 digital trunk interface which when used with an approved framer will conform to CCITT recommendation G.703 for PCM30 and I.431 for the ISDN. The functions provided include line driver and receive circuitry, inductorless clock recovery, data and clock polarity selection and loss of signal indication. Bipolar Line Transmitter The MH89792 transmitter interfaces to the transmission line through an internal pulse transformer which combines the TxA and TxB data into an AMI line coded signal. This is then passed through the 6dB pad prior to being applied to the line. Bipolar Line Receiver The MH89792 receiver interfaces to the transmission line through an internal pulse transformer which splits the received AMI lines signal into RxA and RxB. These two signals are combined by internal logic to form a new signal which represents the received data, RxD. The signals RxA and RxB may be inverted where required by applying a logic low signal permanently to pin 7, (RxINV). RxD will not be affected by use of this pin. The input impedance seen by the transmission line is about 120 ohms when using the -1 variant for twisted pair applications, about 75 ohms when using the -2 variant for coaxial cable applications, and is about 100 ohms when using the -3 variant for digital twisted pair applications. Attenuation of the transmission line shall not exceed 6dB (at 1024kHz) and attenuation characteristics shall be close to the "square root of f" Af (dB) = AFref (dB)* f fref Clock Extractor The MH89792 contains a clock extraction circuit which generates the E2o clock from the received data without the use of external crystals or a tunable inductor. The edge of the E2o extracted clock approximately aligns with the centre of the received data pulse and can be configured as either rising or falling edge by the use of pin 8. (CLKF/CLKR). Loss of Signal The circuitry on the MH89792 is capable of detecting 128 continuous ZEROs received on RLA and RLB and indicating this condition as a logic low on pin 9, (LOS). When LOS and RxINV are low RxA and RxB are forced high, when LOS is low and RxINV is high RxA and RxB are forced low LOS will not reset until 64 ONEs are received in a two E1 frame period. LOS may be inverted by applying a logic low to pin 10, (LOSP). Where: AF - attenuation at frequency f in dB AFref - attenuation at frequency fref in dB (in kHz) fref - reference frequency (in this case 1024) kHz f - frequency in kHz 4-225 MH89792 INT Preliminary Information MH89792-1 MT8979 DSTi DSTo CSTio CSTo CSTi1 RxD RxA RxB F0i E2i 6 RxD 3 RxA 4 1 RxB E2o RxINV VSS 5 7 12 RLA Twisted Pair RLB 13 CLKF/ CLKR 8 VDD LOSP 2 10 XSt TxA TxB 9 19 20 LOS TxA TxB Coax Connection -2 Version only TLA TLB 14 Twisted Pair 15 C2i MT9042 MT8941 Coax Connection -2 Version only +5V Figure 3a - Application Circuit VDD 10K 0.1 +5 +5 MH89792-1 1 33 2 RESET DSTi DSTo 41 16 35 TxMF TxA TxB 43 42 19 20 TAIS VDD TxA TxB 32 E8Ko VDD RLA TLA TLB RLB 2 12 14 15 13 NETWORK CONNECTOR MT9079 8-15 18-22 23 24 25 7 D0-7 AC0-4 R/W CS DS IRQ RxA RxB E2i F0i C4i 30 29 27 31 26 3 4 1 RxA RxB E2o 9 LOS 8 CLKF/CLKP 7 RXINV 10 LOSP S/P 36 VSS 37 MT9042 Figure 3b - Application Circuit 4-226 Preliminary Information MH89792 ISOLATION BARRIER MH89792 1 PLL LINE CONNECTORS FRAMER NETWORK SIDE 20 NOTES: X = Pin not fitted Separation across barrier > 2mm recommended. SYSTEM SIDE Figure 3c - Application Circuit Side View 0.1 Max (2.5 Max) 2.0 + 0.040 (50.8 + 1.0) 0.56 Max (14.2 Max) 1 0.010 + 0.002 (0.25 + 0.05) 0.27 Max (6.9 Max) * 0.05 + 0.01 (1.3 + 0.5) Notes 1) Not to scale 2) Dimensions in inches 3) (Dimensions in millimeters) * Dimensions to pin center & tolerance non accumulative. * 0.05 + 0.02 (1.225 + 0.05) 0.020 + 0.005 (0.51 + 0.13) * * 0.18 + 0.02 (4.6 + 0.5) 0.100 + 0.010 (2.54 + 0.26) Figure 4 - Mechanical Data 4-227 MH89792 Notes: Preliminary Information 4-228 |
Price & Availability of MH89792
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |