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(R) L4955 5A ULDO LINEAR REGULATORS FAMILY UP TO 5A OUTPUT CURRENT 2% PRECISE OUTPUT VOLTAGES FAST TRANSIENT RESPONSE 0.75V TYP. DROP OUT VOLTAGE AT 5A OPERATING INPUT VOLTAGE FROM 4.5V ADJUSTABLE VERSION: * VO = 1.26V * INHIBIT (IQ = 120A TYP.) * POWER GOOD * PROGRAMMABLE CURRENT LIMIT * HEPTAWATT PACKAGE FIXED VERSION: * 3.3V, 5.1V OUTPUTS * VERSAWATT PACKAGE VERY LOW QUIESCENT CURRENT SHORT CIRCUIT PROTECTION (Foldback function) THERMAL SHUTDOWN APPLICATIONS PENTIUMTM AND POWER PCTM SUPPLIES POST REGULATOR FOR SMPS LOW COST SOLUTION FOR 5V TO 3.3V CONVERSION LOW COST BATTERY CHARGER CONSTANT CURRENT REGULATOR SUITABLE FOR APPLICATION WITH STANDBY FEATURE DESCRIPTION The L4955 is a family of monolithic ultra very low drop linear regulators designed to supply the most recent microprocessors. TYPICAL APPLICATIONS INH VIN IN 1 3 PG 6 7 OUT R1 5 GND ADJ R2 C2 VOUT MULTIPOWER BCD TECHNOLOGY HEPTAWATT ORDERING NUMBERS L4955 L4955V3.3 L4955V5.1 OUTPUT VOLTAGE 1.26V ADJ 3.3V 5.1V VERSAWATT (TO-220) PACKAGE HEPTAWATT VERSAWATT VERSAWATT The dropout voltage is only 0.75V (Typ.) at 5A, directly dependent on the output current conditions. Realized in BCDII technology, it has on board a charge pump to properly drive an N-channel power mos Transistor with 150m of RDSON. It operates from a 4.5V minimum supply, with a very low quiescent current irrespective of the load; a minimum of 22F output capacitor is required for stability. The on-chip trimming techniques improve the precision of the available output voltages to 2%. Ancillary functions like power good, inhibit with low power consumption, programmable output voltage and current limiting make the flexible heptawatt version usable in applications where power management, stand-by, features, post regulation and adjustable current generators for battery chargers are important. L4955 C1 CL 2 4 VIN C1 IN 1 L4955VXXX 2 GND 3 OUT VOUT C2 D97IN590 D97IN589 February 1999 1/14 L4955 ABSOLUTE MAXIMUM RATINGS Symbol VIN Supply Input Voltage ADJ and CL pins PG and INH pins PTOT Tst, Ti Power Dissipation @ Tamb = 50C Power Dissipation @ Tcase = 90C Storage Temperature Parameter Value 24 -0.3 to 4 0 to VIN 2 15 -40 to +150 Unit V V V W W C PIN CONNECTIONS (Top views) 7 6 5 4 3 2 1 tab connected to pin 4 D96IN367 OUT PG ADJ GND INH CL IN D96IN369 3 OUT GND 1 IN HEPTAWATT VERSAWATT (TO220) BLOCK DIAGRAM VIN 10F IN 1(1) VREF= 1.26V FIXED C.L. CHARGE PUMP FOLDBACK PRE REGULATOR + - E/A PROGRAM. C.L. BUFFER POWER DMOS 150m OUT 7(3) R1 ADJ VOUT 22F THERMAL SHUTDOWN INH 3 VREF + 2 PIN x = HEPTAWATT PIN (x) = VERSAWATT RCL (1/4W, 1%) CL 4(2) GND 0.9V REF 6 PG D96IN366 1.26V INHIBIT ACTIVE HIGH 5 + - R2 2/14 L4955 PIN FUNCTIONS HW 1 2 3 4 5 6 7 VW 1 - - 2 - - 3 Name IN CL INH GND ADJ PG OUT Function Unregulated input voltage; this pin must be bypassed with a capacitor larger than 10F. A resistor connected between this pin and ground sets the programmable current limiting value. When the programmable current limiting is not used the pin must be connected to GND. TTL-CMOS input. A logic high level on this input disables the device. An internal pull-down insures full functionally even if the pin is open. Ground. The output is connected directly to this terminal for 1.26V operation; it is connected to the output through a resistive divider for higher voltages. Open drain output, this signal is low when the output voltage is lower than 90%, otherwise is high. Regulated output voltage. A minimum bypass capacitor of 22F is required to insure stability. THERMAL DATA (HEPTAWATT & VERSAWATT packages) Symbol Rth j-case Rth j-amb Parameter Thermal Resistance Junction-case Thermal Resistance Junction-ambient Thermal Shutdown Thermal Hysteresis Max. Max. Typ. Typ. Value 2.5 50 150 20 Unit C/W C/W C C L4955 - ELECTRICAL CHARACTERISTICS (Tj = 25C, Vin = 12V, unless otherwise specified). * = Specifications referred to TJ from 0C to +125C. Symbol VIN VO V O V O VO Parameter Operating Supply Voltage Output Voltage (1) Line regulation Dropout Voltage (1) 0.1A < IO < 5A; 4.5V < VIN <12V 4.5V < VIN < 12V; 0.1A < IO < 5A 4.5V < VIN <22V; IO = 10mA 0.1A < IO < 5A IO = 5A VIN 4.5V IO = 2A IO Current Limiting Short Circuit Current Programmable Current Limiting IQ Quiescent Current Stand By Current Inhibit Threshold Inhibit Hysteresis Inhibit Bias Sink Current Power Good Threshold Power Good Hysteresis Power Good Saturation Ripple Rejection (1) Output voltage connected to ADJ. Test Condition Min. 4.5 1.235 1.222 Typ. 1.26 1.26 2 2 0.75 1.1 0.55 Max. 22 1.285 1.298 10 10 1.1 1.5 0.75 7.5 3.45 1.00 3 4 200 1.42 60 Unit V V V mV mV V V V A A A A mA mA A V V A V V * Load regulation (1) VO = 0V Rlim = 13k Rlim = 47k 0.1A < IO < 5A INH = 5V Rising Edge INH = 5V or 0.8V Rising Edge IPG = 4mA f = 120Hz, IO = 5A VIN = 6V VIN = 2VPP CL = 0 C L = 13k * * * * * * 5.1 2.55 0.70 6.3 1.8 3 0.85 2 2.7 * 120 1.1 1.26 0.2 20 0.9 x VO 0.2 0.1 60 75 * * 0.4 V dB 3/14 L4955 L4955V3.3 - ELECTRICAL CHARACTERISTICS (Tj = 25C, Vin = 5V, unless otherwise specified) * = Specifications referred to TJ from 0C to +125C. Symbol VIN VO Parameter Operating Input Voltage Output Voltage 4.75V < VIN < 12V; 0.1A < IO < 5A 4.75V < VIN < 12V; 0.1A < IO < 5A V O V O IO Line regulation Load regulation Current Limiting Short Circuit Current IQ Quiescent Current Ripple Rejection VO = 0V 0.1A < IO < 5A f = 120Hz, IO = 5A VIN = 6V VIN = 2VPP 57 4.5V < VIN <12V; IO = 10mA 0.1A < IO < 5A Test Condition Min. 4.5 3.234 3.300 3.300 2 3 Typ. Max. 22 3.366 3.399 10 15 7.5 Unit V V V mV mV A A 3 mA dB * 3.201 * * 5.1 6.3 1.8 2 70 L4955V5.1 - ELECTRICAL CHARACTERISTICS (Tj = 25C, Vin = 8V, unless otherwise specified) * = Specifications referred to TJ from 0C to +125C. Symbol VIN VO Parameter Operating Input Voltage Output Voltage 6.75V < VIN < 15V; 0.1A < IO < 5A 6.75V < VIN < 15V; 0.1A < IO < 5A VD Drop-out Voltage IO = 5A Test Condition Min. VO+VD 5.000 5.100 5.100 0.75 Typ. Max. 22 5.200 5.250 1.1 1.5 0.75 10 20 7.5 Unit V V V V V V mV mV A A 3 mA dB * * * 4.950 1.1 0.55 2 5 IO = 2A V O V O IO Line regulation Load regulation Current Limiting Short Circuit Current IQ Quiescent Current Ripple Rejection VO = 0V 0.1A < IO < 5A f = 120Hz, IO = 5A VIN = 8V VIN = 2VPP 6.5V < VIN <15V; IO = 10mA 0.1A < IO < 5A * * 5.1 6.3 1.8 2 55 65 4/14 L4955 L4955 Figure 1: L4955 DC Operating Area O u tput C ur rent [A ] 8 7 6 5 4 3 2 1 0 0 2.5 5 D C O perating A re a T c = 70C P dm ax = 22W 7.5 10 12.5 15 (V in - Vou t) [V ] 17.5 20 22.5 R dson lim it Pow er D is sipation Lim it T c = 25C P dm ax = 40W C urr ent Lim itation V in > 4.5V T j = 125C Figure 2: Output Voltage Stability vs. Junction Temperature Vo u t [V ] 1 .2 8 1 .2 7 5 1 .2 7 1 .2 6 5 1 .2 6 1 .2 5 5 1 .2 5 1 .2 4 5 1 .2 4 -40 V in = 1 2 V Io u t= 1 0 m A 0 40 T j [C ] 80 1 20 160 Figure 3: Line Regulation vs. Junction Temperature [m V 5 4 .5 4 3 .5 3 2 .5 2 1 .5 1 0 .5 4 .5V < V in< 2 2V Iou t= 1 0 m A Figure 4: Load Regulation 5 [m V ] 4 3 2 1 0 -1 -2 -3 -4 Vo u t = V A D J V in = 1 2 V T j = 25 C ( P u ls e d t e c h n iq u e h a s b e e n u s e d ) Deviation Voltage Output 0 O utput Voltage D eviation -4 0 -2 0 0 20 40 60 80 100 120 140 160 T j [C ] -5 0 1 2 Io u t [A ] 3 4 5 Figure 5: Dropout Voltage M in im u m V in - Vo u t Vo lta g e [V ] 1 .2 5 Figure 6: Maximum OutputCurrent vs. Junction Temperaturewith internalcurrent limiting O utput C urrent [A] 10 9 T j = 1 2 5 C 1 8 7 0 .7 5 T j = 2 5 C 6 5 4 T j = -4 0 C 0 .5 3 2 (Vin-Vout) > 2V pin 2 = G ND 0 .2 5 P u l s e d t e c h n iq u e h a s b e e n u s e d 1 6 0 0 1 2 3 Io u t [A ] 4 5 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [C] *P ulsed tecnique ha s been used 5/14 L4955 L4955 Figure 7: Short-circuit Current vs. Junction Temperature with Programmable Current Limiting S h o r t- c ir c uit C u r r e nt [A ] 3 .5 3 2 .5 2 1 .5 1 0 .5 0 -40 -20 R lim = 4 7 k 0 20 4 0 60 80 T j [ C ] 10 0 12 0 1 40 160 R lim = 1 9 k R lim = 1 3 k Figure 8: Quiescent Current vs. Temperature (CL = 0V) Iq [m A ] 2 .6 2 .4 2 .2 2 1 .8 1 .6 1 .4 1 .2 1 0 .8 0 .6 0 .4 -4 0 - 2 0 V in = 1 2 V Io u t =1 0 m A t o 5 A 0 20 40 * P u ls ed te c ni q u e h as b e e n u s e d 6 0 8 0 1 00 1 20 1 4 0 1 6 0 T j [ C ] Figure 9: Quiescent Current vs. Supply voltage (CL = 0V) I q [m A ] 5 4 .5 4 3 .5 3 2 .5 2 1 .5 1 0 .5 0 0 5 10 15 V in [ V ] 20 25 T j= - 4 0 C Figure 10: Quiescent Current vs. Supply Voltage with Programmable Current Limiting Iq [mA] 5 4.5 4 Tj = 25C Io = 1 0 m A t o 5 A 3.5 3 2.5 2 1.5 1 0.5 0 0 5 10 Vin [V] 15 20 25 Rlim = 47k Rli m = 13k T j= 2 5 C T j= 1 2 5 C Figure 11: Stand-by Current vs. Supply Voltage with INH = LOGIC HIGH Iq [u A ] 400 350 300 250 T j= 2 5 C Figure 12: Ripple Rejection vs. Frequency R i p p le R e je c tio n [d B ] 1 00 90 80 70 60 V r ip p le = 3 V p - p V r ip p le = 0 . 5 V p - p 200 150 100 50 0 50 40 30 20 10 C in = 2 2 u F C o u t = 2 2uF V o ut = 1.26 V V in m in = 4 . 5 V Io u t = 5 A 0 5 10 V in [V ] 15 20 25 0 10 100 F r e q u e n c y [H z ] 1k 10k 1 00 k 6/14 L4955 L4955 Figure 13: Ripple Rejection vs. Output Current R i p p le R e je c t io n [d B ] 100 90 80 70 60 50 40 30 20 10 0 0 C in = 2 2 u F C o u t= 2 2 u F V o u t= 1 .2 6 V V in m i n = 4 . 5 V F r ip p l e = 5 0 k H z V r ip p le = 0 . 5 V p -p Low High Low Figure 14: Power Good Function VADJ VOUT=VADJ (R1+R2)/R2 F r ip p le = 1 2 0 H z V r ip p le = 3 V p - p F r ip p l e = 1 k H z V r ip p le = 0 . 5 V p - p F r ip p l e = 1 0 k H z V r ip p le = 0 . 5 V p - p 0.9 VADJ hyst = 200mV t PG t D96IN364B 1 2 3 I o u t [A ] 4 5 Figure 15: Inhibit Function VINH Vref = 1.26V hyst = 200mV t regulator ON regulator OFF regulator ON D96IN365A t 7/14 L4955 LINE TRANSIENT RESPONSE Figure 16. Figure 17. Figure 18. Test condition: VIN = 12V; VIN = 1V; VO = 3.3V; IO = 200mA; CIN = 10F (electrolytic capacitor); Cout = 22F (electrolytic capacitor); dV/dt = 0.1 V/s; TJ = 25C 8/14 L4955 LOAD TRANSIENT RESPONSE Figure 19. Figure 20. Figure 21. Test condition: VIN = 5V, VOUT = 3.3V; Load Transient from 0.5A to 5A; dIout = 20A s; TJ = 25C dt Figure 22: Load transient test circuit. PG VIN = 5V IN 1 6 7 OUT R4 910 R5 560 C4 to C9 100F/10V AVX TPS 6 each C10 to C15 1F AVX X7R 6 each VOUT = 3.3V L4955 C1,C2 470F/25V Panasonic HFQ 2 CL GND 4 3 5 INH ADJ D97IN546 9/14 L4955 L4955V3.3 Figure 23: DC operating area. O utput Current [A] 8 7 6 5 4 3 2 1 0 Figure 24: Output Voltage Stability vs. Junction Temperature. Vo ut [V ] 3 .4 Current Lim itation Vout = 3.3V T j = 125C 3 .35 V in = 5V Iou t = 1 0mA Power Dissipation Lim it Rdson lim it T c = 25C Pdm ax=40W 3 .3 3 .25 DC O perating Area T c=70C Pdm ax=22W 3 .2 -4 0 0 40 T j [C ] 80 120 1 60 3 4.5 6 7.5 9 10.5 12 13.5 15 16.5 18 19.5 21 22.5 Input Voltage [V] Figure 25: Quiescent Current vs. Temperature. Iq [m A] 3 Figure 26: Load Regulation 5 4 Output Voltage Deviation [mV] 3 2 1 0 -1 -2 -3 -4 -5 Vin=5V Tj = 25 C (Pulsed tecnique has been used) 0 1 2 Iout [A] 3 4 5 2 .7 5 2 .5 2 .2 5 2 1 .7 5 1 .5 1 .2 5 1 0 .7 5 0 .5 0 .2 5 0 -4 0 -2 0 0 20 40 60 T j [C ] 80 1 00 120 1 40 160 V in= 5 V I ou t = 10 m A to 5 A Figure 27: Line regulation vs. Junction Temperature. 5 4.5 Output Voltage Deviation [mV] 4 3.5 3 2.5 2 1.5 1 0.5 0 -40 -2 0 0 20 40 60 80 T j [C ] 10 0 1 20 1 40 160 4.5 V < V in < 12 V Io u t = 1 0 m A Figure 28: MaximumOutput Current vs.Junction Temperaturewith internalcurrent limiting O utput C urrent [A] 10 9 8 7 6 5 4 3 2 1 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [C] (Vin-Vout) > 2V pin 2 = G ND *P ulsed tecnique ha s been used 10/14 L4955 L4955V5.1 Figure 29: DC operating area. O ut put C u rr e nt [A ] 8 7 C u rre nt L im itatio n 6 5 4 3 DC O pe ratin g A re a 2 1 0 0 2 .5 5 7 .5 10 (V in - Vou t) [V ] 1 2 .5 15 1 7 .5 T c = 70 C P dm a x = 2 2W Rd so n lim it Pow er D issip a tio n Lim it Vou t = 5.1V T j = 125 C Figure 30: Output Voltage Stability vs. Junction Temperature. Vout [V] 5.2 5.15 V in = 8V Iout = 1 0mA 5.1 T c = 2 5C P d m a x = 4 0W 5.05 5 4.95 4.9 -4 0 0 40 T j [C ] 80 12 0 1 60 Figure 31: Quiescent Current vs. Temperature. Iq [mA] 3 Figure 32: Load Regulation 10 8 Output Voltage Deviation [mV] 6 4 2 0 -2 -4 -6 -8 -10 V in = 8 V Tj = 2 5 C (P uls e d tec n iq u e h as be en us ed ) 2 .75 2.5 2 .25 2 1 .75 1.5 1 .25 1 0 .75 0.5 0 .25 0 -40 -20 0 20 40 60 T j [C] 80 100 1 20 140 160 Vin = 8V Iout = 10mA to 5A 0 1 2 Io u t [A] 3 4 5 Figure 33: Line regulation vs. Junction Temperature. 5 4.5 Output Voltage Deviation [mV] 4 3.5 3 2.5 2 1.5 1 0.5 0 -40 -20 0 20 40 60 80 Tj [C] 100 120 140 160 6.5V < Vin < 15V Iout = 10mA Figure 34: Maximum OutputCurrent vs. Junction Temperaturewith internalcurrent limiting O utput C urrent [A] 10 9 8 7 6 5 4 3 2 1 0 -40 -20 0 20 40 60 80 100 120 140 160 Tj [C] (Vin-Vout) > 2V pin 2 = G ND *P ulsed tecnique ha s been used 11/14 L4955 DIM. A C D D1 E E1 F F1 G G1 G2 H2 H3 L L1 L2 L3 L4 L5 L6 L7 L9 M M1 V4 Dia mm TYP. inch TYP. MIN. 2.4 1.2 0.35 0.7 0.6 2.34 4.88 7.42 10.05 16.7 21.24 22.27 2.6 15.1 6 2.55 4.83 3.65 2.54 5.08 7.62 16.9 14.92 21.54 22.52 2.8 15.5 6.35 0.2 2.8 5.08 MAX. 4.8 1.37 2.8 1.35 0.55 0.97 0.8 0.9 2.74 5.28 7.82 10.4 10.4 17.1 21.84 22.77 1.29 3 15.8 6.6 3.05 5.33 40 3.85 MIN. 0.094 0.047 0.014 0.028 0.024 0.095 0.193 0.295 0.396 0.657 0.386 0.877 0.102 0.594 0.236 0.100 0.190 (typ.) 0.144 0.100 0.200 0.300 0.668 0.587 0.848 0.891 0.110 0.610 0.250 0.008 0.110 0.200 MAX. 0.189 0.054 0.110 0.053 0.022 0.038 0.031 0.035 0.105 0.205 0.307 0.409 0.409 0.673 0.860 0.896 0.051 0.118 0.622 0.260 0.120 0.210 0.152 OUTLINE AND MECHANICAL DATA Heptawatt V L E L1 M1 A C D1 L5 L2 L3 E E1 F V V D M H2 V4 L9 H3 H1 Dia. G G1 G2 F L7 L6 L4 H2 F1 HEPTAMEC 12/14 L4955 mm MIN. A C D E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 M Dia 3.75 13.0 2.65 15.25 6.20 3.50 2.6 3.85 0.147 4.40 1.23 2.40 0.49 0.61 1.14 1.14 4.95 2.40 10.0 16.4 14.0 2.95 15.75 6.60 3.93 0.511 0.104 0.600 0.244 0.137 0.102 0.151 TYP. MAX. 4.60 1.32 2.72 0.70 0.88 1.70 1.70 5.15 2.70 10.4 MIN. 0.173 0.048 0.094 0.019 0.024 0.044 0.044 0.194 0.094 0.393 0.645 0.551 0.116 0.620 0.260 0.154 inch TYP. MAX. 0.181 0.051 0.107 0.027 0.034 0.067 0.067 0.203 0.106 0.409 DIM. OUTLINE AND MECHANICAL DATA Versawatt (TO220) M TO220MEC 13/14 L4955 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publicationsupersedes and replaces all information previously supplied. STMicroelectronics products are notauthorizedfor use as critical components in life support devices or systems without express writtenapproval of STMicroelectronics. The ST logois a registered trademark of STMicroelectronics (c) 1999 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com 14/14 |
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