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TEA6415C
BUS-CONTROLLED VIDEO MATRIX SWITCH
s s
s s s
s s
s s
20MHz BANDWIDTH CASCADABLE WITH ANOTHER TEA6415C (INTERNAL ADDRESS CAN BE CHANGED BY PIN 7 VOLTAGE) 8 INPUTS (CVBS, RGB, MAC, CHROMA, ...) 6 OUTPUTS POSSIBILITY OF MAC OR CHROMA SIGNAL FOR EACH INPUT BY SWITCHING-OFF THE CLAMP WITH AN EXTERNAL RESISTOR BRIDGE BUS CONTROLLED 6.5dB GAIN BETWEEN ANY INPUT AND OUTPUT -55dB CROSSTALK AT 5MHz FULLY ESD PROTECTED
DIP20 (Plastic Package) ORDER CODE : TEA6415C
DESCRIPTION The main function of the TEA6415C is to switch 8 video input sources on the 6 outputs. Each output can be switched to only one of the inputs whereas but any same input may be connected to several outputs. All the switching possibilities are controlled through the I2C bus. PIN CONNECTIONS
INPUT DATA INPUT CLOCK INPUT INPUT PROG INPUT VCC INPUT 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 INPUT GROUND OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT OUTPUT
6415C-01.EPS
SO20 (Plastic Micropackage) ORDER CODE : TEA6415CD
GROUND INPUT
January 1996
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TEA6415C
BLOCK DIAGRAM
P ERI TV1 P ERI TV2
TTX
LUMA PIP CHROMA POWER
MAC DEC.
GND
18
CVBS (MAC/DEC)
17
16
15
14
13
12
1
CVBS (P ERI P LUG1)
CVBS (AM TUNER) MAC S IGNAL (AMTUNER)
3
5
6
CVBS (P ERI P LUG2)
CVBS (FM TUNER) MAC S IGNAL (FM TUNER)
8
10
11
SYNCHRO (TTX/BTX)
20
BUS DECODER
T E A 6 4 1 5 C
9 VCC 19 GND
6415C-02.EPS
2 DATA
7 P ROG
4 CLOCK
GENERAL DESCRIPTION The main functionof the IC is to switch 8 video input sources on 6 outputs. Each output can be switched on only one of each input. On each input an alignment of the lowest level of the signal is made (bottom of synch. top for CVBS or black level for RGB signals). Each nominal gain between any input and output is 6.5dB. For D2MAC or Chroma signal the alignment is switched off by forcing, with an external resistor bridge, 5 VDC on the input. Each input can be used as a normal input or as a MAC or Chroma
input (with external resistor bridge). All the switching possibilities are changed through the BUS. Driving 75 load needs an external transistor. It is possible to have the same input connected to several outputs. The starting configuration upon power on (power supply : 0 to 10V) is undetermined. In this case, 6 words of 16 bits are necessary to determine one configuration. In other case, 1 word of 16 bits is necessary to determine one configuration.
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TEA6415C
ABSOLUTE MAXIMUM RATINGS
Symbol VCC TA Tstg Supply Voltage (Pin 9) Operating Ambient Temperature Storage Temperature Parameter Value 12 0, +70 - 20, +150 Unit
o o
C C
THERMAL DATA
Symbol Rth(j-a) Parameter Junction-Ambient Thermal Resistance DIP20 SO20 Value 80 100 Unit
o C/W o
6415C-02.TBL 6415C-03.TBL
C/W
ELECTRICAL CHARACTERISTICS TA = 25oC , VCC = 10V , RLOAD = 10k , CLOAD = 3pF (unless otherwise specified)
Symbol VCC ICC INPUTS Signal Amplitude (CVBS signal) Input Current (per output connected, input voltage = 5VDC) (this current is X6 when all outputs are connected on the input) DC Level DC Level Shift (temperature from 0 to 70oC) OUTPUTS (VIN = 1VPP for all dynamic tests) Pins 13 - 14 - 15 - 16 - 17 - 18 Dynamic Output Impedance Gain Bandwidth -1dB attenuation -3dB attenuation Crosstalk f = 5MHz f = 3.58MHz DC level 2.4 6 7 4.5 5.5 25 6.5 15 20 - 55 - 60 2.75 - 45 - 50 3.1 50 7 VPP dB MHz MHz dB dB V 3.3 1 3.6 5 2 3 3.9 100 VPP A V mV Supply Voltage (Pin 9) Power Supply Current (without load on outputs ; VCC =10V) Parameter Min. 8 20 Typ. 10 30 Max. 11 40 Unit V mA
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6415C-01.TBL
V
TEA6415C
I2C BUS CHARACTERISTICS
Symbol SCL VIL VIH ILI fSCL tR tF CI SDA VIL VIH ILI CI tR tF VOL tF CL TIMING tLOW tHIGH tSU, DAT tHD, DAT tSU, STO tBUF tHD, STA tSU, STA Clock Low Period Clock High Period Data Set-up Time Data Hold Time Set-up Time from Clock High to Stop Start Set-up Time following a Stop Start Hold Time Start Set-up Time following Clock Low-to High Transition 4.7 4.0 250 0 4.0 4.7 4.0 4.7 340 s s ns ns s s s s Low Level Input Voltage High Level Input Voltage Input Leakage Current Input Capacitance Input Rise Time Input Fall Time Low Level Output Voltage Output Fall Time Load Capacitance VI = 0 to VCC 1.5V to 3V 1.5V to 3V IOL = 3mA 3V to 1.5V - 0.3 3.0 - 10 + 1.5 VCC + 0.5 + 10 10 1000 300 0.4 250 400 V V A pF ns ns V ns pF Low Level Input Voltage High Level Input Voltage Input Leakage Current Clock Frequency Input Rise Time Input Fall Time Input Capacitance - 0.3 3.0 - 10 0 1.5V to 3V 1.5V to 3V + 1.5 VCC + 0.5 + 10 100 1000 300 10 V V A kHz ns ns pF Parameter Test Conditions Min. Max. Unit
VI = 0 to VCC
Figure 1 : I2C Bus Timing
SDA t BUF t LOW tf
SCL t HD,STA tr t HD,DAT t HIGH t SU,DAT
SDA t SU,STA t SU,STO
6415C-10.EPS
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6415C-06.TBL
TEA6415C
BUS SELECTIONS (I2C-BUS) 2nd byte of transmission
ADDRESS MSB 00000 00100 00010 00110 00001 00101 00011 00111 DATA LSB XXX XXX XXX - -XXX XXX XXX - -Selected Output Pin 18 Pin 14 Pin 16 Not used Pin 17 Pin 13 Pin 15 Not used Selected Input 00XXX 00XXX 00XXX 00XXX 00XXX 00XXX 00XXX 00XXX 000 100 010 110 001 101 011 111 Pin 5 Pin 8 Pin 3 Pin 20 Pin 6 Pin 10 Pin 1 Pin 11
Output is selected by address bits
Input is selected by data bits
6415C-04.TBL
Example :00100 101 connects Pin 10 (input) to Pin 14 (output) (equals 25 in hexadecimal) Adress byte (1st byte of transmission)
86 06 1000 0000 0110 0110 When pin PROG is connected to ground When pin PROG is connected to VCC
6415C-05.TBL
IN / OUT PIN CONFIGURATION Figure 2 : Input Configuration
VCC
Figure 3 : Output Configuration
VCC
14k
x3 Allvide o outputs Pins 13-14-15 16-17-18 7k
0.36 VCC
6 time s
6415C-03.EPS
Output
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6415C-04.EPS
Pins 1-3-5-6 8-10-11-20
11k 8 NPN tra ns istors
TEA6415C
IN / OUT PIN CONFIGURATION (continued) Figure 4 : Bus I/O Configuration
VCC
Figure 5 : VCC Pin Configuration
VCC 9
to I2L pa rt
20k
150
*
20k 150
250 A
6415C-05.EPS
P ins 2-4-7
VREF
ACK
* For Pin 2 (DATA) only
USE WITH AN OTHER TEA6415C The programmation input (PROG) permits to operate with two TEA6415C in parallel and to select them independantly through the I2C-BUS without Figure 6
modifying the adress byte. Consequentl y, the switch capabilities are doubled or IC1 and IC2 can be cascaded.
P
logical "0" Video Inputs
PROG IC1 Video Outputs
logical "1" Video Inputs
PROG IC2
6415C-07.EPS
Video Outputs
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6415C-06.EPS
TEA6415C
TYPICAL APPLICATION
100k 22F MAC 100k 75 11 10 220nF 75 CBVS
100 F 12 9 220nF
10 VCC 10V
CVBS OUTPUT 10k
13
8 220nF 75
CBVS
CVBS OUTPUT 10k
14
7
PROG (BUS)
CVBS OUTPUT 10k
15
CVBS OUTPUT 10k
16
T E A 6 4 1 5 C
100k
22F MAC
6 100k 75 220nF 5 75
CVBS
CVBS OUTPUT 10k
17
4
CK (BUS)
220nF CVBS OUTPUT 10k 18 3 75 CVBS
19
2
DA (BUS)
220nF CVBS 75 20 1
220nF CVBS 75
6415C-08.EPS
CROSSTALK IMPROVEMENT 1 - When any input is not used, it must be bypassed to ground through a 220nF capacitor.
2 - An important improvement can be achieved considering the input crosstalk by means of the application (see technical note).
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TEA6415C
OTHER APPLICATION DIAGRAM EXAMPLE
BUS DECODER
CVBS1
CVBS2
CVBS3
Ye xt
VCC
Ce xt
Yint
VCC
VCC /2
VCC /2
Cint
Y+ C
T E A 6 4 1 5 C
CVBSout1
Yout1 Cout1 Yout2 Cout2 CVBSout2
Y, C ADDER Y, C SEPARATOR
8/10
6415C-09.EPS
TEA6415C
PACKAGE MECHANICAL DATA 20 PINS - PLASTIC DIP
Dimensions a1 B b b1 D E e e3 F I L Z
Min. 0.254 1.39
Millimeters Typ.
Max. 1.65
Min. 0.010 0.055
Inches Typ.
Max. 0.065
0.45 0.25 25.4 8.5 2.54 22.86 7.1 3.93 3.3 1.34
0.018 0.010 1.000 0.335 0.100 0.900 0.280 0.155 0.130 0.053
DIP20.TBL
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PM-DIP20.EPS
TEA6415C
PACKAGE MECHANICAL DATA 20 PINS - PLASTIC MICROPACKAGE (SO)
Dimensions A a1 a2 b b1 C c1 D E e e3 F L M S
Min. 0.1 0.35 0.23
Millimeters Typ.
Max. 2.65 0.3 2.45 0.49 0.32 45o (typ.)
Min. 0.004 0.014 0.009
Inches Typ.
Max. 0.104 0.012 0.096 0.019 0.013
0.5 12.6 10 1.27 11.43 7.4 0.5 7.6 1.27 0.75 8 (Max.)
o
0.020 13.0 10.65 0.496 0.394 0.050 0.450 0.291 0.020 0.299 0.050 0.030 0.512 0.419
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1996 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system confo rms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
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SO20.TBL
PM-SO20.EPS

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