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 CXA3107N
IF Amplifier for M-ary FSK Pagers For the availability of this product, please contact the sales office.
Description The CXA3107N is a low current consumption FM IF amplifier which employs the newest bipolar process. It is suitable for M-ary FSK pagers. Features * Low current consumption: 570 A (typ. at VCC=1.4 V) * Low voltage operation: VCC=1.1 to 4.0 V * Small package 20-pin SSOP * Needless of IF decoupling capacitor * Reference power supply for operational amplifier and comparator * Bit rate filter with variable cut-off * Misoperation prevention function for continuous data * RSSI function * IF input, Vcc standard Applications * M-ary FSK pagers Function Plastic Structure Bipolar silicon monolithic IC 20 pin SSOP (Plastic)
Absolute Maximum Ratings (Ta=25 C) * Supply voltage VCC 7.0 * Operating temperature Topr -20 to +75 * Storage temperature Tstg -65 to +150 Operating Condition Supply voltage
V C C
VCC
1.1 to 4.0
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
--1--
E96303A8Z
Block Diagram
20 REG CONT NRZ OUT FIL SW LVA BS RSSI
19
18
17
16
14
13
12
11 LEVEL
VCC
REG OUT
15 CHARGE
REGULATOR
ALARM
NRZ COMP
QUICK CHARGE
LEVEL COMP
--2--
QUAD DET TH CONT DISK FSK REF CHG CONT FILTER C1 C2 C3 AUDIO
LIM
IF IN
GND
1
2
3
4
5
6
7
8
9
10
CXA3107N
CXA3107N
Pin Description Pin No. Symbol Pin voltage Equivalent circuit
20k 20k 1.5k
Description
VCC 1.5k
1
IF IN
1.4 V
1
IF limiter amplifier input.
GND
2
GND
--
VCC
Ground. Determines the level comparator threshold value. The threshold value can be adjusted by inserting the resistor between Pin 3 and VCC. Normally, short to VCC.
3
TH CONT
--
3
25k GND
VCC
4
FSK REF
0.2 V
4
72
Connects the capacitor that determines the low cut-off frequency for the entire system.
GND
VCC 22k 20k
5
DISK
1.4 V
5
20p GND
Connects the phase shifter of FM detector circuit.
6
72k
6
CHG OFF
--
20k
100k GND
Sets off the quick charge circuit current. The charge current is off by setting Pin 15 low and Pin 6 high.
--3--
CXA3107N
Pin No.
Symbol
Pin voltage
Equivalent circuit
Description
VCC
7 8 9
C1 C2 C3
0.2 V
7 8 9
35k 50k GND
Connects the capacitor that determines the LPF cut-off.
VCC
72
10
AUDIO
0.2 V
10 72 GND
Level comparator and NRZ comparator inputs. The operational amplifier output is connected.
72 11
11 16 17
LEVEL NRZ OUT LVA OUT
-- -- --
16 17 GND
Level comparator, NRZ comparator and LVA comparator outputs. They are open collectors. (Applied voltage range: -0.5 V to +7.0 V)
VCC 7k 7k
12
RSSI
0.1 V
12 70k GND
RSSI circuit output.
72 13 20k
13
FIL SW
--
140k GND
Switches the LPF cut-off. Cut-off is decreased by setting this pin high. (Applied voltage range: -0.5 V to +7.0 V)
--4--
CXA3107N
Pin No.
Symbol
Pin voltage
Equivalent circuit
72 14 20k
Description
14
B.S.
--
140k GND
Controls the battery saving. Setting this pin low suspends the operation of IC. (Applied voltage range: -0.5 V to +7.0 V)
20k 15
15
CHARGE
--
100k
GND
Controls the charge speed of the quick charge circuit. Set this pin high to execute the quick charge. (Applied voltage range: -0.5 V to +7.0 V)
VCC
18
REG CONT
--
18 72
Output for internal constantvoltage source amplifier. Connects the base of PNP transistor. (Current capacity: 100 A)
GND
VCC
19
REG OUT
1.0 V
78k 19 1k 22k GND
Constant-voltage source output. Controlled to maintain 1.0 V.
20
VCC
Power supply.
--5--
CXA3107N
Electrical Characteristics Item Current consumption Current consumption AM rejection ratio
(VCC=1.4 V, Ta=25 C, FS=455 kHz, FMOD=1.6 kHz, FDEV=4.8 kHz, AMMOD=30 %) Symbol ICC ICCS AMRR VSATNRZ ILNRZ VTWNRZ IOUT VSATVB VREG VLVA ILLVA VSATLVA VODET VTHBSV VTLBSV VIN (LIM) VLCWR VSATLC ILLC VORSSI RINLIM Conditions Measurement circuit 1 V2=1.0 V Measurement circuit 1 V2=0 V Measurement circuit 2 30 k LPF Measurement circuit 4 Vin=0.3 V Measurement circuit 3 Vin=0.1 V Measurement circuit 3 Vin=0.1 to 0.3 V Measurement circuit 5 Measurement circuit 5 Output current 0 A Min. 390 -- 25 -- -- 5 100 -- 0.92 1.00 -- -- 50 0.9 -- -- -15 -- -- -- 1.2 Typ. 570 6 -- -- -- 10 -- -- 0.96 1.05 -- -- 63 -- -- -83 0 -- -- 100 1.5 Max. 780 20 -- 0.4 5.0 20 -- 0.4 1.02 1.10 5.0 0.4 80 -- 0.35 -- +15 0.4 5.0 250 1.8 Unit A A dB V A mV A V V V A V mVrms V V dBm % V A mV k
NRZ output saturation voltage NRZ output leak current NRZ hysteresis width VB output current VB output saturation current REG OUT voltage LVA operating voltage LVA output leak current LVA output saturation voltage Detector output voltage Logic input voltage high level Logic input voltage low level Limiting sensitivity Detector output level ratio deviation to level comparator window width Level comparator output saturation voltage Level comparator output leak current RSSI output offset IF limiter input resistance
Measurement circuit 6 V1=1.4 to 1.0 V Measurement circuit 6 1=1.0 V Measurement circuit 7 Measurement circuit 2 -- -- Measurement circuit 2, data filter fc=2.4 kHz -- Measurement circuit 9 Measurement circuit 8 Measurement circuit 10 --
--6--
Electrical Characteristics Measurement Circuit
V1
V1 VCC 20 19 18 17 16 15 14 13 12 11 0V V2 1.4V
1.4V
V1
1.4V
VCC
A
100k
V
1V V2 14 13 15
A
12
Measurement circuit 2
VCC 11
1V
V2
20
19
18
17
16
15
14
13
20
19
18
17
16
12
11
Measurement circuit 1
0.01 1 8.2k 1200p 1200p 1200p
Measurement circuit 3
1
2
3
4
5
6
7
8
9
10
1
50 Vin
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10 Vin
V
--7--
V1 VCC V3 0.5V 100 1.4V V1 VCC 1.4V to 1.0V
V1
1.4V
VCC
A
100k
50 12 11
V
1V V2
V
18 17 16 15 14
V
1V V2 13 12 11 20 19 18 17 16 15 14
1V V2 13 12 11
20
19
18
17
16
15
14
13
20
19
Measurement circuit 4
Measurement circuit 5
Measurement circuit 6
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
Vin
CXA3107N
V1 VCC
1.4V
V1
1.4V
V1
1.4V
VCC
50 12 11 20 19 18 17 16 15 14 13 12 11 20 19 18 17 16 15 14
V
1V V2 100k 1V V2
A V
VCC 50 13 12 11
1V V2
V
20
19
18
17
16
15
14
13
Measurement circuit 7
Measurement circuit 8
Measurement circuit 9
1
0.2V Vin
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
9
10
1
2
3
4
5
6
7
8
0.1V
9
10 Vin
--8--
V
100p 12 11
V1
1.4V
1V V2
20
19
18
17
16
15
14
13
Measurement circuit 10
1
Vin
2
3
4
5
6
7
8
9
10
0.1V
CXA3107N
Block Diagram and Application Circuit
P17 LVA P16 NRZ P19 REG P12 RSSI P11 LEVEL 100k R5 R6 S3 100k S4 S2 100k
17 VB REG CHARGE BS LVA NRZ COMP 16 15 14 13 FIL SW 11 RSSI COMP OUT LEVEL COMP AUDIO 10
VCC P201
220
0.01
0.01
C1 C3
10
PNP
C4
GND GND 20 19 18 12
R3
10
GND
GND
R2
GND CHARGE
22k
78k
REG QUAD DET IF LIM
FILTER
CHG OFF
1
C6
2
3
4
5
6
7
C9
8
C10
100p
9
C11
RF
1200p
1200p
R7
R1
50
DISK
8.2k
C2 GND
GND
S1
GND
C7 C8
0.01
10
1200p
B1
1
0.01
GND
C12
R8 AUDIO P10 GND P203
GND P202
C5
R4
GND
--9--
GND
CXA3107N
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
CXA3107N
Application Note 1) Power Supply The CXA3107N, with built-in regulator, is designed to permit stable operation at wide range of supply voltage from 1.1 to 4.0 V. Decouple the wiring to VCC (Pin 20) as close to the pin as possible. 2) IF Limiter Amplifier The gain of this IF limiter amplifier is approximately 100 dB. Take notice of the following points in making connection to the IF limiter amplifier input pin (Pin 1). a) Wiring to the IF limiter amplifier input (Pin 1) should be as short as possible. b) As the IF limiter amplifier output appears at QUAD (Pin 5), wiring to the ceramic discriminator connected to QUAD should be as short as possible to reduce the interface with the mixer output and IF limiter amplifier input.
1 2 3 4 5 6
As short as possible
Fig. 1 3) Quick Charge In order to hasten the rising time from when power is turned on, the CXA3107N features a quick charge circuit. Therefore, the quick charge circuit eliminates the need to insert a capacitor between the detector output and the LPF as is the case with conventional ICs. But a capacitor should be connected to Pin 4 to determine the average signal level during steady-state reception. The capacitance value connected to Pin 4 should be chosen such that the voltage does not vary much due to discharge during battery saving. Connect a signal for controlling the quick charge circuit to Pin 15. Setting this pin high enables the quick charge mode, and setting this pin low enables the steady-state reception mode. Quick charge is used when the power supply is turned on. The battery saving must be set high at the time. Connect Pin 15 to GND when quick charge is not being used.
Timing Power supply (Pin 20) Quick charge (Pin 15) Battery save (Pin 14) H L H L active battery saving
Fig. 2
--10--
CXA3107N
4) Detector The detector is of quadrature type. To perform phase shift, connect a ceramic discriminator to Pin 5. The phase shifting capacitor for the quadrature detector is incorporated. The FM (FSK) signal demodulated with the detector will be output to AUDIO (Pin 10) through the internal LPF. The AUDIO output is the anti-phase output to NRZ OUT. The CDBM455C50 (MURATA MFG. CO., LTD) ceramic discriminator is recommended for the CXA3107N. For the 2-level system, the CDBM455C28 can also used.
4 5 6
8.2k Ceramic discriminator CDBM455C50
VCC
Fig. 3 5) Filter Buffer, Level Comparator and NRZ Comparator The LPF circuit is built in this IC. The LPF output is connected internally to the NRZ comparator, level comparator and quick charge circuit.
16 10 11 L.C. LPF 0.2V DET
4
Fig. 4 Using the LPF, remove noise from the demodulated signal and input the signal to the above three circuits. The level comparator and the NRZ comparator shape waveform of this input signal and output it as a square wave. The comparator output stage is for open collector. Thus, if the CPU is of CMOS type and the supply voltage is different, a direct interface as illustrated in the figure below can be implemented.
VCC 1.4V VCC 20 CMOS power supply
(11) 16 Comparator output CMOS IC
Fig. 5 6) REG CONT Controls the base bias of the external transistors. --11--
CXA3107N
7) LVA OUT The pin goes high (open) when the supply voltage becomes low. Since the output is an open collector, it can be used to directly drive CMOS device. The setting voltage of the LVA is 1.05 V (typ.), and it possesses a hysteresis with respect to the supply voltage. The hysteresis width is 50 mV (typ.). 8) B.S. Operation of the CXA3107N can be halted by setting this pin low. This pin can be connected directly to CMOS device. The current consumption for battery saving is 20 A or less (at 1.4 V).
B.S. 14
Fig. 6 9) M-ary (M = 2- or 4-level) FSK Demodulation System Polarity discrimination output and MSB comparator output are used to demodulate the 4-level waveform shown below. [4-level FSK demodulating waveform]
+4.8kHz
+1.6kHz 01 00 10 11 01 10 00
-1.6kHz
-4.8kHz
[NRZ OUT] Polarity discrimination output
POS
(When the input frequency is higher than the local frequency)
0
0
1
1
0
1
0
NEG
(The polarity can be inverted by setting the local frequency higer than the input frequency.)
[L.C. OUT] MSB comparator output
1.6kHz
1
0
0
1
1
0
0
4.8kHz
--12--
CXA3107N
The 4-level FSK demodulating data is divided into NRZ OUT and L.C. OUT shown above. Here, NRZ OUT corresponds to a conventional NRZ comparator output. L.C. OUT is made comparing the demodulated waveform amplitude to the IC internal reference voltage levels. When the threshold value of L.C. OUT is not appropriate to the detector output, the resistance value on Pin 5 should be varied for the detector output level adjustment or the resistor should be inserted between Pin 3 and VCC for the level comparator threshold value adjustment. For the 2-level FSK demodulation, it corresponds to a conventional NRZ comparator output.
3
R VCC
10) Principle of Quick Charge Operation BUF in Fig. 7 is the detector buffer amplifier and AMP is the operational amplifier used to construct the LPF. COMP is the level comparator or the NRZ comparator. The CXA3107N has a feedback loop from the comparator input to the input circuit of the detector output buffer. This equalizes the average value of the comparator input voltage to the reference voltage, with the quick charge circuit of CHG being set in the feedback loop. Switching the current of the quick charge circuit enables reduction of the rise time. In this block, CHG is a comparator which compares input voltages and outputs a current based on this comparison. The current on CHG is switched between high and low at Pin 15. When the power is turned on, switch the current to high to increase the charge current at C in Fig. 7 and shorten the time constant. During steady-state reception mode, switch the current to low, lengthening the charge time constant and allowing for stable data retrieval. Also, controlling Pin 6 can make the current off. This is effective when the same data are received continuously.
10 LPF BUF CHG COMP 16
4
C
Reference voltage
Fig. 7 11) S Curve Characteristics Even if the IF IN input signal frequency is deviated, the feedback is applied to the DETOUT operating point so as to match it to the comparator reference voltage by the quick charge operation shown in Fig. 7. Therefore, this feedback must be halted in order to evaluate the S curve characteristics. To execute the evaluation, measure the average voltage on Pin 10 first and input this voltage to Pin 4 from the external power supply. --13--
CXA3107N
12) Control Pins The function controls are as shown below. PIN No. 13 6 14 Symbol FIL SW CHG OFF BS Data filter cut-off Pin 4 charge Battery saving Function control current control mode control Input high fc: Low Slow charge off IC operation Input low fc: High Slow charge operation Sleep Note) Pin 6 control should be performed with Pin 15 low. When each function is not controlled externally, set it to the state with asterisk (). 13) LPF Constant The data filter cut-off (fc) is expressed with the following equation. fc 1 2CR
15 CHARGE Pin 4 charge speed control Quick charge Slow charge
C: External capacitance R: IC internal resistance
R is approximately 55 k 20 % when Pin 13 is low. The table below shows the example of constant to data rate. Capacitance (pF) H L H L H L H L 6800 1500 1200 1200 fc (Hz) -- 430 950 1900 1200 2400 1200 2400 Data rate -- 512 bps (2 levels) 1200 bps (2 levels) 2400 bps (2 levels) 1600 bps (2 levels) 3200 bps (2 levels) 3200 bps (2 levels) 6400 bps (2 levels)
14) Misoperation Prevention Function for Continuous Data The offset to the comparator threshold value of the detector output is canceled with the feedback loop indicated in the paragraph 10). This operation assumes that "0" and "1" are in equal numbers in the data. The offset is occurred when the "0" or "1" data are received continuously. In this case, setting Pin 6 high to make the charge current off prevents the offset occurrence. Without using this function, the stability for the same data continuously received depends on the capacitance value on Pin 4 shown in the paragraph 10). When this capacitance value is increased, the data is demodulated more stably; however, it takes more time for the IC to rise. If this function is not used, be sure to connect Pin 6 to GND.
Pin 13 filter switch
Reception signal
Sync part
Data
Sync part
Data
H CHG OFF (Pin 6) L
Fig. 8 --14--
CXA3107N
Example of Representative Characteristics
Supply voltage vs. Current consumption 1000 5.93A (VCC=1.4V) in BS mode 900
Current consumption (A)
800
700
600
500
400
1.0
2.0
3.0 4.0 Supply voltage (V) Audio respnse and RSSI output voltage characteristics
0
S+N+D RSSI
1000
10
800
20
600 0dBm=66.5mVrms
30
IF 455kHz Dev. 4.8kHz AUDIO 1.6kHz VCC=1.4V 25C
400
40
200
50
0
60 S/N
70
-100 10
-90 20
-80 30
-70 40
-60 50
-50 60
-40 70
-30 80
-20
-10 (dBm) (dB)
Input level (dB) Level comparator characteristics 1.4
Comparator output voltage (V)
1.2 1.0 0.8 160 0.6 0.4 0.2 0 150 200 250 300 Comparator input voltage (mV) 48mV 52mV 162 263 264
--15--
RSSI output voltage (mV)
Audio response (dB )
CXA3107N
NRZ comparator characteristics
1.4
Comparator output voltage (V)
1.2 1.0 207 0.8 0.6 48mV 0.4 0.2 0 160 180 200 220 240 260 280 Comparator input voltage (mV) Variable cut-off characteristics of audio filter fCH=2.4kHz 0 fCL=1.2kHz -10 Pin 13 voltage :L :H 25C 214
Response (dB)
-20
-30
-40
-50
-60
200
500
1k
5k 10k Input frequency (Hz)
Detector output level temperature characteristics
Detector output level (mvrms)
70
60
50
-20
0
25
50 75 Temperature (C)
--16--
CXA3107N
Threshold level characteristics 100 : LH : HL
Threshold level -214 (mV)
50
0 -20 0 25 50 75 Temperature (C)
-50
-100
--17--
CXA3107N
Package Outline
Unit : mm
20PIN SSOP (PLASTIC)
6.5 0.1 + 0.2 1.25 - 0.1 0.1 20 11 A
4.4 0.1
1
10 0.65
b
0.13 M
+ 0.05 0.15 - 0.02
(0.22) 0.1 0.1
b=0.22 0.03
0.5 0.2
DETAIL B : SOLDER
(0.15)
DETAIL B : PALLADIUM
NOTE: Dimension "" does not include mold protrusion. 0 to 10
PACKAGE STRUCTURE
DETAIL A
PACKAGE MATERIAL SONY CODE EIAJ CODE JEDEC CODE SSOP-20P-L01 SSOP020-P-0044 LEAD TREATMENT LEAD MATERIAL PACKAGE MASS EPOXY RESIN SOLDER / PALLADIUM PLATING 42/COPPER ALLOY 0.1g
NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame).
--18--
+ 0.03 0.15 - 0.01
+ 0.1 b=0.22 - 0.05
6.4 0.2


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