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| a FEATURES High Speed 41 MHz, -3 dB Bandwidth 125 V/ s Slew Rate 80 ns Settling Time Input Bias Current of 20 pA and Noise Current of 10 fA/Hz Input Voltage Noise of 12 nV/Hz Fully Specified Power Supplies: 5 V to 15 V Low Distortion: -76 dB at 1 MHz High Output Drive Capability Drives Unlimited Capacitance Load 50 mA Min Output Current No Phase Reversal When Input Is at Rail Available in 8-Lead SOIC APPLICATIONS CCD Low Distortion Filters Mixed Gain Stages Audio Amplifier Photo Detector Interface ADC Input Buffer DAC Output Buffer PRODUCT DESCRIPTION Low Cost, General Purpose High Speed JFET Amplifier AD825 CONNECTION DIAGRAM 8-Lead Plastic SOIC (R) Package NC -IN +IN -VS 1 2 3 4 8 NC +VS OUTPUT NC AD825 TOP VIEW (Not to Scale) 7 6 5 NC = NO CONNECT The AD825 is a superbly optimized operational amplifier for high speed, low cost and dc parameters, making it ideally suited for a broad range of signal conditioning and data acquisition applications. The ac performance, gain, bandwidth, slew rate and drive capability are all very stable over temperature. The AD825 also maintains stable gain under varying load conditions. The unique input stage has ultralow input bias current and ultralow input current noise. Signals that go to either rail on this high performance input do not cause phase reversals at the output. These features make the AD825 a good choice as a buffer for MUX outputs, creating minimal offset and gain errors. The AD825 is fully specified for operation with dual 5 V and 15 V supplies. This power supply flexibility, and the low supply current of 6.5 mA with excellent ac characteristics under all supply conditions, makes the AD825 well suited for many demanding applications. Figure 1. Performance with Rail-to-Rail Input Signals REV. C Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 World Wide Web Site: http://www.analog.com Fax: 781/326-8703 (c) Analog Devices, Inc., 1999 AD825-SPECIFICATIONS (@ T = +25 C, V = A S 15 V unless otherwise noted) VS 15 V 15 V 15 V 15 V 15 V 15 V 15 V 15 V 15 V 15 V Min 23 18 44 125 AD825A Typ 26 21 46 140 150 180 -77 1.3 2.1 1 10 15 V 15 5 700 15 V 20 5 440 15 V 15 V 15 V 70 70 72 15 V 15 V 15 V 15 V 71 76 76 74 80 12 10 13.5 13 12.9 50 13.3 13.2 100 5 x 10 6 11 Parameter DYNAMIC PERFORMANCE Unity Gain Bandwidth Bandwidth for 0.1 dB Flatness -3 dB Bandwidth Slew Rate Settling Time to 0.1% Settling Time to 0.01% Total Harmonic Distortion Differential Gain Error (RLOAD = 150 ) Differential Phase Error (RLOAD = 150 ) INPUT OFFSET VOLTAGE Conditions Max Units MHz MHz MHz V/s ns ns dB % Degrees Gain = +1 Gain = +1 RLOAD = 1 k, G = 1 0 V-10 V Step, AV = -1 0 V-10 V Step, AV = -1 FC = 1 MHz, G = -1 NTSC Gain = +2 NTSC Gain = +2 TMIN to TMAX 180 220 2 5 40 Offset Drift INPUT BIAS CURRENT TMIN TMAX INPUT OFFSET CURRENT TMIN TMAX OPEN LOOP GAIN VOUT = 10 V RLOAD = 1 k VOUT = 7.5 V RLOAD = 1 k VOUT = 7.5 V RLOAD = 150 (50 mA Output) VCM = 10 V f = 10 kHz f = 10 kHz mV mV V/C pA pA pA pA pA pA dB dB dB dB nV/Hz fA/Hz V V V mA mA pF 30 COMMON-MODE REJECTION INPUT VOLTAGE NOISE INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE OUTPUT VOLTAGE SWING Output Current Short-Circuit Current INPUT RESISTANCE INPUT CAPACITANCE OUTPUT RESISTANCE POWER SUPPLY Quiescent Current RLOAD = 1 k RLOAD = 500 15 V 15 V 15 V 15 V Open Loop 15 V 15 V 8 6.5 7.2 7.5 TMIN to TMAX NOTES All limits are determined to be at least four standard deviations away from mean value. . Specifications subject to change without notice. mA mA -2- REV. C SPECIFICATIONS (@ T = +25 C, V = A S 5 V unless otherwise noted) VS 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V 5 V Min 18 8 34 115 AD825A Typ 21 10 37 130 75 90 -76 1.2 1.4 1 10 5 V 10 5 600 5 V 15 5 280 5 V 64 64 5 V 5 V 5 V 5 V 69 66 66 80 12 10 3.5 3.2 3.1 50 3.4 3.2 80 5 x 10 6 11 AD825 Max Units MHz MHz MHz V/s ns ns dB % Degrees 2 5 30 mV mV V/C pA pA pA pA pA pA dB dB dB nV/Hz fA/Hz V V V mA mA pF 6.8 7.5 mA mA dB Parameter DYNAMIC PERFORMANCE Unity Gain Bandwidth Bandwidth for 0.1 dB Flatness -3 dB Bandwidth Slew Rate Settling Time to 0.1% Settling Time to 0.01% Total Harmonic Distortion Differential Gain Error (RLOAD = 150 ) Differential Phase Error (RLOAD = 150 ) INPUT OFFSET VOLTAGE Conditions Gain = +1 Gain = +1 RLOAD = 1 k, G = -1 -2.5 V to +2.5 V -2.5 V to +2.5 V FC = 1 MHz, G = -1 NTSC Gain = +2 NTSC Gain = +2 TMIN to TMAX 90 110 Offset Drift INPUT BIAS CURRENT TMIN TMAX INPUT OFFSET CURRENT Offset Current Drift OPEN LOOP GAIN TMIN TMAX VOUT = 2.5 V RLOAD = 500 RLOAD = 150 VCM = 2 V f = 10 kHz f = 10 kHz 25 COMMON-MODE REJECTION INPUT VOLTAGE NOISE INPUT CURRENT NOISE INPUT COMMON-MODE VOLTAGE RANGE OUTPUT VOLTAGE SWING Output Current Short-Circuit Current INPUT RESISTANCE INPUT CAPACITANCE OUTPUT RESISTANCE POWER SUPPLY Quiescent Current RLOAD = 500 RLOAD = 150 5 V 5 V 5 V Open Loop 5 V 5 V 76 8 6.2 88 TMIN to TMAX POWER SUPPLY REJECTION VS = 5 V to 15 V NOTES All limits are determined to be at least four standard deviations away from mean value. Specifications subject to change without notice. REV. C -3- AD825 Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 V Internal Power Dissipation2 Small Outline (R) . . . . . . . . . . . . . . . . . See Derating Curves Input Voltage (Common Mode) . . . . . . . . . . . . . . . . . . . . VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . VS Output Short Circuit Duration . . . . . . . . See Derating Curves Storage Temperature Range R . . . . . . . . . . . -65C to +125C Operating Temperature Range . . . . . . . . . . . -40C to +85C Lead Temperature Range (Soldering 10 sec) . . . . . . . . +300C NOTES 1Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. 2Specification is for device in free air: 8-lead SOIC package: = 155C/W. JA 2.0 MAXIMUM POWER DISSIPATION - Watts ABSOLUTE MAXIMUM RATINGS 1 PIN CONFIGURATION NC 1 -IN 2 8 NC 7 +VS TOP VIEW +IN 3 (Not to Scale) 6 OUTPUT -VS 4 5 NC AD825 NC = NO CONNECT TJ = +150 C 1.5 1.0 8-LEAD SOIC PACKAGE 0.5 0 -50 -40 -30 -20 -10 0 10 20 30 40 50 60 70 AMBIENT TEMPERATURE - C 80 90 Figure 2. Maximum Power Dissipation vs. Temperature ORDERING GUIDE Model AD825AR AD825ACHIPS AD825AR-REEL AD825AR-REEL7 Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C Package Description 8-Lead Plastic SOIC Die 13" Tape and Reel 7" Tape and Reel Package Option SO-8 SO-8 SO-8 CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD825 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE -4- REV. C Typical Characteristics- AD825 20 15 10 OUTPUT SWING - Volts 100 10 OUTPUT IMPEDANCE - 16 18 5 0 -5 -10 -15 -20 RL = 150 RL = 1k 1 0.1 0 2 4 6 8 10 12 SUPPLY VOLTAGE - Volts 14 0.01 100 1k 10k 100k FREQUENCY - Hz 1M 10M Figure 3. Output Voltage Swing vs. Supply Figure 6. Closed-Loop Output Impedance vs. Frequency 15 35 BANDWIDTH 80 10 VS = OUTPUT SWING - Volts 30 15V UNITY GAIN BANDWIDTH - MHz 5 60 20 PHASE MARGIN 15 40 10 0 VS = 5V -5 VS = -10 15V 5 0 -60 20 -40 -20 0 60 20 40 80 TEMPERATURE - C 100 120 140 -15 0 100 200 300 400 500 600 700 LOAD RESISTANCE - Ohms 800 900 1000 Figure 4. Output Voltage Swing vs. Load Resistance Figure 7. Unity Gain Bandwidth and Phase Margin vs. Temperature 7.0 -40 +25 SUPPLY CURRENT - mA 80 VS = 70 60 50 40 30 20 10 VS = 5V 15V 180 135 90 45 0 OPEN-LOOP PHASE - Degrees +85 6.0 5.5 5.0 OPEN-LOOP GAIN - dB 6.5 0 2 4 6 8 10 12 14 SUPPLY VOLTAGE - V 16 18 20 0 1k 10k 100k 1M FREQUENCY - Hz 10M 100M Figure 5. Quiescent Supply Current vs. Supply Voltage for Various Temperatures Figure 8. Open-Loop Gain and Phase Margin vs. Frequency REV. C -5- PHASE MARGIN - C 25 AD825 80 30 RL = 1k OPEN-LOOP GAIN - dB 75 VS = 70 15V OUTPUT VOLTAGE - Volts p-p 20 RL = 150 VS = 65 5V 10 60 0 100 1k LOAD RESISTANCE - 10k 10k 100k 1M FREQUENCY - Hz 10M Figure 9. Open-Loop Gain vs. Load Resistance Figure 12. Large Signal Frequency Response; G = +2 10 0 -10 -PSRR 200 180 160 SETTLING TIME - ns -20 140 120 0.01% 100 80 60 40 20 0.1% 0.1% 0.01% PSR - dB -30 +PSRR -40 -50 -60 -70 -80 -90 10k 100k 1M FREQUENCY - Hz 10M 0 10 8 6 4 2 0 -2 -4 OUTPUT SWING - 0 to V -6 -8 -10 Figure 10. Power Supply Rejection vs. Frequency Figure 13. Output Swing and Error vs. Settling Time 130 120 -50 -55 110 VS = CMR - dB 15 DISTORTION - dB 100 90 80 70 60 50 VS = 5 -60 2nd -65 3rd -70 -75 -80 40 30 10 100 1k 100k 10k FREQUENCY - Hz 1M 10M -85 100k 1M FREQUENCY - Hz 10M Figure 11. Common-Mode Rejection vs. Frequency Figure 14. Harmonic Distortion vs. Frequency -6- REV. C AD825 160 15V 140 120 SLEW RATE - V/ s +VS 10 F 5V 0.01 F 100 80 60 40 20 0 -60 HP PULSE (LS) OR FUNCTION (SS) GENERATOR VOUT VIN AD825 0.01 F 50 10 F -VS TEKTRONIX P6204 FET PROBE RL TEKTRONIX 7A24 PREAMP -40 -20 0 20 40 80 60 TEMPERATURE - C 100 120 140 Figure 15. Slew Rate vs. Temperature Figure 18. Noninverting Amplifier Connection 2 1 0 -1 -2 GAIN - dB -3 -4 -5 -6 -7 -8 1k 10k 100k 1M FREQUENCY - Hz 10M VIN VOUT VS 0.1dB FLATNESS 5V 10MHz 15V 21MHz Figure 16. Closed-Loop Gain vs. Frequency, Gain = +1 Figure 19. Noninverting Large Signal Pulse Response, RL = 1 k 2 1 0 -1 GAIN - dB -2 -3 -4 -5 -6 -7 -8 1k 10k 100k 1M FREQUENCY - Hz 10M VS 0.1dB FLATNESS 5V 7.7MHz 15V 9.8MHz VIN 1k 1k VOUT Figure 17. Closed-Loop Gain vs. Frequency, Gain = -1 Figure 20. Noninverting Small Signal Pulse Response, RL = 1 k REV. C -7- AD825 Figure 21. Noninverting Large Signal Pulse Response, RL = 150 Figure 24. Inverting Large Signal Pulse Response, RL = 1 k Figure 22. Noninverting Small Signal Pulse Response, RL = 150 Figure 25. Inverting Small Signal Pulse Response, RL = 1 k 1k +VS 10 F 0.01 F RIN HP VIN 1k PULSE GENERATOR 50 VOUT AD825 0.01 F TEKTRONIX P6204 FET PROBE TEKTRONIX 7A24 PREAMP 10 F -VS CL 1000pF Figure 23. Inverting Amplifier Connection -8- REV. C AD825 1k 10 F DRIVING CAPACITIVE LOADS +VS The internal compensation of the AD825, together with its high output current drive, permits excellent large signal performance while driving extremely high capacitive loads. THEORY OF OPERATION 0.01 F HP PULSE GENERATOR RIN VIN 1k 50 VOUT AD825 0.01 F TEKTRONIX P6204 FET PROBE TEKTRONIX 7A24 PREAMP CL 10 F -VS The AD825 is a low cost, wide band, high performance FET input operational amplifier. With its unique input stage design, the AD825 assures no phase reversal even for inputs that exceed the power supply voltages, and its output stage is designed to drive heavy capacitive or resistive load with small changes relative to no load condition. The AD825 (Figure 27) consists of common-drain commonbase FET input stage driving a cascoded, common base matched NPN gain stage. The output buffer stage uses emitter followers in a class AB amplifier that can deliver large current to the load while maintaining low levels of distortion. The capacitor, CF, in the output stage, enables the AD825 to drive heavy capacitive load. For light load, the gain of the output buffer is close to unity, CF is bootstrapped and not much happens. As the capacitive load is increased, the gain of the output buffer is decreased and the bandwidth of the amplifier is reduced through a portion of CF adding to the dominant pole. As the capacitive load is further increased, the amplifier's bandwidth continues to drop, maintaining the stability of the AD825. Input Consideration Figure 26a. Inverting Amplifier Driving a Capacitive Load INPUT OUTPUT Figure 26b. Inverting Amplifier Pulse Response While Driving a 400 pF Capacitive Loads VPOS The AD825 with its unique input stage assures no phase reversal for signals as large or even larger than the supply voltages. Also, layout considerations of the input transistors assure functionality even with a large differential signal. The need for a low noise input stage calls for a larger FET transistor. One should consider the additional capacitance that is added to assure stability. When filters are designed with the AD825, one needs to consider the input capacitance (5 pF-6 pF) of the AD825 as part of the passive network. Grounding and Bypassing NEG POS CF VOUT The AD825 is a low input bias current FET amplifier. Its high frequency response makes it useful in applications such as photo diode interfaces, filters and audio circuits. When designing high frequency circuits, some special precautions are in order. Circuits must be built with short interconnects, and resistances should have low inductive paths to ground. Power supply leads should be bypassed to common as close as possible to the amplifier pins. Ceramic capacitors of 0.1 F are recommended. VNEG Figure 27. Simplified Schematic REV. C -9- AD825 Second Order Low-Pass Filter A second order Butterworth low-pass filter can be implemented using the AD825 as shown in Figure 28. The extremely low bias currents of the AD825 allow the use of large resistor values, and consequently small capacitor values, without concern for developing large offset errors. Low current noise is another factor in permitting the use of large resistors without having to worry about the resultant voltage noise. With the values shown, the corner frequency will be 1 MHz. The equations for component selection are shown below. Note that the noninverting input (and the inverting input) has an input capacitance of 6 pF. As a result, the calculated value of C1 (12 pF) is reduced to 6 pF. C1 24pF R1 9.31k VIN C2 6pF R2 9.31k +5V C3 0.1 F AD825 VOUT C4 0.1 F -5V Figure 28. Second Order Butterworth Low-Pass Filter C1= HIGH FREQUENCY REJECTION - dB 1.414 2 f CUTOFF R1 0 -10 -20 -30 -40 -50 -60 -70 -80 10k 100k 1M FREQUENCY - Hz 10M 100M 0.707 C2 ( farads) = 2 f CUTOFF R1 R1= R2 = user selected typically10k to 100 k ( ) A plot of the filter frequency response is shown in Figure 29; better than 40 dB of high frequency rejection is provided. Figure 29. Frequency Response of Second Order Butterworth Filter -10- REV. C AD825 OUTLINE DIMENSIONS Dimensions shown in inches and (mm). 8-Lead Plastic SOIC (SO-8) 0.1968 (5.00) 0.1890 (4.80) 8 5 4 0.1574 (4.00) 0.1497 (3.80) PIN 1 1 0.2440 (6.20) 0.2284 (5.80) 0.0500 (1.27) BSC 0.0098 (0.25) 0.0040 (0.10) SEATING PLANE 0.0688 (1.75) 0.0532 (1.35) 0.0192 (0.49) 0.0138 (0.35) 8 0.0098 (0.25) 0 0.0075 (0.19) 0.0196 (0.50) 0.0099 (0.25) 45 0.0500 (1.27) 0.0160 (0.41) REV. C -11- PRINTED IN U.S.A. C3206c-0-12/99 |
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