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INTEGRATED CIRCUITS DATA SHEET TDA9859 Universal hi-fi audio processor for TV Preliminary specification File under Integrated Circuits, IC02 1997 Sep 01 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV FEATURES * Multi-source selector switches six AF inputs (three stereo sources or six mono sources) * Each of the input signals can be switched to each of the outputs (crossbar switch) * Outputs for loudspeaker channel and peri-TV connector (SCART) * Switchable spatial stereo and pseudo stereo effects * Audio surround decoder can be added externally * Two general purpose logic output ports * I2C-bus control of all functions. QUICK REFERENCE DATA SYMBOL VP IP Vi(rms) Vo(rms) Gv supply current input signal levels for 0 dB gain (RMS value) output signal levels for 0 dB gain (RMS value) voltage gain in main channel volume control (1 dB steps, balance included) mute bass control (1.5 dB steps) treble control (3 dB steps) THD S/N Tamb total harmonic distortion signal-to-noise ratio operating ambient temperature -63 -80 -12 -12 - - 0 - - - - 0.1 85 - PARAMETER positive supply voltage (pin 6) - 2 2 MIN. 7.2 TYP. 8.0 25 - - - - - GENERAL DESCRIPTION TDA9859 The TDA9859 provides control facilities for the main and the SCART channel of a TV set. Due to extended switching possibilities, signals from three stereo sources can be handled. MAX. 8.8 V UNIT mA V V dB dB dB dB % dB C +15 - +15 +12 - - 70 ORDERING INFORMATION TYPE NUMBER TDA9859 PACKAGE NAME SDIP32 DESCRIPTION plastic shrink dual in-line package; 32 leads (400 mil) VERSION SOT232-1 1997 Sep 01 2 ewidth 1997 Sep 01 I2C-bus 33 nF MAD SDA SCL 5.6 nF CBL1 CTL 19 31 P2 25 17 16 22 21 (1) BLOCK DIAGRAM SCART output L R CBL2 SCOUTL SCOUTR 7 Philips Semiconductors 26 L AIN L 28 AUX 2 P1 R 470 nF AINR 30 TDA9859 I2C-BUS INTERFACE L 470 nF SCIN L 1 MULTIPLE SOURCE AND MODE SELECTOR audio inputs SCART R STEREO SPATIAL STEREO MUTE 15 LOUTR PSEUDO STEREO VOLUME CONTROL BASS CONTROL 27 11 CBR1 CBR2 (1) 470 nF SCIN R 32 18 LOUTL L 470 nF MIN L 3 (CROSSBAR SWITCH) L MAIN R 470 nF MIN R 5 loudspeaker channel outputs R Universal hi-fi audio processor for TV 470 nF FORCED MONO TREBLE CONTROL 14 3 8 GND CPS1 L R 33 nF extended bass control (1) 11 (22) 68 nF 12 (21) 0.15 F CPS2 CTR 29 12 24 9 23 10 MOUTL MOUTR LINL LINR 5.6 nF 13 k +8 V VP 6 REFERENCE VOLTAGE VOLUME BALANCE 4 MHA778 CSMO 100 F LINE output or optional surround sound decoder connection (1) For extended bass control, the capacitor between CBR/L1 and CBR/L2 should be replaced by the extended bass control network. Preliminary specification TDA9859 Fig.1 Block diagram and application circuit. Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV PINNING SYMBOL SCINL P1 MINL CSMO MINR VP SCOUTR GND MOUTR LINR CBR1 CBR2 n.c. CTR LOUTR SCL SDA LOUTL CTL n.c. CBL2 CBL1 LINL MOUTL MAD SCOUTL CPS2 AINL CPS1 AINR P2 SCINR PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 DESCRIPTION SCART input; left channel port 1 output MAIN input; left channel smoothing capacitor of reference voltage MAIN input; right channel supply voltage SCART output; right channel ground MAIN output; right channel input to right loudspeaker channel bass capacitor connection 1; right channel bass capacitor connection 2; right channel not connected treble capacitor connection; right channel loudspeaker output; right channel serial clock input; I2C-bus serial data input/output; I2C-bus loudspeaker output; left channel treble capacitor connection; left channel not connected bass capacitor connection 2; left channel bass capacitor connection 1; left channel input to left loudspeaker channel MAIN output; left channel module address select input SCART output; left channel pseudo stereo capacitor 2 AUX input; left channel pseudo stereo capacitor 1 AUX input; right channel port 2 output SCART input signal RIGHT Fig.2 Pin configuration. handbook, halfpage TDA9859 SCINL P1 MINL CSMO MINR VP SCOUTR GND MOUTR 1 2 3 4 5 6 7 8 32 SCINR 31 P2 30 AINR 29 CPS1 28 AINL 27 CPS2 26 SCOUTL 25 MAD TDA9859 9 24 MOUTL 23 LINL 22 CBL1 21 CBL2 20 n.c. 19 CTL 18 LOUTL 17 SDA LINR 10 CBR1 11 CBR2 12 n.c. 13 CTR 14 LOUTR 15 SCL 16 MHA779 1997 Sep 01 4 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV FUNCTIONAL DESCRIPTION The TDA9859 consists of the following functions: * Source select switching block * Loudspeaker channel with effect controls * Two port outputs for general purpose * I2C-bus control. Source select switching block The TDA9859 selects and switches the input signals from three stereo or six mono sources MAIN, AUX and SCART (see Fig.1) to the outputs SCART and loudspeaker (crossbar-switching; Table 4). The main channel (LINE outputs) is looped outside the circuit (from pins 9 and 24 to pins 10 and 23), so signals can be used as LINE output or a surround sound decoder can be inserted. Loudspeaker channel Volume control is divided into volume control common and volume control left/right. The common part (-40 to +15 dB) controls the left and right channels TDA9859 simultaneously; the left/right part (-23 to 0 dB) controls the volume of left and right channels independently. Treble control provides a control range from -12 to +12 dB and bass control from -12 to +15 dB. Extended bass control can be provided by an external T-network (see Fig.1) from -15 to +19 dB (2 dB steps). Effect controls `Linear stereo', `stereo with spatial effect (30% or 52% anti-phase crosstalk)' and `forced mono with or without pseudo-stereo effect' are controlled by three bits. A muting of 85 dB is provided. I2C-bus control All settings of control are stored in subaddress registers. Data transmission is simplified by auto-incrementing the subaddresses. The on-chip Power-on reset sets the mute bit to active, so both the SCART and the loudspeaker outputs are muted. The muting can be switched off by writing a `0' (non-muted) into the mute control bits. LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 134). SYMBOL VP Vn IO supply voltage (pin 6) voltage on all pins, ground excluded output current at LOUT and SCOUT pins at port output pins Ptot Tamb Tstg Ves total power dissipation operating ambient temperature storage temperature electrostatic handling for all pins; note 1 electrostatic handling for all pins; note 2 Notes 1. Equivalent to discharging a 200 pF capacitor through a 0 series resistor (Machine Model). 2. Equivalent to discharging a 100 pF capacitor through a 1.5 k series resistor (Human Body Model). THERMAL CHARACTERISTICS SYMBOL Rth(j-a) PARAMETER thermal resistance from junction to ambient CONDITIONS in free air VALUE 60 UNIT K/W - - - 0 -25 - - 2.5 1.5 850 70 +150 300 2000 mA mA mW C C V V PARAMETER 0 0 MIN. 10 VP MAX. V V UNIT 1997 Sep 01 5 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV TDA9859 CHARACTERISTICS VP = 8 V; Tamb = 25 C; treble and bass in linear positions (0 dB); volume control left/right 0 dB; spatial function, pseudo-stereo function and forced-mono function in off position and measurements taken in Fig.1; unless otherwise specified. SYMBOL VP IP Vref V4 VI PARAMETER supply voltage (pin 6) supply current (pin 6) internal reference voltage voltage at pin 4 CONDITIONS MIN. 7.2 - - - - TYP. 8.0 25 0.5VP - - MAX. 8.8 UNIT V mA V V VP - 0.1 - 0.5VP - DC voltage on pins DC input voltage at pins 1, 3, 5, 10, 23, 28, 30 and 32 (inputs SCIN, MIN, LIN and AIN) DC output voltage at pins 7, 9, 15, 18, 24, 26 (outputs SCOUT, MOUT and LOUT) DC voltage on capacitors (pins 11, 12, 14, 19, 21, 22, 27 and 29) THD 0.5% on output pins V VO - 0.5VP - V VC - 0.5VP - V Audio select switch; line and SCART outputs (controlled via I2C-bus); see Table 4 Vi(rms) Ri B-0.5 dB Vo(rms) RL maximum AF input signal on pins SCIN, MIN and AIN (RMS value) input resistance (pins SCIN, MIN and AIN) -0.5 dB bandwidth for pins SCOUT, MOUT and LOUT. maximum AF output signal on pins SCOUT and MOUT (RMS value) allowed external load resistance on output (pins MOUT) on output (pins SCOUT) Gv cr voltage gain from any input to SCART and MAIN outputs switch crosstalk on outputs between AF inputs at f = 10 kHz unused inputs connected to ground Gv = 0; THD 0.5% on output pins 15 and 18 10 5 - - - - 0 90 - - - - k k dB dB THD 0.5% 2 20 20 2 - 30 - - - 40 20 000 - V k Hz V Volume control common (f = 1 kHz, 55 steps) Vi(rms) Ri Gv maximum input signal (RMS value; pins LIN) input resistance (pins LIN) volume control common voltage gain nominal minimum -40 -38 - - +15 +14 dB dB 2 7.5 - 10 - - V k 1997 Sep 01 6 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV TDA9859 SYMBOL Gv PARAMETER volume control common voltage gain step width volume control common voltage gain set error CONDITIONS Gv = -32 to +15 dB Gv = -40 to -33 dB Gv = -32 to +15 dB Gv = -40 to -33 dB MIN. 0.5 0.25 - - TYP. 1.0 1.0 - - MAX. 1.5 1.75 1 2 UNIT dB dB dB dB Volume control left/right (f = 1 kHz, 24 steps) Gv volume control left/right voltage gain nominal minimum mute position Gv volume control left/right voltage gain step width volume control left/right voltage gain tracking error Bass control Gv bass control voltage gain maximum boost maximum attenuation Gv Gv(extended) bass control voltage gain step width extended bass control voltage gain maximum boost maximum attenuation Gv(extended) extended bass control voltage gain step width Treble control Gv treble control voltage gain maximum boost maximum attenuation Gv ct(spat1) ct(spat2) treble control voltage gain step width Effect controls anti-phase crosstalk by spatial effect 1 anti-phase crosstalk by spatial effect 2 phase shift by pseudo-stereo THD 0.5%; RL > 10 k; CL < 1.5 nF - - 52 30 - - % % f = 15 kHz f = 15 kHz 11 11 2.5 12 12 3 13 13 3.5 dB dB dB see Fig.1 f = 60 Hz f = 60 Hz 18 14 1 19 15 2 20 16 3 dB dB dB CB = 33 nF f = 40 Hz f = 40 Hz 14 11 1 15 12 1.5 16 13 2 dB dB dB -24 -23 -80 0.5 - - - -85 1.0 - 0 -1 - 1.5 2 dB dB dB dB dB see Fig.3 - - Loudspeaker channel outputs (pins 15 and 18) Vo(max)(rms) maximum output signal (RMS value) 2 V 1997 Sep 01 7 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV TDA9859 SYMBOL V15,18 PARAMETER maximum DC offset voltage between adjoining step and any step to mute for volume control for bass control for treble control CONDITIONS MIN. TYP. MAX. UNIT Gv = 0 to +15 dB/mute Gv = -64 to 0 dB/mute Gv = 0 to +15 dB/mute Gv = -12 to 0 dB/mute Gv = -12 to +12 dB/mute - - - - - - 10 - 2 0.5 2 0.5 0.5 - - - 102 32 27 20 - 15 10 15 10 10 100 - 1.5 - - - - 20000 mV mV mV mV mV k nF V V V V Hz Ro Ro(L) Co(L) Vno(W) output resistance allowed output load resistor allowed output load capacitor weighted noise voltage at output (quasi-peak level) CCIR 468-3 weighted Gv = +15 dB Gv = 0 dB Gv = -40 dB Gv = -80 dB (mute) - - - - 20 B-1 dB THD -1 dB bandwidth for loudspeaker channel total harmonic distortion for Vi(rms) = 0.2 V for Vi(rms) = 1 V for Vi(rms) = 2 V f = 20 to 12500 Hz Gv = -30 to +15 dB Gv = -30 to 0 dB Gv = -30 to -6 dB f = 10 kHz; Gv = 0 dB; opposite input grounded by 1 k resistor - - - - 0.1 0.1 0.1 75 0.3 0.3 0.3 - % % % dB cs(l-r) stereo channel separation ct(bus) Gv = 0 dB crosstalk from I2C-bus to AF outputs V bus(p-p) bus = 20 log -------------------- (Vbus = spurious V o(rms) I2C-bus signal voltage on AF output). power supply ripple rejection with 100 Hz ripple Gv = 0 dB; VR(rms) < 200 mV THD 0.5%; RL > 5 k - 100 - dB PSRR100 - 55 - dB SCART output (pins 7 and 26) Vo(max)(rms) Ro(L) VPONR maximum output signal (RMS value) output load resistor 2 5 - - - - V k Power-on reset increasing supply voltage start of reset end of reset VPONR I2C-bus, VIH decreasing supply voltage start of reset SCL and SDA (pins 16 and 17) HIGH-level input voltage 3 - VP V - 5.2 4.4 - 6.0 5.2 2.5 6.8 6.0 V V V 1997 Sep 01 8 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV TDA9859 SYMBOL VIL II VACK VIL VIH VOL IO(sink) input current PARAMETER LOW-level input voltage output voltage at acknowledge (pin 17) CONDITIONS MIN. 0 - - - - - - - - TYP. MAX. 1.5 10 0.4 UNIT V A V I17 = -3 mA - Module address (pin 25) LOW-level input voltage HIGH-level input voltage 0 3 - - 1.5 VP 0.3 1 V V Port outputs P1 and P2 (open-collector outputs pins 2 and 31) LOW-level output voltage port output sink current IO(sink) = 1 mA V mA 1997 Sep 01 9 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV I2C-BUS PROTOCOL TDA9859 This circuit operates as a slave receiver only. For more information about the I2C-bus, see "The I2C-bus and how to use it", order number 9398 393 40011. I2C-bus format S Note 1. Multiple DATA-A (acknowledge) sequences may occur. Table 1 Explanation of I2C-bus format NAME S SLAVE ADDRESS W A SUBADDRESS DATA(1) P Note 1. If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed by the device. Table 2 I2C-bus transmission SUBADDRESS FUNCTION BINARY Loudspeaker channel Volume control common Volume control left Volume control right Bass control Treble control Switching control byte SCART output(1) Loudspeaker output Note 1. If auto-increment of the subaddress is used, it is necessary to insert three dummy data words between the treble control byte and the switching control bytes. 0000 1000 0000 1001 08 09 0 EF2 MU1 MU2 P1 EF1 P2 ST I13 I23 I12 I22 I11 I21 I10 I20 0000 0000 0000 0001 0000 0010 0000 0011 0000 0100 00 01 02 03 04 0 0 0 0 0 0 0 0 0 0 V05 0 0 0 0 V04 VL4 VR4 BA4 0 V03 VL3 VR3 BA3 TR3 V02 VL2 VR2 BA2 TR2 V01 VL1 VR1 BA1 TR1 V00 VL0 VR0 BA0 TR0 HEX D7 D6 D5 D4 D3 D2 D1 D0 DATA BITS DESCRIPTION START condition (SCL HIGH, SDA HIGH-to-LOW) 100 0000 (V25 = LOW) or 100 0001 (V25 = HIGH) 0 acknowledge (SDA = LOW); generated by the device subaddress (byte); see Table 2 data byte; see Table 2 STOP condition (SCL = HIGH, SDA = LOW-to-HIGH) SLAVE ADDRESS W A SUBADDRESS A DATA(1) A(1) P 1997 Sep 01 10 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV Table 3 Function of the bits in Table 2 BITS V00 to V05 VL0 to VL4 VR0 to VR4 BA0 to BA4 TR0 to TR3 I10 to I13 I20 to I23 MU1 and MU2 FUNCTION volume control common for loudspeaker channel; see Table 9 volume control for left loudspeaker channel; see Table 6 volume control for right loudspeaker channel; see Table 6 bass control for left and right loudspeaker channels; see Table 7 treble control for left and right loudspeaker channels; see Table 8 input selection for SCART channels; see Table 4 input selection for loudspeaker channels; see Table 4 mute control bits (MU1 for SCART channel, MU2 for loudspeaker channel) 0 = channel not muted 1 = channel muted EF1, EF2 and ST P1 and P2 effect control bits for loudspeaker channel; see Table 5 control bits for ports P1 (pin 2) and P2 (pin 31) control bit = 0: ports P1 = LOW control bit = 1: ports P1 = HIGH Table 4 Input selection BITS OF DATA BYTE 8 AND 9 INPUT HEX AUX LEFT AUX RIGHT AUX STEREO SCART LEFT SCART RIGHT SCART STEREO MAIN LEFT MAIN RIGHT MAIN STEREO Note XB(1) X9(1) X7(1) XA(1) X5(1) X6(1) XC(1) XD(1) X8(1) D7 (1) (1) (1) (1) (1) (1) (1) (1) (1) TDA9859 D6 MU MU MU MU MU MU MU MU MU D5 (1) (1) (1) (1) (1) (1) (1) (1) (1) D4 (1) (1) (1) (1) (1) (1) (1) (1) (1) D3 1 1 0 1 0 0 1 1 1 D2 0 0 1 0 1 1 1 1 0 D1 1 0 1 1 0 1 0 0 0 D0 1 1 1 0 1 0 0 1 0 1. Byte 8 (SCART channels): The value of X depends on MU1 and control bits P1 and P2. Byte 9 (loudspeaker channels): see Table 5 for the programming of these bits. The value of X depends on the selected effects and MU2. 1997 Sep 01 11 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV Table 5 Effect controls DATA BYTE TO SUBADDRESS 09 SETTING SPECIAL EFFECTS HEX Stereo with spatial effect 1 (52%) Stereo with spatial effect 2 (30%) Stereo without spatial effect Forced mono with pseudo stereo Forced mono without pseudo stereo Note 1. See Table 4. The value of X depends on the selected input. Table 6 Gv (dB) 0 -1 -2 -3 -4 -5 -6 -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 -17 -18 -19 -20 -21 -22 -23 Mute Volume control left/right DATA BITS VL4 HEX VR4 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 VR3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 VR2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 VR1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 VR0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 VL3 VL2 VL1 VL0 Table 7 Gv (dB) +15 +13.5 +12 +10.5 +9 +7.5 +6 +4.5 +3 +1.5 0 0 -1.5 -3 -4.5 -6 -7.5 -9 -10.5 -12 Bass control DATA BITS HEX 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 07 06 BA4 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 BA3 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 BA2 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 BX(1) 3X(1) 1X(1) 2X(1) 0X(1) EF2 1 0 0 0 0 MU2 0 0 0 0 0 EF1 1 1 0 1 0 ST 1 1 1 0 0 I23 (1) (1) (1) (1) (1) TDA9859 I22 (1) (1) (1) (1) (1) I21 (1) (1) (1) (1) (1) I20 (1) (1) (1) (1) (1) BA1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 BA0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1997 Sep 01 12 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV Table 8 Gv (dB) +12 +9 +6 +3 0 -3 -6 -9 -12 Table 9 Gv (dB) +15 +14 +13 +12 +11 +10 +9 +8 +7 +6 +5 +4 +3 +2 +1 0 -1 -2 -3 -4 -5 -6 Treble control DATA BITS HEX 0A 09 08 07 06 05 04 03 02 0 0 0 0 0 0 0 0 0 0 TR3 1 1 1 0 0 0 0 0 0 TR2 0 0 0 1 1 1 1 0 0 TR1 1 0 0 1 1 0 0 1 1 TR0 0 1 0 1 0 1 0 1 0 Gv (dB) -7 -8 -9 -10 -11 -12 -13 -14 -15 -16 Volume control common DATA BITS HEX 3F 3E 3D 3C 3B 3A 39 38 37 36 35 34 33 32 31 30 2F 2E 2D 2C 2B 2A V05 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 V04 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 V03 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 V02 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 V01 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 V00 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 -17 -18 -19 -20 -21 -22 -23 -24 -25 -26 -27 -28 -29 -30 -31 -32 -33 -34 -35 -36 -37 -38 -39 -40 DATA BITS HEX 29 28 27 26 25 24 23 22 21 20 1F 1E 1D 1C 1B 1A 19 18 17 16 15 14 13 12 11 10 0F 0E 0D 0C 0B 0A 09 08 V05 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 V04 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 V03 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 TDA9859 V02 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 V01 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 V00 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1997 Sep 01 13 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV TDA9859 MHA311 handbook, full pagewidth 0 phase (degree) -100 (1) (2) (3) -200 -300 -400 10 102 103 104 f (Hz) 105 (1) Normal effect; CPS1 = CPS2 = 15 nF. (2) Intensified effect; CPS1 = 47 nF; CPS2 = 5.6 nF. (3) More intensified effect; CPS1 = 68 nF; CPS2 = 5.6 nF. Fig.3 Pseudo stereo effect (phase) as a function of frequency. 1997 Sep 01 14 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV PACKAGE OUTLINE SDIP32: plastic shrink dual in-line package; 32 leads (400 mil) TDA9859 SOT232-1 D seating plane ME A2 A L A1 c Z e b 32 17 b1 wM (e 1) MH pin 1 index E 1 16 0 5 scale 10 mm DIMENSIONS (mm are the original dimensions) UNIT mm A max. 4.7 A1 min. 0.51 A2 max. 3.8 b 1.3 0.8 b1 0.53 0.40 c 0.32 0.23 D (1) 29.4 28.5 E (1) 9.1 8.7 e 1.778 e1 10.16 L 3.2 2.8 ME 10.7 10.2 MH 12.2 10.5 w 0.18 Z (1) max. 1.6 Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT232-1 REFERENCES IEC JEDEC EIAJ EUROPEAN PROJECTION ISSUE DATE 92-11-17 95-02-04 1997 Sep 01 15 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). Soldering by dipping or by wave The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values TDA9859 with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. Repairing soldered joints Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. PURCHASE OF PHILIPS I2C COMPONENTS Purchase of Philips I2C components conveys a license under the Philips' I2C patent to use the components in the I2C system provided the system conforms to the I2C specification defined by Philips. This specification can be ordered using the code 9398 393 40011. 1997 Sep 01 16 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV NOTES TDA9859 1997 Sep 01 17 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV NOTES TDA9859 1997 Sep 01 18 Philips Semiconductors Preliminary specification Universal hi-fi audio processor for TV NOTES TDA9859 1997 Sep 01 19 Philips Semiconductors - a worldwide company Argentina: see South America Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113, Tel. +61 2 9805 4455, Fax. +61 2 9805 4466 Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213, Tel. +43 160 1010, Fax. +43 160 101 1210 Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6, 220050 MINSK, Tel. +375 172 200 733, Fax. +375 172 200 773 Belgium: see The Netherlands Brazil: see South America Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor, 51 James Bourchier Blvd., 1407 SOFIA, Tel. +359 2 689 211, Fax. +359 2 689 102 Canada: PHILIPS SEMICONDUCTORS/COMPONENTS, Tel. +1 800 234 7381 China/Hong Kong: 501 Hong Kong Industrial Technology Centre, 72 Tat Chee Avenue, Kowloon Tong, HONG KONG, Tel. +852 2319 7888, Fax. +852 2319 7700 Colombia: see South America Czech Republic: see Austria Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S, Tel. +45 32 88 2636, Fax. +45 31 57 0044 Finland: Sinikalliontie 3, FIN-02630 ESPOO, Tel. +358 9 615800, Fax. +358 9 61580920 France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex, Tel. +33 1 40 99 6161, Fax. +33 1 40 99 6427 Germany: Hammerbrookstrae 69, D-20097 HAMBURG, Tel. +49 40 23 53 60, Fax. +49 40 23 536 300 Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS, Tel. +30 1 4894 339/239, Fax. +30 1 4814 240 Hungary: see Austria India: Philips INDIA Ltd, Band Box Building, 2nd floor, 254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025, Tel. +91 22 493 8541, Fax. +91 22 493 0966 Indonesia: see Singapore Ireland: Newstead, Clonskeagh, DUBLIN 14, Tel. +353 1 7640 000, Fax. +353 1 7640 200 Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053, TEL AVIV 61180, Tel. +972 3 645 0444, Fax. +972 3 649 1007 Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3, 20124 MILANO, Tel. +39 2 6752 2531, Fax. +39 2 6752 2557 Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108, Tel. +81 3 3740 5130, Fax. +81 3 3740 5077 Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL, Tel. +82 2 709 1412, Fax. +82 2 709 1415 Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR, Tel. +60 3 750 5214, Fax. +60 3 757 4880 Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905, Tel. +9-5 800 234 7381 Middle East: see Italy Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB, Tel. +31 40 27 82785, Fax. +31 40 27 88399 New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND, Tel. +64 9 849 4160, Fax. +64 9 849 7811 Norway: Box 1, Manglerud 0612, OSLO, Tel. +47 22 74 8000, Fax. +47 22 74 8341 Philippines: Philips Semiconductors Philippines Inc., 106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI, Metro MANILA, Tel. +63 2 816 6380, Fax. +63 2 817 3474 Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA, Tel. +48 22 612 2831, Fax. +48 22 612 2327 Portugal: see Spain Romania: see Italy Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW, Tel. +7 095 755 6918, Fax. +7 095 755 6919 Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231, Tel. +65 350 2538, Fax. +65 251 6500 Slovakia: see Austria Slovenia: see Italy South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale, 2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000, Tel. +27 11 470 5911, Fax. +27 11 470 5494 South America: Rua do Rocio 220, 5th floor, Suite 51, 04552-903 Sao Paulo, SAO PAULO - SP, Brazil, Tel. +55 11 821 2333, Fax. +55 11 829 1849 Spain: Balmes 22, 08007 BARCELONA, Tel. +34 3 301 6312, Fax. +34 3 301 4107 Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM, Tel. +46 8 632 2000, Fax. +46 8 632 2745 Switzerland: Allmendstrasse 140, CH-8027 ZURICH, Tel. +41 1 488 2686, Fax. +41 1 481 7730 Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1, TAIPEI, Taiwan Tel. +886 2 2134 2865, Fax. +886 2 2134 2874 Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd., 209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260, Tel. +66 2 745 4090, Fax. +66 2 398 0793 Turkey: Talatpasa Cad. No. 5, 80640 GULTEPE/ISTANBUL, Tel. +90 212 279 2770, Fax. +90 212 282 6707 Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7, 252042 KIEV, Tel. +380 44 264 2776, Fax. +380 44 268 0461 United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes, MIDDLESEX UB3 5BX, Tel. +44 181 730 5000, Fax. +44 181 754 8421 United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409, Tel. +1 800 234 7381 Uruguay: see South America Vietnam: see Singapore Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD, Tel. +381 11 625 344, Fax.+381 11 635 777 For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825 (c) Philips Electronics N.V. 1997 Internet: http://www.semiconductors.philips.com SCA55 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 547047/1200/01/pp20 Date of release: 1997 Sep 01 Document order number: 9397 750 02004 |
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