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LZ93N61
LZ93N61
DESCRIPTION
The LZ93N61 is a CMOS timing generator LSI which provides timing pulses used to drive a CCD area sensor, in combination with the SSG LSI (LZ93NI 9, LZ93B53).
Timing Pulse Generator LSI for CCD
PIN CONNECTIONS
48-PIN QFP
TOP VIEW
FEATURES
q Switchable between 270000 pixels CCD and q q
Vlx 37
V2X 3a V3X
c
q
320000 pixels CCD Switchable between NTSC (EIA) and PAL (CCIR) systems Internal electronic shutter : Shutter speed is selectable from 1/W, 1/125, 1/250, 1/500, 1/1 000, 1/2 000, 1/4 000 and 1/10 000 s, in addition to this, 1/100 s (PAL : 1/120 s) in Flicker-less mode using parallel or serial code. Shutter speed can also be controlled in 1 H period using an external trigger to the EXST input. Single +5 V power supply Package : 48-pin QFP(QFP048-P-I 01 O)
V4X 40
OFDX 41
FR 42
GND 43
FH2 44 CKI 46 CKO 47 TSTI W
FHI 45
I1
39
24 R12 23 R12 22 C12 21 CI1 19 S12 18 SI1 17 FS 15 SPII 14 SP2 13 SPI
20 FCDS
16 SP12
o
"In tie abeence of conf[mtlon by device acecification ehwf?, WARP fakee no reswns!blhty b anY defects hat recur In qutpment USIW any of WARPS davIces, show In Cahlws, I deta bwks, etc hn~ct WARP !n mder to obtain tie Iateat vefilon of he device swIkaiim shw~ ktie USIW any 8HARPs dewce."
287
LZ93N61
DOUT
TST I
GND GND
HDI
SESL SINV
CKI CKO TVMD
FH I FH2 MCK I MCK2
VDI Vcc GMD
MCK3 MCK. Vlx V2X V3X V4X VHIX
FLMD PSMD EXMD Do DI D, EXST Cll C12
VH3X OFDX SE SPI 1 SPI 2 SP 1 SP2
F C D S S1,
S12
FS
RI I
R12
FR
FRS
288
LZ93N61 ABSOLUTE MAXIMUM RATINGS
PARAM=ER Supply voltage Input voltage Output voltage Operating temperature Storage temperature SYMBOL Vcc VI Vo Topr Tstg RATING - 0.3 to + 7.0 -0.3 to Vcc + 0.3 - 0.3 to Vcc + 0.3 - 2 0 t o +70 -55 to +150 UNIT v v v "c `c
DC CHARACTERISTICS
PARAMHER Input Low voltage Input High voltage Input High threshold voltage lnDut Low threshold voltage Hysteresis voltage Output Low voltage Output High voltage Output Low voltage Output High voltage Output Low voltage Output High voltage Input Low current ~ SYMBOL [I
VIL
(VCC=5 V~l OYO. T a = - 1 0 CONDITIONS
1
t o +70"C)
MIN. ] TYP.
I
MAX.
1.5
UNIT I NOTE v v 1
vlH vT + vT vT+ -VTVOLI IOL =
3.5 2.2 1,0 0.4 4 mA 4.0 0.4 4.0 0.4 4.0 1.0 8.0 60 1.0 8.0 60 0.4 3,8 2.4
v v v v v v v v v PA \ AA PA PA 5 6 7 8 9 4 3 2
vOH 1 vOL2 vOH2 vOL3 v0H3 I IIL1 I I IIL2 I
IoH=-P mA IOL =8 mA IoH=-4 mA IoL=16 mA IoH=-10 mA Vl=o v Vl=o v
I
Input High current
1tlHl
VI= Vcc VI= Vcc
I IIH2 I NOTES : 1. Applled 2. Applied 3. Applied 4. Applied 5, Applied 6. Applied 7. Applied 8. Applied 9. Applied
to to to to to to to to to
all inputs except for VDI, CKI. input (VDI). all outputs except for CKO. outputs (FR, MCK I, MCK2, MCK3, MCK4). outputs (FH 1, FH2). all inputs except for PSMD, FRS, FLMD, Do, DI, D2, EXST, SESL, SINV Inputs (PSMD, FRS, FLMD, Do, D!, D2, EXST, SESL, StNV). all inputs except for EXMD, TVMD, TST 1. inputs (EXMD, TVMD, TST I).
289
LZ93N61
~:.
1
SYMBOL HDI
1/0 Ic
POLARITY
PfN NAME Horizontal drive pulse
FUNCTION Ths HDI pin is used to input the horizontal reference signal from SSG. It is connected to the HD (pin 31) of the I-Z93N 19. The VDI pin is used to input the vertical reference signal from SG. It is connected to the VD (pin 34) of the U93NI 9, The DOUT pin output 1/2 dividing clock input to the CKI (pin 46). It is connected to the CLKI (pin 27) of the ~93Nl 9. The PSMD pin is used to switch the Shutter Speed %tting mode. High level : Parallel Setting mode Low level : Serial Setting mode (Refer to "SHU~ER MODE TABLE". ) The FRS pin is used to selects the ~larity of the FR (pin 42). High level : negative ~larity Low level : positive polarity The FLMD pin is used to prevent the flicker. (Refer to "SHU~ER MODE TABLE ".) The GND is a ground pin. The Do pin is used to control the shutter speed. (Refer to "SHLflTER MODE TABLE". ) The DI pin is used to control the shutter speed. (Refer to "SH~ER MODE TABLE ".) The D2 pin is used to control the shutter speed. (Refer to "SHUITER MODE TABLE ".) The EXST pin used to control the shutter speed 1 H by 1 H. (Refer to "SHU~ER MODE TABLE ",) When the EXMD input pin is Low level, the EXST (pin 11) is prohibited. (Refer to "SHUTTER MODE TABLE" .) The SPI pin output the sampling pulse for color d~ modulation ba~ upon the output signal of ~D, It outputs at High level of the SE (pin 29). The SP2 pin output the sampling pulse for COIW de mdulation based upon the output signal of CCD, It outputs at Low level of the SE (pin 29).
MM
2
VDI
Ics
n
Vertical drive pulse
3
DOUT
o
nn
Delay-Line clock
4
PSMD
Icu
-
Shutter mode select input
5
FRS
Icu
-
FR control input
6 7 6
FLMD GND Do
Icu -- Icu
- -- --
Flicker-less mode select Ground Shutter speed switching input O Shutter speed switching input 1 Shutter speed switching input 2 Shutter speed control 1 Shutter speed control 2
9
DI
Icu
--
10
D2
Icu
--
11
EXST
Icu
--
12
EXMD
Icu
--
13
SP1
o
L
Color sampling pulse 1
14
SP2
o
L
@lor sampling pulse 2
290
U93N61
PrN .-
Uo. 15
1 CVMR~ -------SPI 1
I/n
-$-
I MLAR~ .- --.....
I
PIN NAME SPI and SP2 phase control input 1 SP1 and SPZ phase control input 2 CDS pulse 2 FS phase control input 1 FS phase control input 2 FCDS pulse 1 FCDS phase control input 1 FCDS phase control input 2 FR phase control input 1 FR phase control input 2 Clock output 1
FUNCTON The SPII pin sets the falling edge of COICS sampling pulses SP1 (pin 13) and SP2 (pin 14). The SP12 pin sets the rising edge of color sampling pulses SPI (pin 13) and SP2 (pin 14). The FS pin outputs the pulses for sampling output signals of CCD. The SII pin sets the phase of the FS (pin 17). The SIZ pin sets the width of the FS (pin 17). The FCDS pin outputs the pulse to clamp the output signals of CCD. The Cl 1 pin sets the phase of the FCDS (pin 20). The CIZ pin sets the width of the FCDS (pin 20). The RI I pin sets the pahse of the FR (pin 42). The R12 pin sets the width of the FR (pin 42). The MCKI pin outputs 1/2 dividing pulse of CKI (pin 46). It is the same phase with the FH i (pin 45). The MCK2 pin outputs 1/2 dividi~ pulse of CKI (pin 46). It is delayad by approximately 90 in phase with respect to FH1 (pin 45). Tk MCK3 pin outputs 1/2 dividing pulse of CKI (pin 46). It is the same phase with the FHz (pin 44). The MCK4 pin outputs 1/2 dividing pulse of CKI (pin 46). It is delayed by approximately 90" in phase witi respect to FH2 (pin 44). The SE pin outputs the demodulation carrier of output signals of CCD, and input the switching signal of color sampling pulses SP1 (pin 13) and SPZ (pin 14). It outputs 1/4 dividing pulse of the CKI input (pin 46), and selects the phase in mmbination with the SESL (pin 32) and the SINV (pin 34). The Vcc is a + 5 V power supply pin. The GND is a ground pin.
IC
m
16
SP12
Ic
N
17 18 19 20
FS SI 1 S12 FCDS
o Ic Ic o
n m nn n
21 22 23 24
c11 C12 RI j R12
Ic Ic Ic Ic
m N nn nn
25
MCKI
o
nn
26
MCK2
o
nn
Clink output 2
27
MCK3
o
nrl
Clwk output 3
28
MCK4
o
m
Clock output 4
29
SE
o
rL
Color demodulation pulw
30 31
Vcc GND
- -
-- -
Power supply Ground
291
I-Z93N61
::
SYMBOL
1/0
POLARITY
PIN NAME
FUNCTION
The SESL input pin selects the phase of color demodulation carrier output SE (pin 29). Low level : synchronized with the rising edge of FHI (pin 45). High level : synchronized with the rising edge of FH2 (pin 44). The TVMD input pin selects the TV system.
32
SESL
Icu
--
SF control input
33
TVMD
ICD
-
TV mode input
Low level : NTSC system Hige level : PAL system
34
SINV
Icu
--
tiior line input
The SINV input pin is used to invert the color demodulation carrier output SE (pin 29) at 1 H rate. The
VH3X
is a pulse output pin to transfer the photc-
35
VH3X
0
r
Read out pulse 3
diode charge of CCD to the vertical shift register. It is connected to the 3BX (pin 11) of the LR366B3N vertical driver LSI. The VHIX is a pulse output pin to transfer the photc-
36
V HIX
0
lr
Read out pulse 1
diode charge of CCD to the vertical shifi register. It is connected to the 1 BX (pin 8) of the LR-N vertical driver LSI.
37 38 39 40
VI x V2X V3X V4X
o o o o
L n u u
Vertical transfer pulse 1 Vertical transfer pulse 2 Vertical transfer pulse 3 Vertical transfer pulse 4 The VI x, V2X, V3X and V4X are transfer pulse output pins for CCD vertical shift register,
41
OFDX
o
lr T
L
OFD pulse output
The OFDX pin is used to output for controlling OFD voltage during electronic shutter operation. The FR pin outputs the reset pulse of CCD. It is connected to the ~ R through the offset circuit. The GND is a ground pin. The FH2 pin outputs the horizontal transfer pulse of CCD shift register. It is connected to the ~ Hz. The FHI pin outputs the horizontal transfer pulse of CCD shift register, It is connected to the #HI, The CKI is a reference clock input pin of horizontal and vertical pulses, Frequency for NTSC (TVMD = L)
42
FR
02
-
Reset pulse
43
GND
-
Ground Horizontal transfer
44
FH2
05
Uu
pulse 2 Horizontal transfer
45
FH I
05
nn
pulse 1
46
CKI
ICK
nlllul
Clock input
1212 fH : CCD of 542 horizontal pixels. Frequency for PAL (TVMD = H) 1236 fH : CCD of 542 horizontal pixels. (fH = Horizontal frequency)
292
LZ93N61 ::.
SYMBOL
CKO
1/0
] POLARITY ]
PIN NAME
Clock output
II
47
I 48 I
I
I
OCK
I Uuuv I
I-I Test
I
CKI (pin 46).
FUNCTION
The CKO pin outputs clocks at the reverse of the
TSTI
Input pln
ICD
terminal
1
I The TSTI input pin is normally kept Low or open.
(CMOS level). (CMOS level with buflt-in pull-up resistor). ICD : Input pin (CMOS level with built-in pull-down resistor). Ics : Input pin (CMOS level schmitt). ICK : Input pin for oscillation. OCK : Output pin for oscillation.
Ic
:
Icu :
Input pin
0: 02 : 05 :
Output pin. Output pin. Output pin.
293
LZ93N61 SUPPLEMENTARY EXPLANATION
SH~ER MODE TABLE INPUT PIN
Ps
REGISTER IN LSl `2 10
L L L L H H H
MD PIN 4
H H H J u J ~ n. H
FL MD 6
H 1 H H H
1
Tv MD 33
EX MD 12
L L L L L
1
EX ST 11
" 9
L
1
m 8
L H L H L H L
1 I
D,
D6
D5
D4
D3
D2
DI
Do
SHUITER SPEED (S])
NORMAL
I
I
L H H L L H
I
1
1
I
1
I
1
I
1 /125 1 /250 1 /500 1/1 000 1/2 000 1/4 000
H
NOTE
1
I I
(
I
: H
: H
L L L iii, L L H L L L L L L L L L H H L L L L L L L L H L L J
1 I
I
H H Iui,L n H L L H H H H H H H H H H H H H L L
H
1
H
H
1
1
1
1
I
I
1
I
I
1,..0 /1000
. /.nfi 1/ Iuu
1/120 H H H H H H H H H H H H L H L H L H H H H H H H H L L L L L L L L H H H H L L H H L L H H L H L H L H L H NORMAL 1/125 1 /250 1 /500 1/1 000 1/2 000 1/4 000 1/10000
1/100 1/120
1
t
L L L L L
< E &
L L L L L L L L L
1/100 1/120 OFDX = H 1/100 1/120 OFDX = H 2 3
1
1
1
1
t
H
1
1
EXST
NOTES : 1. NTSC=l/W S, PAL=l/50
2.
S.
The data of shutter speed was decided by the control pulse EXST (pin 11), is deleted. 3. The shutter s@ed is decided by the falling edge of control pulse EXST (pin 11). 4. The data of shutter s-d was decided by the control pulse EXST (pin 11), hold as it is
lNmAL STATUS IN SERIAL MODE AND EXTERNAL TRIGGER MODE When power is turned on in Serial mode (PSMD = L) or External Trigger mode (EXMD = H), the mode is not established until data is input from serial code or EXST,
294
LZ93N61
SERIAL DATA FORMAT
D I (pin 9)
D2 (pin 10) Do DI D2 D3 D. D, De D7
Do (pin 8)
n
NOTE :
D&D7 are latched by the rising edge of pulse D, (pin 9). By the falling edge of pulse Do (pin 8), the shutter
speed is decided.
DESCRIPTION OF EXTERNAL SYNCHRONOUS SHUTTER MODE 1. When EXMD = H, this mode is given priority over other modes. On applying falling edge of trigger input to EXST (pin 11), the IC reads at the rising edge of HDI and latches the V period counter value, and controls final output of the OFDX pulse during this H period. (The pulse must lasts until HDI goes high.) 2. Once latched, the value of V period counter is retained until the next trigger is input as long as EXMD = H, even trigger input is for odd (ODD) w even (EVEN) field, the storage time of another field becomes the same as the field with trigger input automatically.
Note that when changing in high speed shutter direction, the internally stored data is used first, This caue-es the delay to control by one field. [Trigger input disabled range] To match ODD storage time with EVEN stomge time, the pulse start position is set at 20/283 H for NTSC and 22/335 H for PAL. This means that inputting the trigger at 18/280, 281 H in NTSC mode and 20/332, 333 H in PAL mode is made disabled.
NTSC 17/279 H PAL 19/331 H HOI EXST (PATTERN) OFDX [ (PATTERN)
18/280 H 20/W2 H n
19/281 H 21/W H n
20/282 H 22/=4 H I-1
21/2S3 H 23/=5 H n
22/2W H 241W H
~~~~ ~ b (INVALID) C (EVEN IWALIO) a d[ e 000/lst, 3rd FIELD ~ WEN/2nd, 4th FIELD ~ a END w , c d e b-u
000 START EVEN START
295
LZ93N61 TIMING DAIGRAM
VERTICAL PULSE TIMING < NTSC >
(ODD Shutter speed 1/10000 s
FIELD)
525 1
CBLK HDI VDI 10 [ n
+ + M 465 487 4= 491
21
n n n n
1
H
n
n
1 n n n n n n n n n n n n n n n n n n
n
n
1 482 .M ap 4y 4P 4W n n n n n n n n n n n n n n n ~------JUUUUUUUUL --~ .
VI x
V2X V3X V4X
5911 ;:+: 24681:
315 + + 1+2?416
~uuuuuuu uu~uuuu Uuuuuu II
-n.
u
n
n n
-
n
-
n -
n -
-
n
n
-
n -
n --
VHIX VH3X OFDX
u
u
u
u
u
u
u
u
u
u
u
H
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
(EVEN FIELD)
263 CBLK HDI ..-.
n n n n]
272 n
m 4~1 +
283
In n n n
10 1 3
n
1+2
n
1+4 5
Vul
~ 481 4P 465 a7
+ + + u 11 u u
n
n
n
n
n
n
n
n
n L n u
n
n
n
n
n
n
n
n
0
n
12468
+
+
+
9
+
1
+ n u
u
VI.
V2X V3X V4X
n@2n4wn4ffiflwn4mn4'2fl u u u
3
5 n
7
1
1
n u
n u
n u
n u
n U
n u
n u
n u
n u
n u
n u
n u
n IJu
n u
n u u n u n u n u n u
VHIX VH3X OFDX ~
uu
u
IJ
u
"
u
u
u
u
u
u
u
u
u
u
u
u
u
u
VERTICAL PULSE TIMING < PAL > (l St, 3rd FIELD)
CBLK HDI VDI 625 1 623 U-- n J
5:6 5;8 ~ 5=
Shutter speed 1/10000 s 21 23 n n
3 :7 i+i 2 4 6
10 n n n n n n n n n n n
16 n n n n n
UUUL
.
.
.
VIX
V2X V3X V4X
n'mn'''nn'n
n
u
n u
n H
n u
n u
n u
n 11
n H
n u
n u
n lJ
n u
n u
n u
n u
n u
n 11
n 11
n u
n u
n
n
n u
n u n u n u
n u--
n
u
n
u
n u
Uu u
n
VHIX VH3X OFDX
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
u
(2nd, 4th flELD)
310 CBLK 318 n n n n n n n n n n n n n n n n n n n n n 332 I n n n
1 4 6 t++ 3 5 7
336 n n
HDI
VDI
n
n
n
5:6 518 5P 5~
VIx
V2X V3X V4X
n577f1579n58'J='n
u
n u u
n u
n u
n u
n u
n u
n u
n u
n 11
1 u
n u
n u
n u
n u
n u
n u
n u
n u
n llu
n u
n u
n u n u n u
u
u
11
VHIX VH3X OFDX
u
u u u u o u I u u u u u u u u u u u u u u u u u u u u
296
LZ93N61
CHARGE READ TIMING < NTSC > (ODD FIELD)
18 H 19 H 121 2(01
HD VI x
V2X V3X v..
VHIX VH3X
120 5~ w
I
}~.r+. 1! 98 5~
-,
~----.--~
118 3;2; 898
78
78
118
I
------?z,?"~
I
II
OFDX
(EVEN FIELD)
HD v!. V2X V3X V4X
VHIX VH3X --, I 6a
I
28Il H 281 H 121 2(o) =..------~
120
1
2
L--- 8
128 +~
OFDX
CHARGE READ TIMING < PAL > (Ist, 3rd FIELD)
HD VIX V2X V3X V4X
V HI X
-- ,4 ------
VH3X OFDX
812 7M -1
(2nd, 4th FIELD)
HD VI x V2X V3X V4X VHIX VH3X 332 H o 120 _---- -- 118
I
333 H 12WOI
lm
~ _---- -- ?~ 118 322 -------- I 1 I
--~--Y___ ~ 128 m i 28
---- I __-- .----,
I L
I
----wY--
OFDX
LZ93N61
HORIZONTAL PULSE TIMING
o
HDI 120 (. )= PAL
DOUT
48 FH T FH2 MCKI MCK,
,!
169 (193)
SE
,'
W:h [~ 58 VI x 78 V2X 48 V3X V4X OFDX 6s 108 128 140 15s 118 98
T
L L L H
SINV SESL
298

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