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TDA9530
9.5NS TRIPLE HIGH VOLTAGE VIDEO AMPLIFIER
FEATURE
* TRIPLE CHANNEL VIDEO AMPLIFIER * SUPPORTs DC OR AC COUPLING APPLICATIONS * BUILT IN VOLTAGE GAIN: 20 * RISE AND FALL TIMES: 9.5ns TYPICAL * BANDWIDTH: 37MHz TYPICAL * SUPPLY VOLTAGE: 110V * ADDITIONAL CUT-OFF INPUT CONTROL
DESCRIPTION
The TDA9530 is a triple video amplifier with high voltage Bipolar/CMOS/DMOS technology (BCD). It can drive the 3 cathodes of a monitor CRT in DC or AC coupling mode. A DC coupling application is obtained by connecting a triple DC controlled circuit either on the input pin or on the cut-off pin. MULTIWATT 15 (Plastic Package) ORDER CODE: TDA9530
PIN CONNECTIONS
OUT3 C.OFF3 GND3 IN3 VCC IN2 GND2 GNDS OUT2 C.OFF2 VDD IN1 GND1 C.OFF1 OUT1
Version 4.1
March 2000 1/8
1
TDA9530
BLOCK DIAGRAM
OUT1 GND1
1 3
OUT2 GND2
7 9
OUT3 GND3
15 13
VDD 5 VCC 11
TDA9530
4
2
10
6
12
14
8
IN1
C.OFF1
IN2
C.OFF2
IN3
C.OFF3 GNDS
ABSOLUTE MAXIMUM RATINGS
Symbol VDD VCC VESD IOD I OG V I Max VI Min VIC OFF Max VIC OFF Min TJ TSTG High Supply Voltage Low Supply Voltage ESD Susceptibility Human Body Model, 100pF. Discharge through 1.5K EIAJ Norm, 200pF. Discharge through 0 Output Source Current (pulsed < 50s) Output Sink Current (pulsed < 50s) Maximum Input Voltage Minimum Input Voltage Maximum C. off Input Voltage Minimum C. off Input Voltage Junction Temperature Storage Temperature Parameter Value 120 17 2 250 80 80 15 - 0.5 VCC + 0.5 - 0.5 150 -20 + 150 Unit V V kV V mA mA V V V V C C
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TDA9530
THERMAL DATA
Symbol Rth (j-c) R th (j-a) Parameter Junction-Case Thermal Resistance (Max.) Junction-Ambient Thermal Resistance (Typ.) Value 3 35 Unit C/W C/W
ELECTRICAL CHARACTERISTICS
(VCC = 12V, VC OFF = 2.5V, VDD = 110V, Tamb = 25 C, unless otherwise specified)
Symbol VDD VCC IDD ICC dVOUT/dVDD dV OUT/d dVOUT/d V OUT/ VC.OFF IBC .OFF VOUT SATH VOUT SATL AVR E lin OS Lf g/g R IN BW tR, tF Parameter High Supply Voltage (Pin 5) Low Supply Voltage (Pin 11) High Voltage Supply Internal DC Current Low Voltage Supply Internal DC Current High Voltage Supply Rejection Output Voltage Drift Versus Temperature for any Channel Differential Output Voltage Offset Drift Versus Temperature Cut-Off Control Gain Cut-Off Control Bias Current Max. Output Voltage Min. Output Voltage Typical Video Gain (see note 2) Linearity Error Overshoot Low Frequency Gain Matching Video Input Resistor Bandwidth at -3dB Rise and Fall Time VOUT = 50V, f=1MHz VOUT = 50V VOUT =50V,CLOAD=8pF R P=200, VOUT=20V VOUT =50V,CLOAD=8pF R P=200, V OUT=40V VOUT =50V,CLOAD=8pF R P=200 ,V OUT=20V f = 1 MHz f = 20MHz 2 37 9.5 VOUT = 50V Test Conditions Min 20 10 Typ 110 12 15 40 0.5 15 5 14 10 VDD 6.5 11 20 5 5 5 8 % % % K MHz ns A V V Max 115 15 Unit V V mA mA % mV/ C mV/ C
VOUT = 50V VOUT = 80V VOUT = 80V VOUT = 80V 1V < VC OFF < 4V VOUT = 80V I0 =-60mA, see Note 1 I0 =60mA, see Note 1 VOUT = 50V 17Lf CT Hf CT
Low Frequency Crosstalk High Frequency Crosstalk
50 32
dB dB
Pulsed current width < 50s Note: 1 Theoretically VOUT = 140V - 14VC OFF - 20V IN.
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TDA9530
TYPICAL APPLICATION
PC Board Lay-out The best performance is obtained with a carefully designed HF PC board, especially for the output and input capacitors. Rise/fall time and bandwidth are measured on a 8pF load (including a PC board parasitical, socket and a CRT capacitor). The input voltage range for the cut-off adjustment pins is from 1 to 4 volts and a 10 nF to 47 nF bypass capacitor is recommended on these pins. Power Dissipation The power dissipation is the sum of the DC and the dynamic dissipation. As the feedback resistors are integrated, the DC power dissipation (capacitive load) can be estimated by: PSTAT = VDD . IDD + VCC . I CC The dynamic dissipation in worst case (full bandwidth and black pixel/white pixel picture - see Note 3) is: PDYN = 3 VDD . CL . VOUT(PP) . f . K where f is the video frequency and K the active line duration / total duration. Example: for VDD = 110V, VCC = 12V, VOUT = 40 VPP, I DD = 15mA, ICC = 40mA, fVIDEO = 30MHz, CL = 8pF and K = 0.72. We have: PSTAT = 2.13W and PDYN = 2.28W Therefore: Ptot = 4.41W.
Note: 2 This worst thermal case must only be
considered for TJmax calculation. Nevertheless, during the average life of the circuit, the conditions are very close to the white picture conditions.
VCC VCC 75 4 IN1 VC.OFF1 2 75 10 IN2 VC.OFF2 6 75 12
C.OFF3 C.OFF2 C.OFF1
VDD 110V VDD GNDS
11
5
8
TDA9530
OUT1 RP 1 3 GND1 OUT2 RP 7 9 GND2 OUT3 RP 15 13 GND3 CL CL CL
IN3
VC.OFF3 14
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TDA9530
Figure 1. TDA9207/9209 - TDA9533/9530 Demonstration Board: Silk Screen and Trace (scale 1:1)
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Bi n
Rin
Gin
VSYNC HSYNC
1
2
3 4 5 6 7 8 9 10 11 12
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B C D E
A
5V
5-8V 5V Jump J1 R3 R4 BLANK 2R7 2R7 2R7 R9 HSYNC I2C C1(1) R8 100pF C3(1) BLK 100nF 100pF R13 14 C_OFF3 GND3 IN3 VCC IN2 GND2 GNDS OUT2 C_OFF2 VDD IN1 GND1 C_OFF1 OUT1 TDA9530/33 14 C14(1) 100nF 100nF 110V C18 100pF 100pF J4 GND_CRT S6 Jump J6 J7 S7 Jump 5V GND R29 10 R 8 J5 G2 7 C20 GND 1 OSD Supply G1 5 C25 G1 R28 150R 10nF/ 400V
1
TDA9530
5V S1 2K7 110V SDA SCL
4
R1 2K7
R2
5V R5 R6 S2 2R7 100R 33R C24 4.7uF / 150V D1(2) FDH400 R19(2) 110V Jump R7 1 2 3 4
4
D2 33R 100R
1N4148 C4
100nF
R12 C2(1) 100nF U1 IN1 ABL IN2 GNDL IN3 9 7 5 Rout 3 1 D9(2) FDH400 Bout R26 120R / 0.5W L3 .33uH R27 100nF/250V 100nF GNDA VCCA VDDL/AV OSD1 OSD2 OSD3 FBLK C16 C17 KB 100nF/250V 12 11 B J3 10 H1 9 H2 HEAT F1(2) C19 10nF/ 400V SCL 13 SCL SDA SDA C15(1) CUT3 15 CUT2 16 R24 2 100R OUT3 17 R20 4 15R/50R GNDP 18 R18 6 100R OUT2 19 8 VCCP 20 C8(1) 10 C12(1) C10(1) 100nF R16 15R/50R 11 C11 D6(2) 47uF FDH400 R21 120R / 0.5W L2 .33uH R22 110V OUT1 21 R14 12 15R/50R 13 CUT1 22 100R OUT3 15 Gout Hs/BPCP 23 C5(1) U2 R10 120R / 0.5W 24 1 2 R15 3 33R
D3
75R
1N4148
transient response optimisation
L1 .33uH R11 150R / 0.5W
5V
100nF
C7
D4
12V
110V
1N4148 5 C6(1) 7 8 33R 9 10 S3 Jump 12 S4 Jump 11 100nF 6
C9(1)
100nF 4
R17
D5
75R
5V
1N4148
3
3
D7
150R / 0.5W
1N4148
100nF C13 R23
R25
D8
75R
1N4148
AV
150R / 0.5W
OSD1
TDA9207/09
S5 Jump
OSD2
2
OSD3
2
FBLK
KR
G2
F2(2)
Figure 2. TDA9207/9209 - TDA9533/9530 Demonstration Board Schematic
12 11 10 9 8 7 6 5 4 3 2 1 AV OSD1 OSD2 OSD3 FBLK SDA SCL HSYNC HFly VFly
VFly HFly VSYNC 5-8V 5V HSYNC BLANK HEAT G1 110V 12V 1 2 3 4 5 6 7 8 9 10 11 12
G 6 KG
10nF/ 2KV
F3(2)
J2
Video
5V
5-8V
12V
1
C21 C22 47uF 47uF C23
Notes: 1: All capacitorsfollowed by (1) are decoupling capacitors which must be connected as close as possible to the device 2: The purpose of all componentsfollowed by (2) is to ensure a good protectionagainst overvoltage(arcing protection)
B C
47uF
Title
CRT4 TDA9207/09+TDA9533
Size A4 Date:
D
DocumentNumber Monday,January 17,2000 Sheet 1
E
Rev
of
1
A
TDA9530
PACKAGE MECHANICAL DATA
15 PIN - PLASTIC MULTIWATT A C L7 H1 S
Dia 1 L3 L2 L1 L D H2 E M1 M B F G1 G
Dimensions A B C D E F G G1 H1 H2 L L1 L2 L3 L4 L7 M M1 S S1 Dia. 1 21.9 21.7 17.65 17.25 10.3 2.65 4.25 4.63 1.9 1.9 3.65 4.55 5.08 17.5 10.7 22.2 22.1 0.49 0.66 1.02 17.53 19.6 20.2 22.5 22.5 18.1 17.75 10.9 2.9 4.85 5.53 2.6 2.6 3.85 0.862 0.854 0.695 0.679 0.406 0.104 0.167 0.182 0.075 0.075 0.144 0.179 0.200 0.689 0.421 0.874 0.870 1.27 17.78 1 0.55 0.75 1.52 18.03 0.019 0.026 0.040 0.690 0.772 0.795 0.886 0.886 0.713 0.699 0.429 0.114 0.191 0.218 0.102 0.102 0.152 0.050 0.700 Millimeters Min. Typ. Max. 5 2.65 1.6 0.039 0.022 0.030 0.060 0.710 Min. Inches Typ. Max. 0.197 0.104 0.063
L4
S1
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TDA9530
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this public ation are subject to change witho ut notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics. (c) 2000 STMicroelectronics - All Rights Reserved Purchase of I2C Components of STMicroelectronics, conveys a license under the Philip s I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philip s. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www .st.com
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