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MC44826 PLL Tuning Circuit with I2C Bus
The MC44826 is a tuning circuit for TV and VCR tuner applications. It contains, on one chip, all the functions required for PLL control of a VCO. This integrated circuit also contains a high frequency prescaler and thus can handle frequencies up to 1.3 GHz. The circuit has a band decoder that provides the band switching signal for the mixer/oscillator circuit. The decoder is controlled by the buffer bits or independently by extra bits T6 and T7. The MC44826 has a programmable 512/1024 reference divider and is manufactured on a single silicon chip using Motorola's high density bipolar process, MOSAICTM (Motorola Oxide Self Aligned Implanted Circuits).
TV AND VCR I2C PLL TUNING CIRCUIT WITH 1.3 GHz PRESCALER AND MIX/OSC DECODER
SEMICONDUCTOR TECHNICAL DATA
* * * * * * * * * *
Complete Single Chip System for MPU Control (I2C Bus) Divide-by-8 Prescaler Accepts Frequencies up to 1.3 GHz 15 Bit Programmable Divider Reference Divider: Programmable for Division Ratios 512 and 1024 3-State Phase/Frequency Comparator Operational Amplifier for Direct Tuning Voltage Output (30 V) Four Programmable Chip Addresses Integrated Band Decoder for the Mixer/Oscillator Circuit Band Buffers with Low "On" Voltage (0.4 V Maximum at 15 mA) Fully ESD Protected to MIL-STD-883C, Method 3015.7 (2000 V, 1.5 k, 150 pF)
14 1
D SUFFIX PLASTIC PACKAGE CASE 751A (SO-14)
MOSAIC is a trademark of Motorola, Inc.
PIN CONNECTIONS
VTUN Gnd HF1 HF2 VCC1 B1 B3
1 2 3 4 5 6 7
14 13 12 11 10 9 8
PHO Xtal DEC SDA SCL CA B5
ORDERING INFORMATION
Device MC44826D Operating Temperature Range TA = -20 to +80C Package SO-14
(Top View)
(c) Motorola, Inc. 1996
Rev 1
MOTOROLA ANALOG IC DEVICE DATA
1
MC44826
Representative Block Diagram
VTUN VCC2
RL Bands Out VCC1 5.0 V 5 DEC 12 Mixer/Oscillator Band Decoder Fout Fref Test Logic T6 T7 Gnd DTB1 2 Latches T13 T8 T9, T12, T14 T10, T11 P-On Reset DTB2 POR CA SDA SCL 9 11 10 I2C Bus Receiver CL Data RL DTF 3 Shift Register 15 Bit 7 512/1024 Latches Fout Fref Phase Comp 8 7 6 1 14 2.7 V Operational Amplifier PHO CL
B5
B3 Buffers
B1
Ref Divider Latches A Osc Latches B 13 Xtal 12 pF TDI 3.2/4.0 MHz
HF1 HF2
3 4
Preamp /8 Prescaler Program Divider 15 Bit Fout Latch Control
DTS, EN
This device contains 3,204 active transistors.
MAXIMUM RATINGS (TA = 25C, unless otherwise noted.)
Rating Power Supply Voltage (VCC1) Band Buffer "Off" Voltage Band Buffer "On" Current Operational Amplifier Power Supply (VCC2) RF Input Level 10 MHz to 1.3 GHz Storage Temperature Operating Temperature Range Bus Input Voltage (Positive) Bus Input Voltage (Negative) Pin 5 6, 7, 8 6, 7, 8 1 3, 4 - - 10, 11 10, 11 Value 6.0 15 20 40 1.5 -65 to +150 -20 to +80 7 -0.5 Unit V V mA V Vrms C C V V
2
MOTOROLA ANALOG IC DEVICE DATA
MC44826
ELECTRICAL CHARACTERISTICS (VCC1 = 5.0 V, VCC2 = 33 V, TA = 25C, unless otherwise noted.)
Characteristic VCC1 Supply Voltage Range VCC1 Supply Current (VCC1 = 5.0 V) Band Buffer Leakage Current when "Off" at 12 V Band Buffer Saturation Voltage when "On" at 15 mA Data/Clock Current at 0 V (Acknowledge "Off") Data/Clock Current at 5.0 V (Acknowledge "Off") Data/Clock Input Voltage Low Data/Clock Input Voltage High Data Saturation Voltage at 3.0 mA (Acknowledge "On") Decoder "High" Level Sourcing 100 A Decoder "Medium" Level Sourcing 15 A Decoder "Low" Level Sinking 20 A Clock Frequency Range Oscillator Frequency Range Operational Amplifier Internal Reference Voltage Operational Amplifier Input Current DC Open Loop Gain (RL = 22 k) Gain Bandwidth Product (CL = 0.5 nF) Vout Low (RL = 22 k) Phase Detector Current in High Impedance State Charge Pump Current of Phase Comparator (T14 = 0) Charge Pump Current of Phase Comparator (T14 = 1) VCC2 Supply Voltage Range Pin 5 5 6, 7, 8 6, 7, 8 10, 11 10, 11 10, 11 10, 11 11 12 12 12 10 13 - 14 14, 1 14, 1 1 14 14 14 1 Min 4.5 25 - - -10 0 - 3.0 - 3.4 1.7 0 - 3.15 2.0 -15 100 0.3 - -15 30 90 25 Typ 5.0 35 0.01 0.2 - - - - 0.25 - - - - 3.2 2.75 0 250 - 0.25 0 40 125 33 Max 5.5 50 1.0 0.4 0 1.0 1.5 - 0.4 VCC1 2.3 0.8 100 4.05 3.2 15 1000 - 0.4 15 50 150 36 Unit V mA A V A A V V V V V V kHz MHz V nA V/V MHz V nA A A V
PIN FUNCTION DESCRIPTION
Pin 1 2 3, 4 5 6, 7, 8 9 10 11 12 13 14 Function VTUN/VCC2 Gnd HF1/ HF2 VCC1 B1, B3, B5 CA SCL SDA DEC Xtal PHO Description Output of the tuning voltage amplifier. Needs an external pull-up resistor to drive the varicaps Ground Symmetric HF inputs from local oscillator Supply voltage. Typical 5.0 V Band buffer outputs Chip address selection pin Clock input of the I2C bus Data input Band decoder output for the mixer/oscillator circuit Crystal input Input of tuning voltage amplifier
MOTOROLA ANALOG IC DEVICE DATA
3
MC44826
Figure 1. Typical Prescaler Input Sensitivity
5.0 -5.0 RF Level (dBm) -15 -25 -35 -45 0 200 400 600 800 1000 1200 1400 Guaranteed Operating Area
RF In (MHz)
NOTE: VCC = 4.5 to 5.5 V, TA = - 20 to +80C
HF CHARACTERISTICS (See Figure 1) Characteristic DC Bias Input Voltage Range 50-950 MHz 950-1300 MHz Pin 3, 4 3, 4 3, 4 Min - 10 50 Typ 1.6 - - Max - 315 315 Unit V mVrms
Figure 2. RF Sensitivity Test Circuit
I2C Bus Controller
Device is in test mode, B5 and B3 are "On", B1 is "Off". Sensitivity is the level of the HF generator on 50 load.
4
CCCCCCCCCCCC CCCCCCCCCCCC CCCCCCCCCCCC
10, 11 +5.0 V VCC1 5 3 HF In RF Generator (50 ) 1.0 nF 1.0 nF 4 50
2
MC44826 8 B5 +12 V 4.0 k 7 B3 4.0 k
Frequency Counter
MOTOROLA ANALOG IC DEVICE DATA
MC44826
Figure 3. Typical HF Input Impedance
-j 0 +j
0.5 0.5
0.5
ZO = 50 1.3 GHz 1 1.0 GHz 1 1
2 2 500 MHz 50 MHz 2
Figure 4. Complete Data Transfer Process
SDA
SCL 1-7 S STA ADDRESS CA R/W ACK DATA ACK DATA ACK 8 9 1-7 8 9 1-7 8 9 P STO
Data Format and Bus Receiver The circuit receives the information for tuning and control via the I2C bus. The incoming information, consisting of a chip address byte followed by two or four data bytes, is treated in the I2C bus receiver. The definition of the permissible bus protocol is shown below: 1_STA 2_STA 3_STA 4_STA CA CA CA CA CO FM CO FM BA FL BA FL STO STO FM FL CO BA
STO STO
STA = Start Condition STO = Stop Condition CA = Chip Address Byte CO = Data Byte for Control Information BA = Band Information FM = Data Byte for Frequency Information (MSB's) FL = Data Byte for Frequency Information (LSB's) Figure 5 shows the five bytes of information that are needed for circuit operation: there is the chip address, two
bytes of control and band information and two bytes of frequency information. After the chip address, two or four data bytes may be received: if three data bytes are received the third data byte is ignored. If five or more data bytes are received the fifth and following data bytes are ignored and the last acknowledge pulse is sent at the end of the fourth data byte. The first and the third data bytes contain a function bit which allows the IC to distinguish between frequency information and control plus band information. Frequency information is preceded by a Logic "0". If the function bit is Logic "1" the two following bytes contain control and band information. The first data byte, shifted after the chip address, may be byte CO or byte FM. The two permissible bus protocols with five bytes are shown in Figure 5. The Data and Clock inputs (Pins 10 and 11) are high impedance when the supply voltage VCC1 is between 0 and 5.5 V.
MOTOROLA ANALOG IC DEVICE DATA
5
MC44826
Chip Address The chip address is programmable by Pin 9 (CA - Address Select).
CA - Pin 9 -0.04 VCC1 to 0.1 VCC1 Open or 0.2 VCC1 to 0.3 VCC1 0.42 VCC1 to 0.75 VCC1 0.9 VCC1 to 1.2 VCC1
Address (HEX.) C6 C4 C2 C0
Figure 5. Definition of Bytes
CO_Information BA_Band Information
FM_Frequency Information FL_Frequency Information
FM_Frequency Information FL_Frequency Information
CO_Information BA_Band Information
UHF VHF B III
M/O
Antenna Filter
B. P. Filter 1.0 nF Fosc 1.0 nF Oscillator Gnd 2 RL 3 4
VTUN AGC
NOTES: 1. On some layouts the 100 resistor will not be required. 2. C2 = 330 pF minimum is required for stability.
6
EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE
CA_Chip Address
EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE EEEEEEEEEEEEEEEEEEEEEEE
1 T14 T6 T13 B5 T12 X T11 B3 T10 X T9 T8 X ACK ACK T7 B1 0 N14 N6 N13 N5 N12 N4 N11 N3 N10 N2 N9 N1 N8 N0 ACK ACK N7 1 1 0 0 0 0/1 0/1 0 ACK 0 N14 N6 N13 N5 N12 N4 N11 N3 N10 N2 N9 N1 N8 N0 ACK ACK N7 1 T14 T6 T13 B5 T12 X T11 B3 T10 X T9 T8 X ACK ACK T7 B1
CA_Chip Address
1
1
0
0
0
0/1
0/1
0
ACK
Figure 6. Typical Tuner Application
IF
12 5.0 V 5 Band Decoder
8 B5
7 B3
6 B1 Bus Rec
Mixer
11 10 9 Osc & 13 Ref Div Phase Comp
SDA SCL CA
/8 Pres
Program Divider
12 pF 3.2/4.0 MHz
MC44826
1
2.7 V 14
33 V 330 p (Note 2)
(Note 1) 47 nF
47 k
22 nF
MOTOROLA ANALOG IC DEVICE DATA
MC44826
Bits B1, B3, B5: Control the Band Buffers
B1, B3, B5 = 0 B0, B1, B3 = 1 Buffer "Off" Buffer "On"
Bit T8: Controls the Output of the Operational Amplifier
T8 = 0 T8 = 1 Normal Operation Operational Amplifier Active Output State of Operational Amplifier Switched "Off", Output Pulls High Through the External Pull-Up Resistor RL
The band buffers are open collector buffers and are active "low" at Bn = 1. They are designed for 15 mA with a typical "On" voltage of 200 mV. These buffers are designed to withstand relative high output voltage in the "Off" state. B3 and B5 buffers may also be used to output internal IC signals (reference frequency and programmable divider output frequency divided by 2) for test purposes. The bit B3 and/or B5 have to be one if the buffers are used for these additional functions. The Programmable Divider The programmable divider is a presettable down counter. When it has counted to zero it takes its required division ratio out of the latches B. Latches B are loaded from latches A by means of signal TDI which is synchronous to the programmable divider output signal. Since latches A receive the data asynchronously with the programmable divider, this double latch scheme is needed to assure correct data transfer to the counter. The division ratio definition is given by: N = 16384 x N14 + 8192 x N13 + ... + 4 x N2 + 2 x N1 + N0 Maximum Ratio 32767 Minimum Ratio 256 Where N0 ... N14 are the different bits for frequency information. The counter may be used for any ratio between 256 and 32767, and reloads correctly as long as its output frequency does not exceed 1.0 MHz. The data transfer between latches A and B (signal TDI) is also initiated by any start condition on the I2C bus. At power-on the whole bus receiver is reset and the bit N8 of the programmable divider is set to N8 = 1. Thus the programmable divider starts with a division ratio of 256 or higher. The first I2C message must be sent only when the POWER ON RESET is completed. Division ratios of N < 256 are not allowed. The Prescaler The prescaler has a preamplifier which guarantees high input sensitivity. The Phase Comparator The phase comparator is phase and frequency sensitive and has very low output leakage current in the high impedance state. The Tuning Voltage Amplifier The amplifier is designed for very low noise, low input bias current and high power supply rejection. The positive input is biased internally. The tuning voltage amplifier needs an external pull-up resistor to generate the tuning voltage. The amplifier can be switched "Off" through bit T8. When bit T8 is "One", the amplifier is "Off". The tuning voltage is then pulled high by the external pull-up resistor. Figure 6 shows a possible filter arrangement. The component values depend very much on the application (tuner characteristic, reference frequency, etc.). The Oscillator The oscillator uses a 3.2 or 4.0 MHz crystal tied to ground in series with a capacitor. The crystal operates in its series resonance mode. The voltage at Pin 13, has low amplitude and low harmonic distortion. The negative impedance of the crystal input (Pin 13) is about 3.0 k. 7
Bits T9, T12: Control the Phase Comparator
T9 1 1 0 0 T12 0 1 0 1 Function Normal Operation High Impedance Upper Source "On" Only Lower Source "On" Only
Bits T10, T11: Control the Reference Divider
T10 0 0 1 1 T11 0 1 0 1 512 1024 1024 512 Division Ratio
Bit T13: Switches the Internal Signals Fref and FBY2 to Bit T13: the Band Buffer Outputs (Test)
T13 = 0 T13 = 1 Normal Operation Test Mode Fref Output at B3 (Pin 7) FBY2 Output at B5 (Pin 8)
Bits B3 and B5 have to be "On", B3 = B5 = 1 in the test mode. Fref is the reference frequency. FBY2 is the output frequency of the programmable divider, divided by two.
Bit T14: Controls the Charge Pump Current of the Bit T14: Phase Comparator
T14 = 0 T13 = 1 Pump Current 40 A Typical Normal Operation. Pump Current 125 A Typical
Bits T6, T7: Mixer/Oscillator Band Decoder The band decoder provides the band switching signal for the mixer/oscillator circuit. The buffer bits control the decoder output. The decoder can be controlled by the buffer bits or independently by the control bits T6 and T7 as per the tables below.
T7 0 0 1 1 B5 0 0 1 1 T6 0 1 0 1 B3 X X X X Decoder Output DEC Decoder Output Controlled by Buffer Bits B1, B3, B5 0 to 0.8 V 1.8 to 2.1 V 3.4 V to VCC1 (VCC1 = 4.5 to 5.5 V) B1 0 1 0 1 Decoder Output DEC 1.8 to 2.1 V 0 to 0.8 V 3.4 V to VCC1 (VCC1 = 4.5 to 5.5 V) Undefined
BA_Band Information
T7 T6 B5 X B3 X B1 X ACK
MOTOROLA ANALOG IC DEVICE DATA
MC44826
OUTLINE DIMENSIONS
D SUFFIX PLASTIC PACKAGE CASE 751A-03 (SO-14)
NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.
-A-
14 8
-B-
1 7
P 7 PL 0.25 (0.010)
M
B
M
G C
R X 45 _
F
-T-
SEATING PLANE
D 14 PL 0.25 (0.010)
K
M
M
S
J
TB
A
S
DIM A B C D F G J K M P R
MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0_ 7_ 5.80 6.20 0.25 0.50
INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0_ 7_ 0.228 0.244 0.010 0.019
Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages. "Typical" parameters which may be provided in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. Motorola does not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer. How to reach us: USA / EUROPE / Locations Not Listed: Motorola Literature Distribution; P.O. Box 20912; Phoenix, Arizona 85036. 1-800-441-2447 or 602-303-5454 MFAX: RMFAX0@email.sps.mot.com - TOUCHTONE 602-244-6609 INTERNET: http://Design-NET.com
JAPAN: Nippon Motorola Ltd.; Tatsumi-SPD-JLDC, 6F Seibu-Butsuryu-Center, 3-14-2 Tatsumi Koto-Ku, Tokyo 135, Japan. 03-81-3521-8315 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852-26629298
8
*MC44826/D*
MOTOROLA ANALOG IC DEVICE DATA MC44826/D


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