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Agilent HSDL-3612 IrDA(R) Data 1.4 Compliant 115.2 kb/s 3 V to 5 V Infrared Transceiver
Data Sheet
Description The HSDL-3612 is a low-profile infrared transceiver module that provides interface between logic and IR signals for through-air, serial, half-duplex IR data link. The module is compliant to IrDA Data Physical Layer Specifications 1.0 and IEC825-Class 1 Eye Safe.
Functional Block Diagram
VCC
R1 LEDA (10)
TXD (9)
SP
MD0 (4) MD1 (5)
HSDL-3612
Applications * Digital imaging - Digital still cameras - Photo-imaging printers * Data communication - Notebook computers - Desktop PCs - Win CE handheld products - Personal Digital Assistants (PDAs) - Printers - Fax machines, photocopiers - Screen projectors - Auto PCs - Dongles - Set-Top box * Telecommunication products - Cellular phones - Pagers * Small industrial & medical instrumentation - General data collection devices - Patient & pharmaceutical data collection devices
Features * Fully compliant to IrDA 1.0 physical layer specifications - 9.6 kb/s to 115.2 kb/s operation * Typical link distance > 1.5 m * IEC825-Class 1 eye safe * Low power operation range - 2.7 V to 5.25 V * Small module size - 4.0 x 12.2 x 4.9 mm (HxWxD) * Complete shutdown - TXD, RXD, PIN diode * Low shutdown current - 10 nA typical * Adjustable optical power management - Adjustable LED drive-current to maintain link integrity * Integrated EMI shield - Excellent noise immunity * Edge detection input - Prevents the LED from long turn-on time * Interface to various super I/O and controller devices * Designed to accommodate light loss with cosmetic window * Only 2 external components are required
RXD (8)
GND (3) CX1 GND (7) CX2 VCC (1) AGND (2)
The HSDL-3612 contains a highspeed and high-efficiency 870 nm LED, a silicon PIN diode, and an integrated circuit. The IC contains an LED driver and a receiver providing a single output (RXD) for all data rates supported. The HSDL-3612 can be completely shut down to achieve very low power consumption. In the shut down mode, the PIN diode will be inactive and thus producing very little photocurrent even under very bright ambient light. The HSDL-3612
also incorporated the capability for adjustable optical power. With two programming pins; MODE 0 and MODE 1, the optical power output can be adjusted lower when the nominal desired link distance is one-third or two-third of the full IrDA link. The HSDL-3612 front view options (HSDL-3612-007/-037) come with integrated shield that helps to ensure low EMI emission and high immunity to EMI field, thus enhancing reliable performance.
Application Support Information The Application Engineering group is available to assist you with the technical understanding associated with HSDL-3612 infrared transceiver module. You can contact them through your local sales representatives for additional details.
Ordering Information Package Option Package Part Number Standard Package Increment
Front View
HSDL-3612-007
400
Front View
HSDL-3612-037
1800
2
I/O Pins Configuration Table Pin 1 2 3 4 5 6 7 8 9 10 Description Supply Voltage Analog Ground Ground Mode 0 Mode 1 No Connection Ground Receiver Data Output Transmitter Data Input LED Anode Symbol V CC AGND GND MD0 MD1 NC GND RXD TXD LEDA
10 9
8
7
6
5
4
3
2
1
BACK VIEW (HSDL-3612-007/-037)
Transceiver Control Truth Table Mode 0 1 0 0 1 Mode 1 0 0 1 1 RX Function Shutdown SIR SIR SIR TX Function Shutdown Full Distance Power 2/3 Distance Power 1/3 Distance Power
Transceiver I/O Truth Table Transceiver Mode Active Active Active Shutdown
X = Don't Care
Inputs TXD 1 0 0 X[3] EI X High[1] Low Low
Outputs LED On Off Off Not Valid
RXD Not Valid Low[2] High Not Valid
EI = In-Band Infrared Intensity at detector
Notes: 1. In-Band El 115.2 kb/s. 2. Logic Low is a pulsed response. The condition is maintained for duration dependent on the pattern and strength of the incident intensity. 3. To maintain low shutdown current, TXD needs to be driven high or low and not left floating.
3
Recommended Application Circuit Components Component R1 CX1[4] CX2[5] Recommended Value 6.2 5%, 0.5 Watt, for 2.7 VCC 3.6 V operation 15.0 5%, 0.5 Watt, for 4.75 VCC 5.25 V operation 0.47 F 20%, X7R Ceramic 6.8 F 20%, Tantalum
Notes: 4. CX1 must be placed within 0.7 cm of the HSDL-3612 to obtain optimum noise immunity. 5. In environments with noisy power supplies, supply rejection performance can be enhanced by including CX2, as shown in "HSDL-3612 Functional Block Diagram" in page 3.
0.7 0.6 0.5
LOP (mW/sr)
200 180 160 140 120 100 80 60 40
ILED (A)
0.4 0.3 0.2 0.1 0 1.3 1.5 1.7 1.9 2.1 2.3
20 0 0 30 60 90 120 150 180 210 240 270 300
LEDA VOLTAGE (V)
ILED (mA)
ILED vs. LEDA.
Light Output Power (LOP) vs. ILED.
Marking Information The HSDL-3612-007/-037 is marked "3612YYWW" on the shield where "YY" indicates the unit's manufacturing year, and "WW" refers to the work week in which the unit is tested.
CAUTIONS: The BiCMOS inherent to the design of this component increases the component's susceptibility to damage from electrostatic discharge (ESD). It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD.
4
Absolute Maximum Ratings [6] Parameter Storage Temperature Operating Temperature DC LED Current Peak LED Current LED Anode Voltage Supply Voltage Transmitter Data Input Current Receiver Data Output Voltage Symbol TS TA ILED(DC) ILED(PK) VLEDA Vcc ITXD(DC) VO Minimum -40 -20 Maximum +100 +70 165 750 7 7 12 Vcc+0.5 Unit C C mA mA V V mA V |IO(RXD)| = 20 A Conditions
2 s pulse width, 10% duty cycle
-0.5 0 -12 -0.5
Note: 6. For implementations where case to ambient thermal resistance 50C/W.
Recommended Operating Conditions Parameter Operating Temperature Supply Voltage Logic High Input Voltage for TXD, MD0, MD1, and FIR_SEL Logic Low Transmitter Input Voltage LED (Logic High) Current Pulse Amplitude Receiver Signal Rate Symbol TA VCC VIH VIL ILEDA Minimum -20 2.7 2 VCC/3 0 180 2.4 Maximum +70 5.25 VCC VCC/3 300 115.2 Unit C V V V mA kb/s
5
Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25 C and 3.3 V unless otherwise noted. Parameter Transceiver Supply Current Digital Input Current Transmitter Transmitter Radiant Intensity Symbol Shutdown Idle Logic Low/High Logic High Intensity Peak Wavelength Spectral Line Half Width Viewing Angle Optical Pulse Width Rise and Fall Times Maximum Optical Pulse Width LED Anode On State Voltage LED Anode Off State Leakage Current I CC1 ICC2 IL/H Min. Typ. 10 2.5 -1 Max. 200 5 1 Unit nA mA A Conditions VI(TXD) VIL or VI(TXD) VIH VI(TXD) VIL, EI = 0 0 VI VCC
EIH
50
120
400
mW/sr
VIH = 3.0 V ILEDA = 200 mA 1/2 15
P 1/2
875 35
nm nm
21/2 tpw (EI) tr (EI), tf (EI) tpw (max)
30 1.5
1.6
60 1.8 40
s ns
20
50
s
tpw(TXD) = 1.6 s at 115.2 kb/s tpw(TXD) = 1.6 s at 115.2 kb/s tr/f (TXD) = 10 ns TXD pin stuck high
VON(LEDA) ILK(LEDA) 1
2.4 100
V nA
ILEDA = 200 mA, VI(TXD) VIH VLEDA = VCC = 5.25 V, VI(TXD) VIL
6
Electrical & Optical Specifications Specifications hold over the Recommended Operating Conditions unless otherwise noted. Unspecified test conditions can be anywhere in their operating range. All typical values are at 25 C and 3.3 V unless otherwise noted. Parameter Receiver Receiver Data Output Voltage Logic Low[7] Symbol VOL Min. 0 Typ. Max. 0.4 Unit V Conditions IOL = 1.0 mA, EI 3.6 W/cm2 , 1/2 15 IOH = -20 A, EI 0.3 W/cm2 , 1/2 15 For in-band signals 115.2 kb/s[8] For in-band signals[8]
Logic High
VOH
VCC - 0.2 -
VCC
V
Viewing Angle Logic High Receiver Input Irradiance Logic Low Receiver Input Irradiance Receiver Peak Sensitivity Wavelength Receiver SIR Pulse Width Receiver Latency Time Receiver Rise/Fall Times Receiver Wake Up Time
21/2 EIH EIL P tpw (SIR) tL tr/f (RXD) tW
30 0.0036
500 0.3 880
mW/cm2 W/cm2 nm
1 20 25
4.0 50 100
s s ns s
1/2 15[9], CL = 10 pF
[10]
Notes: 7. Logic Low is a pulsed response. The condition is maintained for duration dependent on pattern and strength of the incident intensity. 8. An in-band optical signal is a pulse/sequence where the peak wavelength, lp, is defined as 850 lp 900 nm, and the pulse characteristics are compliant with the IrDA Serial Infrared Physical Layer Link Specification. 9. For in-band signals 115.2 kb/s where 3.6 W/cm2 EI 500 mW/cm2 . 10. Wake Up Time is the time between the transition from a shutdown state to an active state and the time when the receiver is active and ready to receive infrared signals.
TXD "Stuck ON" Protection
TXD
LED
tpw (MAX.)
7
RXD Output Waveform
tpw VOH 90% 50% 10%
VOL
tf
tr
LED Optical Waveform
tpw LED ON 90% 50% 10% LED OFF
tr
tf
Receiver Wake Up Time Definition (when MD0 1 and MD1 0)
RX LIGHT
RXD
VALID DATA
tw
8
HSDL-3612-007 and HSDL3612-037 Package Outline with Dimension and Recommended PC Board Pad Layout
MOUNTING CENTER 6.10 PIN 1 2 3 4 5 FUNCTION VCC AGND GND MD0 MD1 PIN 6 7 8 9 10 FUNCTION NC GND RXD TXD LEDA 4.98 4.18 1.17
TOP VIEW
2.45
R 2.00
R 1.77
4.00 1.90 0.80 1.20 4.05 SIDE VIEW 3.24 12.20 FRONT VIEW 0.80 1.70 3.84 1.90
ALL DIMENSIONS IN MILLIMETERS (mm). DIMENSION TOLERANCE IS 0.20 mm UNLESS OTHERWISE SPECIFIED. MOUNTING CENTER
MID OF LAND PIN 1 0.70 0.43 1.05
PIN 10 PIN 1
PIN 10
2.40
2.08 0.45 0.70 4.95 2.35
10 CASTELLATION: PITCH 1.1 0.1 CUMULATIVE 9.90 0.1 BACK VIEW
2.84 LAND PATTERN
9
Tape and Reel Dimensions (HSDL-3612-007, -037)
ALL DIMENSIONS IN MILLIMETERS (mm)
QUANTITY = 400 PIECES PER REEL (HSDL-3612-007) 1800 PIECES PER TAPE (HSDL-3612-037)
13.00 0.50 R 1.00 (40 mm MIN.) EMPTY PARTS MOUNTED (400 mm MIN.) LEADER
21.00 0.80 2.00 0.50 DIRECTION OF PULLING EMPTY (40 mm MIN.)
CONFIGURATION OF TAPE LABEL
SHAPE AND DIMENSIONS OF REELS
A 10 4 1.55 0.05 5 2.00 0.10 6 4.00 0.10 B 3 1.75 0.10 5 (MAX.) 11.50 0.10 2 A 3.8 12 12.50 0.10 24.00 0.30 1 1.5 0.1 8 A A 8.00 0.10 7 A B
10 0.40 0.10 11 4.25 0.10 SECTION B-B
5 (MAX.)
4.4 A 5.20 0.10 9 SECTION A-A A
10
Moisture Proof Packaging All HSDL-3612 options are shipped in moisture proof package. Once opened, moisture absorption begins.
Baking Conditions If the parts are not stored in dry conditions, they must be baked before reflow to prevent damage to the parts. Package Temp. 60C 100C 125C 150C Time 48 hours 4 hours 2 hours 1 hour
UNITS IN A SEALED MOISTURE-PROOF PACKAGE
In reels In bulk
PACKAGE IS OPENED (UNSEALED)
Baking should be done only once.
Recommended Storage Conditions
ENVIRONMENT LESS THAN 30C, AND LESS THAN 60% RH
Storage Temperature Relative Humidity
10C to 30C below 60% RH
YES
NO BAKING IS NECESSARY
YES
PACKAGE IS OPENED LESS THAN 72 HOURS
NO
PERFORM RECOMMENDED BAKING CONDITIONS
NO
Time from Unsealing to Soldering After removal from the bag, the parts should be soldered within three days if stored at the recommended storage conditions. If times longer than 72 hours are needed, the parts must be stored in a dry box.
11
Reflow Profile
MAX. 245C R3 R4
230
T - TEMPERATURE - (C)
200 183 170 150 125 100 R1
R2
90 sec. MAX. ABOVE 183C
R5
50 25 0 P1 HEAT UP 50 100 150 200 P3 SOLDER REFLOW 250 P4 COOL DOWN 300
t-TIME (SECONDS) P2 SOLDER PASTE DRY
Process Zone Heat Up Solder Paste Dry Solder Reflow Cool Down
Symbol P1, R1 P2, R2 P3, R3 P3, R4 P4, R5
DT 25C to 125C 125C to 170C 170C to 230C (245C at 10 seconds max.) 230C to 170C 170C to 25C
Maximum DT/Dtime 4C/s 0.5C/s 4C/s -4C/s -3C/s
The reflow profile is a straightline representation of a nominal temperature profile for a convective reflow solder process. The temperature profile is divided into four process zones, each with different T/time temperature change rates. The T/time rates are detailed in the above table. The temperatures are measured at the component to printed circuit board connections. In process zone P1, the PC board and HSDL-3612 castellation I/O pins are heated to a temperature of 125C to activate the flux in the solder paste. The temperature ramp up rate, R1, is limited to 4C per second to allow for even heating of both the PC board and HSDL-3612 castellation I/O pins. 12
Process zone P2 should be of sufficient time duration (> 60 seconds) to dry the solder paste. The temperature is raised to a level just below the liquidus point of the solder, usually 170C (338F). Process zone P3 is the solder reflow zone. In zone P3, the temperature is quickly raised above the liquidus point of solder to 230C (446F) for optimum results. The dwell time above the liquidus point of solder should be between 15 and 90 seconds. It usually takes about 15 seconds to assure proper coalescing of the solder balls into liquid solder and the formation of good solder connections. Beyond a dwell time of 90 seconds, the intermetallic growth within the solder connections becomes excessive,
resulting in the formation of weak and unreliable connections. The temperature is then rapidly reduced to a point below the solidus temperature of the solder, usually 170C (338F), to allow the solder within the connections to freeze solid. Process zone P4 is the cool down after solder freeze. The cool down rate, R5, from the liquidus point of the solder to 25C (77F) should not exceed -3C per second maximum. This limitation is necessary to allow the PC board and HSDL-3612 castellation I/O pins to change dimensions evenly, putting minimal stresses on the HSDL-3612 transceiver.
Appendix A: HSDL-3612-007/-037 SMT Assembly Application Note 1.0 Solder Pad, Mask and Metal Solder Stencil Aperture
STENCIL APERTURE
METAL STENCIL FOR SOLDER PASTE PRINTING
LAND PATTERN
SOLDER MASK PCBA
Figure 1.0. Stencil and PCBA.
1.1 Recommended Land Pattern for HSDL-3612-007/-037
Dim. a b c (pitch) d e f g
mm 2.40 0.70 1.10 2.35 2.80 3.13 4.31
Inches 0.095 0.028 0.043 0.093 0.110 0.123 0.170
a
SHIELD SOLDER PAD Tx LENS e Rx LENS
d g b
Y
f
X
theta
FIDUCIAL
10x PAD
c
FIDUCIAL
Figure 2.0. Top view of land pattern.
13
1.2 Adjacent Land Keep-out and Solder Mask Areas Dim. h j k l mm min. 0.2 13.4 4.7 3.2 Inches min. 0.008 0.528 0.185 0.126
Note: Wet/Liquid Photo-Imaginable solder resist/mask is recommended.
j
* Adjacent land keep-out is the maximum space occupied by the unit relative to the land pattern. There should be no other SMD components within this area. * "h" is the minimum solder resist strip width required to avoid solder bridging adjacent pads. * It is recommended that 2 fiducial cross be placed at midlength of the pads for unit alignment.
Tx LENS
Rx LENS
LAND
h Y
SOLDER MASK
k
l
2.0 Recommended Solder Paste/ Cream Volume for Castellation Joints Based on calculation and experiment, the printed solder paste volume required per castellation pad is 0.30 cubic mm (based on either no-clean or aqueous solder cream types with typically 60 to 65% solid content by volume).
Figure 3.0. HSDL-3612-007/-037 PCBA - Adjacent land keep-out and solder mask.
14
2.1 Recommended Metal Solder Stencil Aperture It is recommended that only 0.152 mm (0.006 inches) or 0.127 mm (0.005 inches) thick stencil be used for solder paste
printing. This is to ensure adequate printed solder paste volume and no shorting. The following combination of metal stencil aperture and metal stencil thickness should be used:
See Fig 4.0 t, nominal stencil thickness l, length of aperture mm inches mm inches 0.152 0.006 2.8 0.05 0.110 0.002 0.127 0.005 3.4 0.05 0.134 0.002 w, the width of aperture is fixed at 0.70 mm (0.028 inches) Aperture opening for shield pad is 2.8 mm x 2.35 mm as per land dimensions
APERTURE AS PER LAND DIMENSIONS t (STENCIL THICKNESS)
SOLDER PASTE
w l
Figure 4.0. Solder paste stencil aperture.
3.0 Pick and Place Misalignment Tolerance and Product SelfAlignment after Solder Reflow If the printed solder paste volume is adequate, the unit will selfalign in the X-direction after solder reflow. Units should be properly reflowed in IR Hot Air convection oven using the recommended reflow profile. The direction of board travel does not matter.
Allowable Misalignment Tolerance X - direction Theta - direction 0.2 mm (0.008 inches) 2 degrees
15
3.1 Tolerance for X-axis Alignment of Castellation Misalignment of castellation to the land pad should not exceed 0.2 mm or approximately half the width of the castellation during
placement of the unit. The castellations will completely selfalign to the pads during solder reflow as seen in the pictures below.
Photo 1.0. Castellation misaligned to land pads in x-axis before reflow.
Photo 2.0. Castellation self-align to land pads after reflow.
3.2 Tolerance for Rotational (Theta) Misalignment Units when mounted should not be rotated more than 2 degrees with reference to center X-Y as specified in Fig 2.0. Pictures 3.0 and 4.0 show units before and
after reflow. Units with a Theta misalignment of more than 2 degrees do not completely self align after reflow. Units with 2 degree rotational or Theta misalignment self-aligned completely after solder reflow.
Photo 3.0. Unit is rotated before reflow.
Photo 4.0. Unit self-aligns after reflow.
16
3.3 Y-axis Misalignment of Castellation In the Y-direction, the unit does not self-align after solder reflow. It is recommended that the unit be placed in line with the fiducial mark (mid-length of land pad.) This will enable sufficient land length (minimum of 1/2 land length.) to form a good joint. See Fig 5.0.
LENS EDGE FIDUCIAL
Y
MINIMUM 1/2 THE LENGTH OF THE LAND PAD
Figure 5.0. Section of a castellation in Y-axis.
3.4 Example of Good HSDL-3612007/-037 Castellation Solder Joints This joint is formed when the printed solder paste volume is adequate, i.e. 0.30 cubic mm and reflowed properly. It should be reflowed in IR Hot-air convection reflow oven. Direction of board travel does not matter.
Photo 5.0. Good solder joint.
4.0 Solder Volume Evaluation and Calculation Geometry of an HSDL-3612-007/ -037 solder fillet.
0.425 0.20
0.8
1.2
0.70
0.4
0.7
17
www.agilent.com/semiconductors
For product information and a complete list of distributors, please go to our web site. For technical assistance call: Americas/Canada: +1 (800) 235-0312 or (408) 654-8675 Europe: +49 (0) 6441 92460 China: 10800 650 0017 Hong Kong: (+65) 6271 2451 India, Australia, New Zealand: (+65) 6271 2394 Japan: (+81 3) 3335-8152(Domestic/International), or 0120-61-1280(Domestic Only) Korea: (+65) 6271 2194 Malaysia, Singapore: (+65) 6271 2054 Taiwan: (+65) 6271 2654 Data subject to change. Copyright (c) 2002 Agilent Technologies, Inc. December 2, 2002 5988-8423EN

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