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Datasheet File OCR Text: |
fax id: 6126 For new designs see CY7C371i CY7C371 UltraLogicTM 32-Macrocell Flash CPLD Features * * * * * * 32 macrocells in two logic blocks 32 I/O pins 6 dedicated inputs including 2 clock pins Bus Hold capabilities on all I/Os and dedicated inputs No hidden delays High speed -- fMAX = 143 MHz -- tPD= 8.5 ns -- tS = 5 ns -- tCO = 6 ns * Electrically alterable FLASH technology * Available in 44-pin PLCC, CLCC, and TQFP packages * Pin compatible with the CY7C372 of use and high performance of the 22V10 to high-density CPLDs. The 32 macrocells in the CY7C371 are divided between two logic blocks. Each logic block includes 16 macrocells, a 72 x 86 product term array, and an intelligent product term allocator. The logic blocks in the FLASH370 architecture are connected with an extremely fast and predictable routing resource--the Programmable Interconnect Matrix (PIM). The PIM brings flexibility, routability, speed, and a uniform delay to the interconnect. Like all members of the FLASH370 family, the CY7C371 is rich in I/O resources. Each macrocell in the device features an associated I/O pin, resulting in 32 I/O pins on the CY7C371. In addition, there are four dedicated inputs and two input/clock pins. Finally, the CY7C371 features a very simple timing model. Unlike other high-density CPLD architectures, there are no hidden speed delays such as fanout effects, interconnect delays, or expander delays. Regardless of the number of resources used or the type of application, the timing parameters on the CY7C371 remain the same. Functional Description The CY7C371 is a Flash erasable Complex Programmable Logic Device (CPLD) and is part of the FLASH370 family of high-density, high-speed CPLDs. Like all members of the FLASH370 family, the CY7C371 is designed to bring the ease Logic Block Diagram CLOCK INPUTS INPUTS 3 INPUT MACROCELLS 2 16 I/Os I/O0-I/O15 LOGIC BLOCK A 2 INPUT/CLOCK MACROCELLS 2 LOGIC BLOCK B 16 I/Os I/O16-I/O31 36 16 PIM 36 16 16 16 Selection Guide Maximum Propagation Delay, tPD (ns) Minimum Set-Up, tS (ns) Maximum Clock to Output, tCO (ns) Maximum Supply Commercial Current, ICC (mA) Military/Ind. Shaded area contains preliminary information. 7C371-143 8.5 5 6 220 7C371-110 10 6 6.5 175 7C371-83 12 10 10 175 220 7C371L-83 12 10 10 90 110 7C371-66 15 12 12 175 220 7C371L-66 15 12 12 90 110 Cypress Semiconductor Corporation * 3901 North First Street * San Jose * CA 95134 * 408-943-2600 December 1992 - Revised April 20, 1998 |
Price & Availability of CY7C371
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