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SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS D 2-V to 5.5-V VCC Operation D Max tpd of 6.5 ns at 5 V D Typical VOLP (Output Ground Bounce) D D <0.8 V at VCC = 3.3 V, TA = 25C Typical VOHV (Output VOH Undershoot) >2.3 V at VCC = 3.3 V, TA = 25C Support Mixed-Mode Voltage Operation on All Ports D Ioff Supports Partial-Power-Down Mode D D Operation Latch-Up Performance Exceeds 250 mA Per JESD 17 ESD Protection Exceeds JESD 22 - 2000-V Human-Body Model (A114-A) - 200-V Machine Model (A115-A) - 1000-V Charged-Device Model (C101) SN54LV245A . . . FK PACKAGE (TOP VIEW) DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 1 20 19 OE 18 B1 17 B2 16 B3 15 B4 14 B5 13 B6 12 B7 VCC DIR A2 A1 DIR VCC OE A3 A4 A5 A6 A7 4 5 6 7 8 3 2 1 20 19 18 17 16 15 14 9 10 11 12 13 SN54LV245A . . . J OR W PACKAGE SN74LV245A . . . DB, DGV, DW, NS, OR PW PACKAGE (TOP VIEW) SN74LV245A . . . RGY PACKAGE (TOP VIEW) A1 A2 A3 A4 A5 A6 A7 A8 2 3 4 5 6 7 8 9 10 11 B1 B2 B3 B4 B5 description/ordering information These octal bus transceivers are designed for 2-V to 5.5-V VCC operation. ORDERING INFORMATION TA PACKAGE QFN - RGY SOIC - DW SOP - NS SSOP - DB -40C to 85C TSSOP - PW TVSOP - DGV VFBGA - GQN CDIP - J -55 C 125C -55C to 125 C CFP - W LCCC - FK Reel of 1000 Tube of 25 Reel of 2000 Reel of 2000 Reel of 2000 Tube of 70 Reel of 2000 Reel of 250 Reel of 2000 Reel of 1000 Tube of 20 Tube of 85 Tube of 55 ORDERABLE PART NUMBER SN74LV245ARGYR SN74LV245ADW SN74LV245ADWR SN74LV245ANSR SN74LV245ADBR SN74LV245APW SN74LV245APWR SN74LV245APWT SN74LV245ADGVR SN74LV245AGQNR SNJ54LV245AJ SNJ54LV245AW SNJ54LV245AFK LV245A LV245A SNJ54LV245AJ SNJ54LV245AW LV245A LV245A 74LV245A LV245A TOP-SIDE MARKING LV245A SNJ54LV245AFK Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 GND B8 Copyright 2005, Texas Instruments Incorporated * DALLAS, TEXAS 75265 A8 GND B8 B7 B6 1 SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS description/ordering information (continued) The 'LV245A devices are designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. GQN PACKAGE (TOP VIEW) 1 A B C D E 2 3 4 A B C D E terminal assignments 1 A1 A3 A5 A7 GND 2 DIR B2 A4 B6 A8 3 VCC A2 B4 A6 B8 4 OE B1 B3 B5 B7 FUNCTION TABLE INPUTS OE L L H DIR L H X OPERATION B data to A bus A data to B bus Isolation logic diagram (positive logic) DIR 1 19 OE A1 2 18 B1 To Seven Other Channels Pin numbers shown are for the DB, DGV, DW, FK, J, NS, PW, RGY, and W packages. 2 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS absolute maximum ratings over operating free-air temperature range (unless otherwise noted) Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Input voltage range, VI: Except I/O ports (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V I/O ports (see Notes 1 and 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V to 7 V Output voltage range applied in the high or low state, VO (see Notes 1 and 2) . . . . . . -0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -20 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -50 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70 mA Package thermal impedance, JA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70C/W (see Note 3): DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92C/W (see Note 3): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58C/W (see Note 3): GQN package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78C/W (see Note 3): NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60C/W (see Note 3): PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83C/W (see Note 4): RGY package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65C to 150C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The package thermal impedance is calculated in accordance with JESD 51-7. 4. The package thermal impedance is calculated in accordance with JESD 51-5. POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 3 SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS recommended operating conditions (see Note 5) SN54LV245A MIN VCC Supply voltage VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 High or low state VO Output voltage 3-state VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V VCC = 2.3 V to 2.7 V VCC = 3 V to 3.6 V VCC = 4.5 V to 5.5 V 0 0 2 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 5.5 VCC 5.5 -50 -2 -8 -16 50 2 8 16 200 100 20 0 0 0 MAX 5.5 SN74LV245A MIN 2 1.5 VCC x 0.7 VCC x 0.7 VCC x 0.7 0.5 VCC x 0.3 VCC x 0.3 VCC x 0.3 5.5 VCC 5.5 -50 -2 -8 -16 50 2 8 16 200 100 20 ns/V mA A mA V V MAX 5.5 UNIT V VIH High-level input voltage VIL Low-level input voltage VI Input voltage V V A IOH High-level output current IOL Low-level output current t/v Input transition rise or fall rate TA Operating free-air temperature -55 125 -40 85 C NOTE 5: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) SN54LV245A PARAMETER TEST CONDITIONS IOH = -50 A IOH = -2 mA IOH = -8 mA IOH = -16 mA IOL = 50 A IOL = 2 mA IOL = 8 mA IOL = 16 mA Control inputs A or B port VI = 5.5 V or GND VO = VCC or GND VI = VCC or GND, IO = 0 VI or VO = 0 to 5.5 V Control inputs A or B port VI = VCC or GND VO = VCC or GND VCC 2 V to 5.5 V 2.3 V 3V 4.5 V 2 V to 5.5 V 2.3 V 3V 4.5 V 0 to 5.5 V 5.5 V 5.5 V 0 3.3 V Ci Cio 5V 3.3 V 5V 3 3 5.5 5.5 MIN VCC-0.1 2 2.48 3.8 0.1 0.4 0.44 0.55 1 5 20 5 3 3 5.5 5.5 pF pF TYP MAX SN74LV245A MIN VCC-0.1 2 2.48 3.8 0.1 0.4 0.44 0.55 1 5 20 5 A A A A V V TYP MAX UNIT VOH VOL II IOZ ICC Ioff switching characteristics over recommended operating VCC = 2.5 V 0.2 V (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis tpd ten tdis tsk(o) * On products compliant to MIL-PRF-38535, this parameter is not production tested. FROM (INPUT) A or B OE OE A or B OE OE TO (OUTPUT) B or A A or B A or B B or A A or B A or B CL = 50 pF CL = 15 pF LOAD CAPACITANCE MIN free-air temperature SN74LV245A MIN 1 1 1 1 1 1 MAX 15 22 20 18 26 25 2 range, UNIT TA = 25C TYP MAX 8.3* 11.8* 11.8* 11.2 14.1 17.6 13* 19.9* 18.1* 15.9 22.7 23.1 2 SN54LV245A MIN 1* 1* 1* 1 1 1 MAX 15* 22* 20* 18 26 25 ns ns switching characteristics over recommended operating VCC = 3.3 V 0.3 V (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis tpd ten tdis tsk(o) * On products compliant to MIL-PRF-38535, this parameter is not production tested. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. free-air temperature SN74LV245A MIN 1 1 1 1 1 1 MAX 10 15.5 19.5 13.5 19 22 1.5 range, UNIT FROM (INPUT) A or B OE OE A or B OE OE TO (OUTPUT) B or A A or B A or B B or A A or B A or B LOAD CAPACITANCE MIN TA = 25C TYP MAX 5.9* 8.4* 13.2* 16.5* 11.9 16.7 19.8 1.5 SN54LV245A MIN 1* 1* 1* 1 1 1 MAX 10* 15.5* 19.5* 13.5 19 22 CL = 15 pF 8.2* 9.6* 7.9 9.9 ns CL = 50 pF 13.9 ns POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 5 SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS switching characteristics over recommended operating VCC = 5 V 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER tpd ten tdis tpd ten tdis tsk(o) * On products compliant to MIL-PRF-38535, this parameter is not production tested. FROM (INPUT) A or B OE OE A or B OE OE TO (OUTPUT) B or A A or B A or B B or A A or B A or B CL = 50 pF CL = 15 pF LOAD CAPACITANCE MIN free-air temperature SN74LV245A MIN 1 1 1 1 1 1 MAX 6.5 10 14.2 8.5 12 16 1 range, UNIT TA = 25C TYP MAX 4.3* 5.7* 7.8* 5.6 7 10.9 5.5* 8.5* 12.8* 7.5 10.6 14.7 1 SN54LV245A MIN 1* 1* 1* 1 1 1 MAX 6.5* 10.6* 14.7* 8.5 12 16 ns ns noise characteristics, VCC = 3.3 V, CL = 50 pF, TA = 25C (see Note 6) SN74LV245A PARAMETER VOL(P) VOL(V) VOH(V) VIH(D) VIL(D) Quiet output, maximum dynamic VOL Quiet output, minimum dynamic VOL Quiet output, minimum dynamic VOH High-level dynamic input voltage Low-level dynamic input voltage 2.31 0.99 MIN TYP 0.5 -0.4 2.9 MAX 0.8 -0.8 UNIT V V V V V NOTE 6: Characteristics are for surface-mount packages only. operating characteristics, TA = 25C PARAMETER Cpd Power dissipation capacitance Outputs enabled TEST CONDITIONS CL = 50 pF, f = 10 MHz VCC 3.3 V 5V TYP 20 25 pF UNIT PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 6 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 SCLS382N - SEPTEMBER 1997 - REVISED APRIL 2005 SN54LV245A, SN74LV245A OCTAL BUS TRANSCEIVERS WITH 3 STATE OUTPUTS PARAMETER MEASUREMENT INFORMATION RL = 1 k S1 VCC Open GND From Output Under Test CL (see Note A) Test Point From Output Under Test CL (see Note A) TEST tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open Drain S1 Open VCC GND VCC LOAD CIRCUIT FOR TOTEM-POLE OUTPUTS LOAD CIRCUIT FOR 3-STATE AND OPEN-DRAIN OUTPUTS VCC Timing Input tw VCC tsu Data Input 0V 50% VCC 50% VCC th 0V VCC 50% VCC 0V VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC VCC 50% VCC tPZL 50% VCC tPZH Output Waveform 2 S1 at GND (see Note B) 50% VCC 50% VCC 0V tPLZ VCC VOL + 0.3 V VOL tPHZ VOH - 0.3 V VOH 0 V Input 50% VCC 50% VCC VOLTAGE WAVEFORMS PULSE DURATION Input tPLH In-Phase Output tPHL Out-of-Phase Output 50% VCC 50% VCC tPHL 0V Output Control 50% VCC VOH 50% VCC VOL tPLH Output Waveform 1 S1 at VCC (see Note B) 50% VCC VOH 50% VCC VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR 1 MHz, ZO = 50 , tr 3 ns, tf 3 ns. D. The outputs are measured one at a time, with one input transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPHL and tPLH are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 7 PACKAGE OPTION ADDENDUM www.ti.com 25-Oct-2005 PACKAGING INFORMATION Orderable Device SN74LV245ADBLE SN74LV245ADBR SN74LV245ADBRE4 SN74LV245ADGVR SN74LV245ADGVRE4 SN74LV245ADW SN74LV245ADWE4 SN74LV245ADWR SN74LV245ADWRE4 SN74LV245AGQNR SN74LV245ANSR SN74LV245ANSRG4 SN74LV245APW SN74LV245APWE4 SN74LV245APWLE SN74LV245APWR SN74LV245APWRE4 SN74LV245APWRG4 SN74LV245APWT SN74LV245APWTE4 SN74LV245ARGYR SN74LV245ARGYRG4 SN74LV245AZQNR (1) Status (1) OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE OBSOLETE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE ACTIVE Package Type SSOP SSOP SSOP TVSOP TVSOP SOIC SOIC SOIC SOIC VFBGA SO SO TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP TSSOP QFN QFN VFBGA Package Drawing DB DB DB DGV DGV DW DW DW DW GQN NS NS PW PW PW PW PW PW PW PW RGY RGY ZQN Pins Package Eco Plan (2) Qty 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 20 TBD 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 25 25 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) Lead/Ball Finish Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU SNPB CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU Call TI CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU CU NIPDAU SNAGCU MSL Peak Temp (3) Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-240C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Call TI Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-1-260C-UNLIM Level-2-260C-1YEAR Level-2-260C-1YEAR Level-1-260C-UNLIM 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 1000 TBD 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 70 70 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) TBD 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 2000 Green (RoHS & no Sb/Br) 250 250 Green (RoHS & no Sb/Br) Green (RoHS & no Sb/Br) 1000 Green (RoHS & no Sb/Br) 1000 Green (RoHS & no Sb/Br) 1000 Green (RoHS & no Sb/Br) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. Addendum-Page 1 PACKAGE OPTION ADDENDUM www.ti.com 25-Oct-2005 OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 MECHANICAL DATA MPDS006C - FEBRUARY 1996 - REVISED AUGUST 2000 DGV (R-PDSO-G**) 24 PINS SHOWN 0,23 0,13 13 PLASTIC SMALL-OUTLINE 0,40 24 0,07 M 0,16 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 0- 8 1 A 12 0,75 0,50 Seating Plane 1,20 MAX 0,15 0,05 0,08 PINS ** DIM A MAX A MIN 14 3,70 3,50 16 3,70 3,50 20 5,10 4,90 24 5,10 4,90 38 7,90 7,70 48 9,80 9,60 56 11,40 11,20 4073251/E 08/00 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side. Falls within JEDEC: 24/48 Pins - MO-153 14/16/20/56 Pins - MO-194 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MSSO002E - JANUARY 1995 - REVISED DECEMBER 2001 DB (R-PDSO-G**) 28 PINS SHOWN 0,65 28 0,38 0,22 15 0,15 M PLASTIC SMALL-OUTLINE 0,25 0,09 5,60 5,00 8,20 7,40 Gage Plane 1 A 14 0- 8 0,25 0,95 0,55 Seating Plane 2,00 MAX 0,05 MIN 0,10 PINS ** DIM A MAX 14 16 20 24 28 30 38 6,50 6,50 7,50 8,50 10,50 10,50 12,90 A MIN 5,90 5,90 6,90 7,90 9,90 9,90 12,30 4040065 /E 12/01 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-150 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 MECHANICAL DATA MTSS001C - JANUARY 1995 - REVISED FEBRUARY 1999 PW (R-PDSO-G**) 14 PINS SHOWN PLASTIC SMALL-OUTLINE PACKAGE 0,65 14 8 0,30 0,19 0,10 M 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 A 7 0- 8 0,75 0,50 Seating Plane 1,20 MAX 0,15 0,05 0,10 PINS ** DIM A MAX 8 14 16 20 24 28 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 4040064/F 01/97 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 * DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI's terms and conditions of sale supplied at the time of order acknowledgment. TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed. TI assumes no liability for applications assistance or customer product design. Customers are responsible for their products and applications using TI components. To minimize the risks associated with customer products and applications, customers should provide adequate design and operating safeguards. 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