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DAC80 DAC80P
Monolithic 12-Bit DIGITAL-TO-ANALOG CONVERTERS
FEATURES
q INDUSTRY STANDARD PINOUT q FULL 10V SWING WITH VCC = 12VDC q DIGITAL INPUTS ARE TTL- AND CMOS-COMPATIBLE q GUARANTEED SPECIFICATIONS WITH 12V AND 15V SUPPLIES q 1/2LSB MAXIMUM NONLINEARITY: 0C to +70C q SETTLING TIME: 4s max to 0.01% of Full Scale q GUARANTEED MONOTONICITY: 0C to +70C q TWO PACKAGE OPTIONS: Hermetic sidebrazed ceramic and low-cost molded plastic resistors, as well as low integral and differential linearity errors. Innovative circuit design enables the DAC80 to operate at supply voltages as low as 11.4V with no loss in performance or accuracy over any range of output voltage. The lower power dissipation of this 118-mil by 121-mil chip results in higher reliability and greater long term stability. Burr-Brown has further enhanced the reliability of the monolithic DAC80 by offering a hermetic, side-brazed, ceramic package. In addition, ease of use has been enhanced by eliminating the need for a +5V logic power supply. For applications requiring both reliability and low cost, the DAC80P in a molded plastic package offers the same electrical performance over temperature as the ceramic model. The DAC80P is available with voltage output only. For designs that require a wider temperature range, see Burr-Brown models DAC85H and DAC87H.
DESCRIPTION
This monolithic digital-to-analog converter is pin-forpin equivalent to the industry standard DAC80 first introduced by Burr-Brown. Its single-chip design includes the output amplifier and provides a highly stable reference capable of supplying up to 2.5mA to an external load without degradation of D/A performance. This converter uses proven circuit techniques to provide accurate and reliable performance over temperature and power supply variations. The use of a buried zener diode as the basis for the internal reference contributes to the high stability and low noise of the device. Advanced methods of laser trimming result in precision output current and output amplifier feedback
12-Bit Resistor Ladder Network and Current Switches Reference Control Circuit
Reference
Digital Inputs
Gain Adjustment Scaling Network
Analog Output Offset Adjustment + Supply - Supply
International Airport Industrial Park * Mailing Address: PO Box 11400 Tel: (520) 746-1111 * Twx: 910-952-1111 * Cable: BBRCORP *
* Tucson, AZ 85734 * Street Address: 6730 S. Tucson Blvd. * Tucson, AZ 85706 Telex: 066-6491 * FAX: (520) 889-1510 * Immediate Product Info: (800) 548-6132 PDS-643F Printed in U.S.A. July, 1993
(c)1986 Burr-Brown Corporation
SPECIFICATIONS
ELECTRICAL
Typical at +25C and VCC = 12V or 15V unless otherwise noted. DAC80 PARAMETER DIGITAL INPUT Resolution Logic Levels (0C to +70C)(1): VIH (Logic "1") VIL (Logic "0") IIH (VIN = +2.4V) IIL (VIN = +0.4V) ACCURACY (at +25C) Linearity Error Differential Linearity Error Gain Error(2) Offset Error(2) DRIFT (0C to +70C)(4) Total Bipolar Drift (includes gain, offset, and linearity drifts) Total Error Over 0C to +70C(5) Unipolar Bipolar Gain: Including Internal Reference Excluding Internal Reference Unipolar Offset Bipolar Offset Differential Linearity 0C to +70C Linearity Error 0C to +70C Monotonicity Guaranteed CONVERSION SPEED, VOUT Models Settling Time to 0.01% of FSR For FSR Change (2k || 500pF Load) with 10k Feedback with 5k Feedback For 1LSB Change Slew Rate CONVERSION SPEED, IOUT Models Settling Time to 0.01% of FSR For FSR change: 10 to 100 Load 1k Load ANALOG OUTPUT, VOUT Models Ranges Output Current(6) Output Impedance (DC) Short Circuit to Common, Duration(7) ANALOG OUTPUT, IOUT Models Ranges: Bipolar Unipolar Output Impendance: Bipolar Unipolar Compliance REFERENCE VOLTAGE OUTPUT External Current (constant load) Drift vs Temperature Output Impedance POWER SUPPLY SENSITIVITY VCC = 12VDC or 15VDC POWER SUPPLY REQUIREMENTS VCC Supply Drain (no load): +VCC -VCC Power Dissipation (VCC = 15VDC) TEMPERATURE RANGE Specification Operating Storage: Plastic DIP Ceramic DIP 11.4 8 15 345 0 -25 -60 -65 MIN TYP MAX 12 +2 0 +16.5 +0.8 +20 -180 1/4 1/2 0.1 0.05 10 0.06 0.06 10 5 1 7 1/2 1/4 0 1/2 3/4 0.3 0.15 25 0.15 0.12 30 10 3 15 3/4 1/2 +70 UNITS Bits VDC VDC A A LSB LSB % % of FSR(3) ppm of FSR/C % of FSR % of FSR ppm/C ppm/C ppm of FSR/C ppm of FSR/C LSB LSB C
3 2 1 10
4 3
s s s V/s
300 1 2.5, 5, 10, +5, +10 0.05 Indefinite 0.96 -1.96 2.6 4.6 -2.5 +6.23 1.0 -2.0 3.2 6.6 +6.30 10 1 0.002 1.04 -2.04 3.7 8.6 +2.5 +6.37 2.5 20
ns s V mA
5
mA mA k k V V mA ppm/C % FSR/ % VCC VDC mA mA mW C C C C
0.006 16.5 12 20 480 +70 +85 +100 +150
NOTES: (1) Refer to "Logic Input Compatibility" section. (2) Adjustable to zero with external trim potentiometer. (3) FSR means full scale range and is 20V for 10V range, 10V for 5V range for VOUT models; 2mA for IOUT models. (4) To maintain drift spec, internal feedback resistors must be used. (5) Includes the effects of gain, offset and linearity drift. Gain and offset errors externally adjusted to zero at +25C. (6) For VCC less than 12VDC, limit output current load to 2.5mA to maintain 10V full scale output voltage swing. For output range of 5V or less, the output current is 5mA over entire VCC range. (7) Short circuit current is 40mA, max.
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FUNCTIONAL DIAGRAM AND PIN ASSIGNMENTS
Voltage Models (MSB) Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 1 2 3 4 5 6 7 8 9 12-Bit Resistor Ladder Network and Current Switches 5k 5k 6.3k 18 10V Range 17 Bipolar Offset 16 Ref Input 15 VOUT 14 -VCC 13 NC(1) Bit 7 Bit 8 Bit 9 7 8 9 Reference Control Circuit 24 6.3V Ref Out 23 Gain Adjust 22 +VCC 21 Common 20 Summing Junction 19 20V Range (MSB) Bit 1 Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 1 2 3 4 5 6 12-Bit Resistor Ladder Network and Current Switches 2k 3k 5k 17 Bipolar Offset 6.3k 16 Ref Input 15 IOUT 14 -VCC 13 NC(1) Bit 10 10 Bit 11 11 (LSB) Bit 12 12 Bit 10 10 Bit 11 11 (LSB) Bit 12 12 19 Scaling Network 18 Scaling Network Reference Control Circuit Current Models 24 6.3V Ref Out 23 Gain Adjust 22 +VCC 21 Common 20 Scaling Network
NOTE: (1) Logic supply applied to this pin has no effect.
ABSOLUTE MAXIMUM RATINGS
+VCC to Common ...................................................................... 0V to +18V -VCC to Common ......................................................................... 0V to -18 Digital Data Inputs to Common .............................................. -1V to +18V Reference Output to Common ............................................................ VCC Reference Input to Common ............................................................... VCC Bipolar Offset to Common ................................................................... VCC 10V Range R to Common ................................................................... VCC 20V Range R to Common ................................................................... VCC External Voltage to DAC Output .............................................. -5V to +5V Lead Temperature (soldering, 10s) ................................................ +300C Max Junction Temperature .............................................................. 165C Thermal Resistance, JA: Plastic DIP ........................................... 100C/W Ceramic DIP ......................................... 65C/W Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
PACKAGE INFORMATION
MODEL DAC80P DAC80 PACKAGE 24-Pin Plastic DIP 24-Pin Ceramic DIP PACKAGE DRAWING NUMBER(1) 167 125
NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix D of Burr-Brown IC Data Book.
BURN-IN SCREENING Burn-in screening is an option available for the models indicated in the Ordering Information table. Burn-in duration is 160 hours at the maximum specified grade operating temperature (or equivalent combination of time and temperature). All units are tested after burn-in to ensure that grade specifications are met. To order burn-in, add "-BI" to the base model number.
ORDERING INFORMATION
MODEL DAC80-CBI-I DAC80Z-CBI-I DAC80-CBI-V DAC80Z-CBI-V DAC80P-CBI-V PACKAGE Ceramic DIP Ceramic DIP Ceramic DIP Ceramic DIP Plastic DIP OUTPUT Current Current Voltage Voltage Voltage
BURN-IN SCREENING OPTION MODEL DAC80-CBI-V-BI DAC80P-CBI-V-BI PACKAGE Ceramic DIP Plastic DIP BURN-IN TEMP. (160h)(1) +125C +125C
NOTE: (1) Or equivalent combination. See text.
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DAC80/80P
DICE INFORMATION
PAD 1 2 3 4 5 6 7 8 9 10 11 12 13 14
FUNCTION Bit 1 (MSB) Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 Bit 10 Bit 11 Bit 12 (LSB) NC NC
PAD 15 16 17 18 19 20 21 22 23 24 25 26 27
FUNCTION -VCC VOUT Ref In Bipolar Offset Scale 10V FSR Scale 20V FSR NC Sum Junct COM COM +VCC Gain Adjust 6.3V Ref Out
Substrate Bias: Isolated. NC: No Connection
MECHANICAL INFORMATION
MILS (0.001") Die Size Die Thickness Min. Pad Size Metalization 118 x 121 5 20 3 4x4 MILLIMETERS 3.0 x 3.07 0.13 0.51 0.08 0.10 x 0.10 Aluminum
DAC80KD-V DIE TOPOGRAPHY
PAD 1 2 3 4 5 6 7 8 9 10 11 12 13 14
FUNCTION Bit 1 (MSB) Bit 2 Bit 3 Bit 4 Bit 5 Bit 6 Bit 7 Bit 8 Bit 9 Bit 10 Bit 11 Bit 12 (LSB) NC NC
PAD 15 16 17 18 19 20 21 22 23 24 25 26 27
FUNCTION -VCC IOUT Ref In Bipolar Offset Scale 10V FSR Scale 20V FSR Scale NC COM COM +VCC Gain Adjust 6.3V Ref Out
Substrate Bias: Isolated. NC: No Connection
MECHANICAL INFORMATION
MILS (0.001") Die Size Die Thickness Min. Pad Size Metalization 118 x 121 5 20 3 4x4 MILLIMETERS 3.0 x 3.07 0.13 0.51 0.08 0.10 x 0.10 Aluminum
DAC80KD-I DIE TOPOGRAPHY
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DISCUSSION OF SPECIFICATIONS
DIGITAL INPUT CODES The DAC80 accepts complementary binary digital input codes. The CBI model may be connected by the user for any one of three complementary codes: CSB, COB, or CTC (see Table I).
DIGITAL INPUT CSB Complementary Straight Binary +Full Scale +1/2 Full Scale 1/2 Full Scale -1LSB Zero ANALOG OUTPUT COB CTC(1) Complementary Complementary Offset Two's Binary Complement +Full Scale Zero -1LSB -Full Scale -1LSB -Full Scale -Full Scale Zero
SETTLING TIME Settling time for each DAC80 model is the total time (including slew time) required for the output to settle within an error band around its final value after a change in input (see Figure 1).
1
Accuracy Percent of Full-Scale Range (%)
V Models 0.3 I Models 0.1 0.03 0.01 0.003 0.001 0.1 1 RL= 10 to 100 RL= 1000 to 1875
10k Feedback 5k Feedback
MSB
LSB
000000000000 011111111111 100000000000 111111111111
10 Settling Time (s)
100
NOTE: (1) Invert the MSB of the COB code with an external inverter to obtain CTC code.
TABLE I. Digital Input Codes. ACCURACY Linearity of a D/A converter is the true measure of its performance. The linearity error of the DAC80 is specified over its entire temperature range. This means that the analog output will not vary by more than 1/2LSB, maximum, from an ideal straight line drawn between the end points (inputs all "1"s and all "0"s) over the specified temperature range of 0C to +70C. Differential linearity error of a D/A converter is the deviation from an ideal 1LSB voltage change from one adjacent output state to the next. A differential linearity error specification of 1/2LSB means that the output voltage step sizes can range from 1/2LSB to 3/2LSB when the input changes from one adjacent input state to the next. Monotonicity over a 0C to +70C range is guaranteed in the DAC80 to insure that the analog output will increase or remain the same for increasing input digital codes. DRIFT Gain Drift is a measure of the change in the full scale range output over temperature expressed in parts per million per C (ppm/C). Gain drift is established by: 1) testing the end point differences for each DAC80 model at 0C, +25C, and +70C; 2) calculating the gain error with respect to the 25C value, and; 3) dividing by the temperature change. This figure is expressed in ppm/C and is given in the electrical specifications both with and without internal reference. Offset Drift is a measure of the actual change in output with all "1"s on the input over the specified temperature range. The offset is measured at 0C, +25C, and 70C. The maximum change in Offset is referenced to the Offset at 25C and is divided by the temperature range. This drift is expressed in parts per million of full scale range per C (ppm of FSR/C). 5
FIGURE 1. Full Scale Range Settling Time vs Accuracy. Voltage Output Models Three settling times are specified to 0.01% of full scale range (FSR); two for maximum full scale range changes of 20V, 10V and one for a 1LSB change. The 1LSB change is measured at the major carry (0111...11 to 1000...00), the point at which the worst case settling time occurs. Current Output Models Two settling times are specified to 0.01% of FSR. Each is given for current models connected with two different resistive loads: 10 to 100 and 1000 to 1875. Internal resistors are provided for connecting nominal load resistances of approximately 1000 to 1800 for output voltage range of 1V and 0 to -2V (see Figures 11 and 12). COMPLIANCE Compliance voltage is the maximum voltage swing allowed on the current output node in order to maintain specified accuracy. The maximum compliance voltage of all current output models is 2.5V. Maximum safe voltage range of 1V and 0 to -2V (see Figures 11 and 12). POWER SUPPLY SENSITIVITY Power supply sensitivity is a measure of the effect of a power supply change on the D/A converter output. It is defined as a percent of FSR per percent of change in either the positive or negative supplies about the nominal power supply voltages (see Figure 2). REFERENCE SUPPLY All DAC80 models are supplied with an internal 6.3V reference voltage supply. This voltage (pin 24) has a tolerance of 1% and must be connected to the Reference Input
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DAC80/80P
% of FSR Error per % of Change in VCC
0.1
OPERATING INSTRUCTIONS
-VCC
0.01
+VCC 0.001
POWER SUPPLY CONNECTIONS Connect power supply voltages as shown in Figure 3. For optimum performance and noise rejection, power supply decoupling capacitors should be added as shown. These capacitors (1F tantalum) should be located close to the DAC80.
0.0001 1 10 100 1k 10k 100k Power Supply Ripple Frequency (Hz)
FIGURE 2. Power Supply Rejection vs Power Supply Ripple. (pin 16) for specified operation. This reference may be used externally also, but external current drain is limited to 2.5mA. If a varying load is to be driven, an external buffer amplifier is recommended to drive the load in order to isolate bipolar offset from load variations. Gain and bipolar offset adjustments should be made under constant load conditions. LOGIC INPUT COMPATIBILITY DAC80 digital inputs are TTL, LSTTL and 4000B, 54/74HC CMOS compatible. The input switching threshold remains at the TTL threshold over the entire supply range. Logic "0" input current over temperature is low enough to permit driving DAC80 directly from outputs of 4000B and 54/74C CMOS devices.
12V OPERATION All DAC80 models can operate over the entire power supply range of 11.4V to 16.5V. Even with supply levels dropping to 11.4V, the DAC80 can swing a full 10V range, provided the load current is limited to 2.5mA. With power supplies greater than 12V, the DAC80 output can be loaded up to 5mA. For output swing of 5V or less, the output current is 5mA, minimum, over the entire VCC range.
No bleed resistor is needed from +VCC to pin 24, as was needed with prior hybrid Z versions of DAC80. Existing 12V applications that are being converted to the monolithic DAC80 must omit the resistor to pin 24 to insure proper operation. EXTERNAL OFFSET AND GAIN ADJUSTMENT Offset and gain may be trimmed by installing external Offset and Gain potentiometers. Connect these potentiometers as shown in Figure 3 and adjust as described below. TCR of the potentiometers should be 100ppm/C or less. The 3.9M and 10M resistors (20% carbon or better) should be located close to the DAC80 to prevent noise pickup. If it is not convenient to use these high value resistors, an equivalent "T" network, as shown in Figure 4, may be substituted.
Voltage Output Models +VCC 1 2 3 4 5 6 7 8 9 10 11 12 12-Bit Resistor Ladder Network and Current Switches 5k 5k 6.3k 18 17 16 15 -VCC 14 13 1F 11 12 1F +VCC Reference Control Circuit 24 23 22 21 20 19 0.01F 3.9M 1 10M 10k to 100k -VCC 10k to 100k 2 3 4 5 6 7 8 9 10
Current Output Models +VCC 24 Reference Control Circuit 10M 23 22 21 12-Bit Resistor Ladder Network and Current Switches 20 2k 3k 5k 17 6.3k 16 15 -VCC 14 13 1F 3.9M 19 18 1F +VCC 0.01F 10k to 100k -VCC 10k to 100k
FIGURE 3. Power Supply and External Adjustment Connection Diagrams.
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10M
270k
270k 7.8k to 10k
Offset Adjustment For unipolar (CSB) configurations, apply the digital input code that should produce zero potential output and adjust the Offset potentiometer for zero output. For bipolar (COB, CTC) configurations, apply the digital input code that should produce the maximum negative output. Example: If the Full Scale Range is connected for 20V, the maximum negative output voltage is -10V. See Table II for corresponding codes. Gain Adjustment For either unipolar or bipolar configurations, apply the digital input that should give the maximum positive output. Adjust the Gain potentiometer for this positive full scale output. See Table II for positive full scale voltages and currents.
ANALOG OUTPUT DIGITAL INPUT MSB LSB 000000000000 011111111111 100000000000 111111111111 One LSB VOLTAGE(1) 0 to +10V +9.9976V +5.0000V +4.9976V 0.0000V 2.44mV 10V +9.9951V 0.0000V -0.0049V -10.0000V 4.88mV CURRENT 0 to -2mA -1.9995mA -1.0000mA -0.9995mA 0.0000mA 0.488A 1mA -0.9995mA 0.0000mA +0.0005mA +1.000mA 0.488A
3.9M
180k
180k 10k
FIGURE 4. Equivalent Resistances. Existing applications that are converting to the monolithic DAC80 must change the gain trim resistor on pin 23 from 33M to 10M to insure sufficient adjustment range. Pin 23 is a high impedance point and a 0.0011F to 0.01F ceramic capacitor should be connected from this pin to Common (pin 21) to prevent noise pickup. Refer to Figure 5 for relationship of Offset and Gain adjustments to unipolar and bipolar D/A operation. Unipolar
+ Full Scale 1LSB Range of Gain Adjust
Full Scale Range
Analog Output
NOTE: (1) To obtain values for other binary ranges: 0 to +5V range divide 0 to +10V range values by 2. 5V range: divide 10V range values by 2. 2.5V range: divide 10V range values by 4.
Gain Adjust Rotates the Line
TABLE II. Digital Input/Analog Output. VOLTAGE OUTPUT MODELS Output Range Connections Internal scaling resistors provided in the DAC80 may be connected to produce bipolar output voltage ranges of 10V, 5V, or 2.5V; or unipolar output voltage ranges of 0 to +5V or 0 to +10V. See Figure 6.
To Reference Control Circuit Reference Input 16 6.3k(1) 17 Summing Junction From Weighted Resistor Network 20 5k(1) 18 5k(1) 19 Bipolar Offset
Range of Offset Adjust
All Bits Logic 1 All Bits Logic 0
Digital Input Offset Adjust Translates the Line
Bipolar
+ Full Scale Range of Gain Adjust 1LSB
21 Common
Analog Output
All Bits Logic 1
Full Scale Range
Gain Adjust Rotates the Line
15 Output
All Bits Logic 0
Range of Offset Adjust
Bipolar Offset
MSB On, All Others Off -Full Scale
NOTE: (1) Resistor Tolerances: 2% max.
FIGURE 6. Output Amplifier Voltage Range Scaling Circuit. Gain and offset drift are minimized because of the thermal tracking of the scaling resistors with other internal device components. Connections for various output voltage ranges are shown in Table III. Settling time for a full-scale range change is specified as 4s for the 20V range and 3s for the 10V range.
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Digital Input Offset Adjust Translates the Line
FIGURE 5. Relationship of Offset and Gain Adjustments for a Unipolar and Bipolar D/A Converter. 7
DAC80/80P
Output Range 10 5 2.5V 0 to +10V 0 to +5V
Digital Input Codes COB or CTC COB or CTC COB or CTC CSB CSB
Connect Connect Connect Pin 15 to Pin 17 to Pin 19 to 19 18 18 18 18 20 20 20 21 21 15 NC 20 NC 20
Connect Pin 16 to 24 24 24 24 24
5k
19 18
20V Range 10V Range
5k 15 IOUT 0 to 2mA
OPA604(1)
A
TABLE III. Output Voltage Range Connections for Voltage Models. CURRENT OUTPUT MODELS The resistive scaling network and equivalent output circuit of the current model differ from the voltage model and are shown in Figures 7 and 8.
To Reference Control Circuit Reference Input 16 6.3k(1) 17 3k(1) 18 5k(1) 15 20 NOTE: (1) Resistor Tolerances: 2% max. 2k(1) 19
6.6k
VOUT
21 NOTE: (1) For fast settling.
FIGURE 9. External Op-Amp--Using Internal Feedback Resistors. the current output model DAC80 provides output voltage ranges the same as the voltage model DAC80. To obtain the desired output voltage range when connecting an external op amp, refer to Table IV.
Output Range 10V 5V 2.5V 0 to +10V 0 to +5V Digital Input Codes COB or CTC COB or CTC COB or CTC CSB CSB Connect Connect Connect A to Pin 17 to Pin 19 to 19 18 18 18 18 15 15 15 21 21 A NC 15 NC 15 Connect Pin 16 to 24 24 24 24 24
FIGURE 7. Internal Scaling Resistors.
TABLE IV. Voltage Range of Current Output. Output Larger Than 20V Range For output voltage ranges larger than 10V, a high voltage op amp may be employed with an external feedback resistor. Use IOUT value of 1mA for bipolar voltage ranges and -2mA for unipolar voltage ranges. See Figure 10. Use protection diodes when a high voltage op amp is used. The feedback resistor, RF, should have a temperature coefficient as low as possible. Using an external feedback resistor, overall drift of the circuit increases due to the lack of temperature tracking between RF and the internal scaling resistor network. This will typically add 50ppm/C plus RF drift to total drift.
24 Reference Out To Reference Control Circuit 6.3V - 0 to 2mA I RO 6.6k 21 Common 17 Bipolar Offset 6.3k 16 Reference Input 15 IOUT
+
FIGURE 8. Current Output Model Equivalent Output Circuit. Internal scaling resistors (Figure 7) are provided to scale an external op amp or to configure load resistors for a voltage output. These connections are described in the following sections. If the internal resistors are not used for voltage scaling, external RL (or RF ) resistors should have a TCR of 25ppm/C or less to minimize drift. This will typically add 50ppm/C plus the TCR of RL (or RF) to the total drift. Driving An External Op Amp The current output model DAC80 will drive the summing junction of an op amp used as a current-to-voltage converter to produce an output voltage. See Figure 9. VOUT = IOUT x RF where IOUT is the DAC80 output current and RF is the feedback resistor. Using the internal feedback resistors of
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24 + 6.3k - 6.3k 16 15 I 0 to 2mA 6.6k VOUT 21 NOTE: (1) For output voltage swings up to 290V p-p.
BB3582J(1)
17
RF
FIGURE 10. External Op-Amp--Using External Feedback Resistors.
DAC80/80P
8
Driving a Resistive Load Unipolar A load resistance, RL = RLI + RLS, connected as shown in Figure 11 will generate a voltage range, VOUT, determined by: VOUT = -2mA [(RL x RO) / (RL + RO)]
Driving a Resistive Load Bipolar The equivalent output circuit for a bipolar output voltage range is shown in Figure 12, RL = RLI + RLS. VOUT is determined by: VOUT = 1mA [(RO x RL) / (RO + RL)] By connecting pin 17 to 15, the output current becomes bipolar (1mA) and the output impedance RO becomes 3.2k (6.6k in parallel with 6.3k). RLI is 1200 (derived by connecting pin 15 to 18 and pin 18 to 19). By choosing RLS = 225, RL = 1455. RL in parallel with RO yields 1k total load. This gives an output range of 1V. As indicated above, trimming may be necessary.
Current Controlled by Digital Input RLI 0 to -2mA RO
15 18
+ VOUT RLS -
21
Common
FIGURE 11. Current Output Model Equivalent Circuit Connected for Unipolar Voltage Output with Resistive Load. The unipolar output impedance RO equals 6.6k (typ) and RLI is the internal load resistance of 968 (derived by connecting pin 15 to 20 and pin 18 to 19). By choosing RLS = 210, RL = 1178. RL in parallel with RO yields 1k total load. This gives an output range of 0 to -2V. Since RO is not exact, initial trimming per Figure 3 may be necessary; also RLS may be trimmed.
Current Controlled by Digital Input RLI +1mA RO
15 20
+ VOUT RLS -
21
Common
FIGURE 12. Current Output Model Connected for Bipolar Output Voltage with Resistive Load.
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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DAC80/80P

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