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SEMICONDUCTOR
HC5520
CO/PABX Polarity Reversal Subscriber Line Interface Circuit
Description
The HC5520 is a Monolithic Subscriber Line Interface Circuit (SLIC) for Analog Subscriber Line cards in Central Office and PABX switches. The HC5520 provides a comprehensive set of features for these applications including loop reversal, zero crossing ringing relay operation, long loop drive and a mutually independent setting of the receive and transmit gains, and the two wire impedance synthesis. Advanced power management features combined with a small 44 lead MQFP package allow significant board space to be freed up for additional line circuits. The HC5520 is fabricated in a Harris state-of-the-art Bonded Wafer High Voltage process, providing freedom from traditional JI latch-up phenomena without the use of additional power supply filtering components or substrate tie connections. The very low parasitics and leakages associated with this process provide an exceptionally flat performance over frequency and temperature.
April 1997
Features
* Normal and Reversed DC Feed * Current Limited Loop Feed * Ringing, Test-In, and Test-Out Relay Drivers * Thermal Shutdown Protection with Alert Signal * On-Hook Transmission * Selectable Transmit and Receive Gain Setting * Selectable 2-Wire Impedance Matching * Zero Crossing Ring Trip Detection and Ring Relay Release * Parallel Digital Control and Status Monitoring * Protection Resistors Inside Feedback Loop Allows the Use of PTC Devices Without Impact on Longitudinal Balance * Thermal Management Features
Ordering Information
TEMP. PART NUMBER RANGE (oC) HC5520CQ HC5520CM 0 to 70 0 to 70 PACKAGE 44 Ld MQFP 44 Ld PLCC PKG. NO. Q44.10x10 N44.65
Applications
* CO/PABX Line Circuits
Block Diagram
RX TA TB TSDO SHDO PRI PDI RCI TBI TAI RING CONTROL RD RBH RBL CRTD BIAS BATTERY REFERENCE RPSB POWER MANAGEMENT RPSR RPST RPSG CP RDC CDC LOGIC HC5520 2-WIRE INTERFACE TIP TIPSEN RINGSEN RING TEST CONTROL 4-WIRE INTERFACE / Z0 TX TX4W RN KZO
AGND BGND RGND VBAT VCC VEE
CAUTION: These devices are sensitive to electrostatic discharge. Users should follow proper IC Handling Procedures. Copyright
(c) Harris Corporation 1997
File Number
4148.2
1
HC5520
Absolute Maximum Ratings (Note 1)
VCC to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -7V VBAT to BGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80V AGND to BGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3V Digital Pins to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V ESD Withstand (Human Body Model) . . . . . . . . . . . . . . . . . . . 500V
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) MQFP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66 PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 Maximum Power Dissipation MQFP package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.21W PLCC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.74W Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150o Maximum Storage Temperature Range . . . . . . . . . .-65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC (Lead tips only)
Operating Conditions
Temperature Range HC5520CQ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC HC5520CM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Recommended Operating Conditions
For maximum integrity, nominal operating conditions should be selected so that operation is always within the following ranges: PARAMETER Battery Supply Positive Supply Negative Supply Ringing Supply Loop Resistance Ambient Temperature Die Temperature SYMBOL VBAT VCC VEE VRINGING RL TA TD CONDITIONS MIN -42 4.75 -4.75 60 200 0 TYP -48 5 -5 75 25 MAX -58 5.25 -5.25 90 1800 70 150 UNITS VDC VDC VDC VRMS
oC oC
Electrical Specifications Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600 2-Wire Terminating Impedance with 0dB transmit and receive gain.
CONDITIONS PARAMETER MODE LOAD VBAT OTHER CONDITIONS FREQ/ LEVEL MIN TYP MAX UNITS
POWER SUPPLY CURRENTS (Figure 4) ICC normal reverse p'down normal reverse p'down normal reverse p'down Open -48V VCC = 5V 5.0 6.0 2.0 -6.0 -7.0 -3.0 -7.0 -7.0 -1.0 8.0 8.9 3.7 -3.6 -4.9 -1.7 -4.2 -4.0 -0.4 11.0 12.0 5.5 -2.0 -3.0 -0.7 -2.0 -2.0 0.0 mA mA mA mA mA mA mA mA mA
IEE
Open
-48V
VEE = -5V
IBB
Open
-48V
VCC = 5V, VEE = -5V
THERMAL SHUTDOWN Thermal Shutdown Temperature, Die Temperature normal reverse -48V 150 oC
BATTERY FEED CHARACTERISTICS - 2W VOLTAGES (Figure 4) VTIP normal reverse Open -48V -5.50 -46.00 -4.16 -43.60 -2.46 -42.00 V V
2
HC5520
Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
Electrical Specifications
CONDITIONS PARAMETER VRING VTIP VRING MODE normal reverse normal reverse normal reverse LOAD Open Open Open VBAT -48V -42V -42V OTHER CONDITIONS FREQ/ LEVEL MIN -45.54 -6.00 -5.00 -40.00 -39.54 -5.00 TYP -43.80 -4.26 -3.68 -38.12 -38.34 -3.78 MAX -42.50 -2.00 -2.46 -37.00 -37.00 -2.00 UNITS V V V V V V
BATTERY FEED CHARACTERISTICS - LOOP CURRENT (Figure 5) Normal Loop Current Normal Loop Current Short Circuit Loop Current Limit normal reverse normal reverse normal reverse 1800 1800 100 -42V -48V -48V 14.5 14.5 18.0 18.0 22.0 22.0 16.5 16.3 18.8 18.6 26.4 27.0 19.0 19.0 22.0 22.0 42.0 42.0 mA mA mA mA mA mA
LOOP SUPERVISION - SWITCH HOOK DETECTION (Figure 6) Off-Hook Detection normal reverse -48V 2.4K 4.6K 9K
LOOP SUPERVISION - DIAL PULSE DISTORTION (Figure 7) Dial Pulse Distortion Dial Pulse Distortion normal normal 100 1800 -58V -42V 25oC 25oC 0.1 0.1 3 3 % %
LOOP SUPERVISION - RING TRIP DETECTION (Figure 8) Ring Trip Detect Ring Trip Non-Detect Ringing Ringing 1800 +1REN 3REN// 20K -42V 60VRMS -58V 90VRMS 20K 150 ms
LOOP SUPERVISION - POLARITY REVERSAL TIME (Figure 9) Polarity Reversal Time normal to reverse reverse to normal 1800 -42V 0.04 10 ms
Polarity Reversal Time
1800
-42V
-
0.04
10
ms
LOOP SUPERVISION - DIGITAL INTERFACE Input Low Voltage, VIL Input High Voltage, VIH Input Low Current, IIL Input High Current, IIH Output Low Voltage, VOL Output High Voltage, VOH Relay Driver Output Low Voltage, VOL Relay Driver Output High Current, IOH All Digital Inputs All Digital Inputs AGND < VIN < VIL VIH < VIN < VCC 1 LSTTL Load 1 LSTTL Load VCC = 4.75V, Load = 35mA VCC = 5.25V 2.0 -20 2.4 0 0.4 0.8 +10 0.4 0.8 10 V V A A V V V A
3
HC5520
Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
Electrical Specifications
CONDITIONS PARAMETER MODE LOAD VBAT OTHER CONDITIONS FREQ/ LEVEL MIN TYP MAX UNITS
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE RECEIVE GAIN (Figure 10) Absolute Receive Gain, ARG normal reverse 600 -48V 1020Hz 0dBm -0.2 0 +0.2 dB
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE FREQUENCY RESPONSE (Figure 10) Receive Frequency Response Relative to ARG normal reverse 600 -48V 300 to 3.4kHz 0dBm -0.15 0 +0.15 dB
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE GAIN TRACKING (Figure 10) Receive Gain Tracking Relative to ARG normal reverse 600 -48V +3 to -40dBm0 -40 to -50dBm0 1020Hz -0.12 0 0 +0.12 dB dB
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE SIGNAL TO DISTORTION (Figure 10) Receive Signal to Distortion and Noise normal reverse 600 -48V +3 to -40dBm0 -40 to -50dBm0 1020Hz 33 38 33 dB dB
TRANSMISSION PARAMETERS - 4-WIRE TO 2-WIRE IDLE CHANNEL NOISE (Figure 10) Idle Channel Noise normal reverse 600 -48V P-Message 73 78 dBm0P
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE TRANSMIT GAIN (Figure 11) Absolute Transmit Gain, ATG normal reverse 600 -48V 1020Hz 0dBm -0.2 -0.07 +0.2 dB
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE FREQUENCY RESPONSE (Figure 11) Transmit Frequency Response Relative to ATG normal reverse 600 -48V 300 to 3.4kHz 0dBm -0.2 -0.04 +0.2 dB
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE GAIN TRACKING (Figure 11) Transmit Gain Tracking Relative to ATG normal reverse 600 -48V +3 to -40dBm0 -40 to -50dBm0 1020Hz -0.12 0 0.02 +0.12 dB dB
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE SIGNAL TO DISTORTION (Figure 11) Transmit Signal to Distortion and Noise normal reverse 600 -48V +3 to -40dBm0 -40 to -50dBm0 1020Hz 33 38 33 dB dB
TRANSMISSION PARAMETERS - 2-WIRE TO 4-WIRE IDLE CHANNEL NOISE (Figure 11) Idle Channel Noise normal reverse 600 -48V P Message 73 78 dB
TRANSMISSION PARAMETERS - 2-WIRE RETURN LOSS (Figure 12) 2-Wire Return Loss normal reverse 600 -48V RN = 6490 KZO = 15400 1020Hz 0dBm 30 45 dB
TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE INSERTION LOSS (Figure 13) 4-Wire to 4-Wire Insertion Loss normal reverse 600 -48V 1020Hz 0dBm -0.2 -0.02 +0.2 dB
TRANSMISSION PARAMETERS - TRANSHYBRID BALANCE (Figure 13) Transhybrid Balance normal reverse 600 -48V 1020Hz 0dBm 30 38 dB
4
HC5520
Unless Otherwise Specified: Typical Parameters are at TA = 25oC, VCC = +5V, VEE = -5V, VBAT = -48V, AGND = BGND = RGND = 0V, Min-Max Parameters are Over Power Supply and Operating Temperature Range. All Transmission Parameters are Specified at 600 2-Wire Terminating Impedance with 0dB transmit and receive gain. (Continued)
Electrical Specifications
CONDITIONS PARAMETER MODE LOAD VBAT OTHER CONDITIONS FREQ/ LEVEL MIN TYP MAX UNITS
TRANSMISSION PARAMETERS - 4-WIRE TO 4-WIRE ABSOLUTE DELAY Absolute Delay normal reverse 600 -48V 1020Hz 0dBm 1.5 s
TRANSMISSION PARAMETERS - OVER LOAD LEVEL (Figures 14, 15) Receive Over Load Level at 4W and 2W Transmit Over Load Level at 2W and 4W normal reverse normal reverse 600 600 -42V -42V 1% THD 1% THD 1020Hz 1020Hz 2.5 2.15 VPEAK VPEAK
TRANSMISSION PARAMETERS - LONGITUDINAL IMPEDANCE (Figure 16) Longitudinal Impedance per Wire normal reverse -48V 40Hz to 100Hz 50
TRANSMISSION PARAMETERS - LONGITUDINAL CURRENT CAPABILITY (Figure 17) Longitudinal Current Limit per Wire normal reverse -42V Triangle Waveform 40Hz to 100Hz 15 mAPEAK
TRANSMISSION PARAMETERS - LONGITUDINAL BALANCE (Figure 18) 2-Wire Longitudinal Balance normal reverse normal reverse 368 + 368 368 + 368 -48V 300Hz 1020Hz 3400Hz 300Hz 1020Hz 3400Hz 42 48 48 42 48 48 62.2 58.7 69.5 66.0 67.2 77.0 dB dB dB dB dB dB
4-Wire Longitudinal Balance
-48V
-
POWER SUPPLY REJECTION RATIO (Figure 19) PSRR VBAT To 4-Wire PSRR VBAT To 2-Wire PSRR VCC To 4-Wire PSRR VCC To 2-Wire PSRR VEE To 4-Wire PSRR VEE To 2-Wire normal reverse normal reverse normal reverse normal reverse normal reverse normal reverse 600 600 600 600 600 600 -48V -48V -48V -48V -48V -48V VBAT = -48V + 100mVRMS VBAT = -48V + 100mVRMS VCC = 4.75V + 100mVRMS VCC = 4.75V + 100mVRMS VEE = -4.75V + 100mVRMS VEE = -4.75V + 100mVRMS 300Hz 300Hz 300Hz 3420Hz 2500Hz 2500Hz 30 30 20 20 20 20 42 42 33 24 30 32 dBC dBC dBC dBC dBC dBC
5
HC5520
Circuit Operation and Design Information
The HC5520 is a current feed voltage sense Subscriber Line Interface Circuit (SLIC). It provides extensive digitally controlled supervisory functions, DC loop feed functions, and user selectable 2 wire impedance matching functions. the specifications applicable to this mode of operation are provided in the electrical specifications portion of the HC5520 data sheet. Battery Feed
Modes of Operation
The HC5520 has seven possible modes of operation. These modes of operation are either controlled by the digital control inputs to the SLIC or controlled by the loop status output of the SLIC. The modes of operation and the function of the digital control inputs are given in Table 1.
TABLE 1. SLIC FUNCTION Normal Normal Loop power down Ring trip detection only Normal Normal Loop Powerdown CONTROL INPUTS PRI = High PRI = Low PDI = Low RCI = Low TAI = Low TBI = Low
OPERATION Normal Loop Feed Reverse Loop Feed Loop Powerdown Ringing Test out Test in Thermal Shut Down
MODE Normal Reverse P'down Ringing Test-out Test-in TSD
The HC5520 is designed to provide a 300 resistive feed (150 per wire) for long loop applications. It will supply a DC loop feed current of 18mA into an 1800 loop at the nominal battery supply of -48V. At shorter loop lengths or higher battery supply voltages, the DC feed is current-limited to nominally 26mA in order to conserve power. For internal chip power management purposes, external power sharing resistors are used to provide some of the DC loop current. This allows a substantial amount of the power to be dissipated off the chip, particularly in short loop applications. A typical loop feeding characteristic for Normal and Reverse Loop Feed Modes of operation is shown in Figure 1.
ILOOP
30
mA 20 10 600 800 1.0K 1.2K 1.4K 1.6K 1.8K 2.0K 2.2K 2.4K
RLOOP
Normal Loop Feed Mode When PDI = 1, setting the PRI to a logic "1" places the SLIC in the Normal Loop Feed mode. This is the normal operational mode of the SLIC. With a nominal battery supply of 48V and an on-hook condition, the voltage at the Tip terminal will be approximately 8% of the battery supply voltage. In this case the Tip voltage is about -3.8V. Similarly, the voltage at the Ring terminal will be approximately 92% of the battery supply voltage or about -44.2V. In the Normal mode the Tip voltage is more positive than the Ring voltage; therefore, in an off-hook condition, the DC loop current flows from Tip to Ring. The loop feeding characteristics will be given in the battery feed section. All of the specifications applicable to this mode of operation are provided in the electrical specifications portion of the HC5520 data sheet. Reverse Loop Feed Mode When PDI = 1, setting the PRI to a logic "0" places the SLIC in the Reverse Loop Feed mode. In this mode, the Ring terminal voltage is more positive than the Tip terminal voltage. Thus, in an off-hook condition, the DC loop current flows from Ring to Tip. The loop feeding characteristics in the Reverse mode are the same as in the Normal mode. All of
FIGURE 1. BATTERY FEED CHARACTERISTICS
Loop Supervision - Switch Hook Detection The Loop Supervision circuit operates in the Normal and Reverse Loop Feed modes. The DC loop current is monitored and the off-hook condition is indicated when the loop resistance is less than 2.4k. When this occurs, the SHDO output will be set to a logic low in order to signal the system that an off-hook condition exists. If the subscriber is using a rotary dial telephone, the system can monitor the dial pulses through the SHDO output. Ringing - Ring Trip Detection Mode The ringing voltage is cadenced to a subscriber loop by applying a logic signal to the Rci input. When a logic "0" is received at the RCI input, the HC5520 will set the RD output to low and thus pull current through the ring relay coil and energize the ring relay. This causes the subscriber's telephone to begin ringing. At this time the ringing current through the ring ballast resistor is monitored to determine whether an off-hook condition is present. Once the subscriber goes off-hook, the ring trip circuit will turn off the ring relay after the next occurrence of a zero net current flow through the ring ballast resistor. At the same time, the SHDO output will be set to a logic low to indicate the ring trip detec-
6
HC5520
tion. The ring relay can not be reenergized until the system acknowledges that a ring trip has occurred. Acknowledgment is achieved by setting the RCI to a logic high. If the subscriber goes off-hook during the silent portion of the ringing cadence, the off-hook condition is detected in the same manner as a switch hook detection. The SHDO output will be set to a logic low in order to indicate that the subscriber has answered the call and that ringing of the line should cease. Loop Power Down Mode Under any condition when PDI is set to a logic "0", the SLIC will power down the two wire loop. During loop power down, the voltages at Tip and Ring are both collapsed to one-half of the battery voltage and the outputs of the Tip and Ring feed amplifiers are in a high impedance state. Therefore all of the supervisory functions and transmission functions are disabled. The HC5520 will resume normal operation once the loop power down command is removed. Thermal Shutdown Mode The SLIC will power down the loop by itself once the temperature of the SLIC die reaches 150oC. During this thermal shutdown condition, both TSDO and SHDO outputs will be set to a default logic low to indicate the condition. The supervisory functions and transmission functions are disabled. Once the SLIC die temperature drops 10oC lower than the thermal shutdown temperature, the SLIC will resume operation. Test-Out and Test-In Modes Two additional relay drivers are provided for test-out and test-in functions. Unlike the ring relay driver circuit, these relay drivers are operated independently of the rest of the HC5520 circuitry. The designation of test-out and test-in is purely arbitrary. When desired, the subscriber's loop condition can be interrogated through the test-out relay. Likewise, through the test-in relay, the various SLIC functions and signal integrity can be examined. Hybrid Transmission Model Figure 2 shows a simplified model for bidirectional signal transmission and 2-wire impedance synthesis. The term RSENSE used in the equations below refers to the pair of external 100k sense resistors RTPS and RRGS. The HC5520 architecture gives the user the flexibility to set the gains and 2-wire impedance with external resistors and resistor ratios. However, to prevent adversely affecting other SLIC control functions, the value of RSENSE should always be selected to be 100k. 2W Impedance The 2W impedance is the AC input impedance synthesized by the SLIC between the Tip and Ring terminals and will be referred to as ZO. The value of ZO is user programmable by varying the value RN and ZKZO. RN is recommended to be less than 7k. ZKZO can be either a real resistance or a complex impedance network. ZO is determined by the following equation: The signal level voltage gain from the Tip and Ring terminals (VTR) to the output of the 4-wire signal amplifier (R4W) is user programmable using the following equation: R 4W A 2 - 4 = ------------------------R SENSE Transhybrid Balance Functionally, when a voice signal is received at VRX a current which is proportional to the voice signal will pass through the SLIC 4 wire input RX pin. This voice input current will be amplified and inverted to drive the load across the Tip and Ring. The AC voltages at Tip and Ring are fed back to the SLIC and reproduced as the transmit signal at the TX pin. This received voice signal returned from 2 wire side of the SLIC will have the same amplitude as the received AC signal but will be 180 degrees out of phase. This signal needs to be eliminated from transmission to prevent far end echo. The most common way of implementing the transhybrid balance function is to use the analog voice input amplifier in the Combo as a summing amplifier. The circuit connections are as shown in Figure 3. Notice that the input impedance networks for both received signal and returned signal are bascally the same, if the 62pF capacitor were not added. The addition of the 62pF capacitor to ground is to compensate for the phase shift of the returned signal to achieve 15dB or more improvement in the 2k to 4kHz frequency band as compared to the data collected from the test circuit. Sensitive Pins Tipsen, Ringsen Pins - These pins are very low impedance virtual grounds used for providing feedback current to the HC5520 DC, AC, and Longitudinal control loops. Parasitic capacitance on these pins from the PC board layout and external components should be minimized to prevent oscillation.
-R SENSE A 4 - 2 = ---------------------------RX
R SENSE * Z KZO ZO = -----------------------------------------------400 * R N where RSENSE is constrained to be 100k. 4W to 2W Gain The signal level voltage gain from the 4-wire analog input (RX) to the 2-wire VTR voltage is user programmable using the following equation:
where RSENSE is constrained to be 100k. The SLIC has a built-in +6.02dB gain to compensate for the divider effect of matching the load impedance, making it transparent to the user. 2W to 4W Gain
7
HC5520
A = 400 TIP ITS RTPS VTR ZL IL
HC5520 R4W
A2 +
VTX
IKZO IRS ITS
+
-
IRX RX
+
+ EG RRGS
IRS RN A = 400 2xIRX RING IKZO IRS ITS
A1 +
VRX
-
IKZO
-
ZKZO
FIGURE 2. SIMPLIFIED AC TRANSMISSION CIRCUIT
RTPS 100k TIP
CVRX 0.47F TIPSEN TIP RX RX 100k 0.47F HC5520 R4W 100k RING TX4W TX CVTX 0.47F RINGSEN
VRX 50k 62pF + 100k VOICE INPUT AMPLIFIER 50k 100k
RPT 50 600 RPR 50 RING RRGS 100k
VTX
FIGURE 3. TRANSHYBRID BALANCE CIRCUIT WITH HIGH AND LOW FREQUENCY COMPENSATION
KZO Pin - The 2-wire impedance that is synthesized by the HC5520 is a direct function of the network connected to this pin (see equations). Parasitic capacitance and inductance from the PC board layout and the external components is magnified by the same K factor that is utilized to synthesize the 2-wire impedance. Excessive parasitics can cause insertion loss and return loss degradation, especially at higher voice band frequencies. Good PC board layout techniques and proper component selection can minimize these effects to a negligible level. RN Pin - This pin connects an external resistor to the input of an internal buffer. The value of this resistor is user specified based upon the impedance desired at the 2-wire interface (see equations). The value chosen must not have a value greater than 7k or the input voltage range of the buffer may be exceeded during transients. RDC Pin - An external resistor connected to VCC is required at this pin to provide an accurate reference for the DC currents which feed the subscriber loop. PC board traces should be made to have low resistance and should connect directly to VCC.
CDC Pin - This pin provides a connection to the DC reference nodes that control the DC loop feed current. These internal blocks are referenced to VEE and it is important that the capacitor be referenced to VEE or else the PSRR performance will be degraded. CP Pin - Capacitor CP connects to this pin to create a lowpass filter for the half-battery internal reference point. It is important that this capacitor be referenced to BGND/AGND to minimize the effect of noise injected into the subscriber loop from the battery supply. RPSG, RPST, RPSR, RPSB Pins - These pins are connected to critical nodes inside the HC5519R3931 feedback control loops. Parasitic capacitance should be minimized in order to prevent oscillations. RD, TB, TA Pins - The pins connect to the driver coils of the Ring and Test relays and activate the relays by pulling down the coil voltage to ground. The driver outputs are internally clamped to VCC by diodes to prevent the inductive voltage transient during relay turn-off from damaging the driver. Relays attached to any voltage other than VCC will not function properly.
8
HC5520 Test Information
RTPS 100k TIP VTIP 50 RPT HC5520 RPR VRING 50 RING 100k RRGS RINGSEN RING TX TX4W 100k R4W TIP TIPSEN RX RX 100k ICC IEE IBB CVTX 0.47F CVRX 0.47F VRX VCC VEE VBAT VTX
FIGURE 4. POWER SUPPLY CURRENT AND TIP AND RING VOLTAGE TEST CIRCUIT
PARAMETER Power Supply Current, ICC Power Supply Current, IEE Power Supply Current, IBB VTIP VRING
INPUT VCC = +4.75 ~ +5.25V VEE = -4.75 ~ -5.25V VBAT = -42 ~ -58V VBAT VBAT
MEASUREMENT ICC Direct Measurement IEE Direct Measurement IBB Direct Measurement VTIP Direct Measurement VRING Direct Measurement
SPECIFICATIONS ICC IEE IBB VTIP VRING
RTPS IL 100k TIP 50 RPT RL VTR RPR 50 RING 100k RRGS RINGSEN RING TX TX4W 100k R4W HC5520 TIPSEN TIP RX RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
FIGURE 5. LOOP CURRENT TEST CIRCUIT
PARAMETER Loop Current, IL Short Circuit Loop Current
INPUT VBAT and RL VBAT = -48V and RL = 100
MEASUREMENT VTR VTR
SPECIFICATIONS IL = VTR /RL IL = VTR /RL
9
HC5520
RTPS 100k TIP 50 >9k 2.4k RPT TIPSEN TIP RX SHDO HC5520 SW RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W CVTX 0.47F VTX RX 100k CVRX 0.472F VRX
FIGURE 6. SWITCH HOOK DETECTION TEST CIRCUIT
PARAMETER On Hook Condition Off Hook Detection
INPUT SW = Left SW = Right
MEASUREMENT SHDO SHDO
SPECIFICATIONS SHDO = Hi SHDO = Lo
RTPS 100k TIP 50 RL RPT TIPSEN TIP RX SHDO HC5520 SW RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
tPERIOD ON SW OFF tMEAS SHDO OFF-HOOK ON-HOOK OFF-HOOK OFF-HOOK tBREAK ON-HOOK tMAKE OFF-HOOK
FIGURE 7. DIAL PULSE DISTORTION TEST CIRCUIT AND WAVEFORMS
PARAMETER Percent Break Dial Pulse Distortion
INPUT SW = On, Off, . . . SW = On, Off, . . .
MEASUREMENT tBREAK and tPERIOD tBREAK and tPERIOD and tMEAS
SPECIFICATIONS (tBREAK /tPERIOD) x 100% Abs[(tBREAK - tMEAS)/tPERIOD] x 100%
10
HC5520
1k 237k 237k RBH RX RX 100k RBAL
RBL RTPS 100k TIP 50 1600 3 REN 1 REN 20k RPR 50 SW RING 100k RRGS RPT
RBH
RBL TIPSEN TIP
CVRX 0.47F VRX
SHDO HC5520 CRTD RING RINGSEN RD TX TX4W 100k R4W CRTD 1F -5V CVTX 0.47F VTX
200
VBAT VRINGING
FIGURE 8. RING TRIP DETECTION TEST CIRCUIT PARAMETER No Ring Trip Detection Ring Trip Detection INPUT SW = Up SW = Down MEASUREMENT SHDO SHDO SPECIFICATIONS SHDO = Hi SHDO = Lo
RTPS 100k TIP 50 VT 1800 VR RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W POLARITY REVERSAL COMMAND RPT HC5520 TIPSEN TIP RX PRI RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
tREV VT 90%
90% VR
FIGURE 9. POLARITY REVERSAL TIME TEST CIRCUIT AND WAVEFORMS
PARAMETER Polarity Reversal Time
INPUT Reversal Command
MEASUREMENT tREV
SPECIFICATIONS tREV
11
HC5520
RTPS 100k TIP 50 RPT 600 VTR RPR 50 RING 100k RRGS RINGSEN RING TX TX4W 100k R4W HC5520 CVTX 0.47F VTX TIPSEN TIP RX RX 100k CVRX 0.47F VRX
FIGURE 10. 4W TO 2W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER Absolute Receive Gain, AGR Receive Frequency Response Receive Gain Tracking Receive Signal to Distortion Receive Idle Channel Noise
INPUT AT VRX 0dBm0 at 1020Hz 0dBm0 at Freq Level at 1020Hz Level at 1020Hz 0VRMS
MEASUREMENT VTR at 1020Hz VTR at Freq VTR at 1020Hz VTR at 2nd to 5th Harmonics VTR
SPECIFICATIONS AT 600 AGR = 20log(VTR /VRX) 20log(VTR /VRX) - AGR 20log(VTR /Level) - AGR 20log(Level/VTR) 20log(VTR /0.7746VRMS)
RTPS 100k TIP 50 600 VAC RING 100k RRGS RINGSEN RPT HC5520 RPR 50 RING TX TX4W 100k R4W TIPSEN TIP RX RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
FIGURE 11. 2W TO 4W TRANSMISSION TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER Absolute Transmit Gain, AGT Transmit Frequency Response Transmit Gain Tracking Transmit Signal to Distortion Transmit Idle Channel Noise
INPUT AT VAC 2x(0dBm0) at 1020Hz 2x(0dBm0) at Freq 2x(Level) at 1020Hz 2x(Level) at 1020Hz 0VRMS
MEASUREMENT VTX at 1020Hz VTX at Freq VTX at 1020Hz VTX at 2nd to 5th Harmonics VTX
SPECIFICATIONS AT 600 AGT = 20log(VTX /0.7746VRMS) 20log(VTX /0.7746VRMS) - AGT 20log(VTX /Level) - AGT 20log(Level/VTX) 20log(VTX /0.7746VRMS)
12
HC5520
RTPS 100k TIP 50 ZL 600 VTR VAC RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W RPT ZS HC5520 CVTX 0.47F VTX TIPSEN TIP RX RX 100k CVRX 0.47F VRX
FIGURE 12. 2W RETURN LOSS TEST CIRCUIT - NORMAL AND REVERSE MODES DEFINITION : 2W Return Loss = 20 log[(ZS + ZL) / Abs(ZS - ZL)]. Where ZS is the source impedance and ZL is the load impedance. PARAMETER 2W Return Loss INPUT AT VAC 0dBm0 at Freq MEASUREMENT VTR at Freq SPECIFICATIONS FOR 600 20log[VAC /Abs(2xVTR - VAC)]
RTPS 100k TIP 50 RPT 600 RPR 50 RING 100k RRGS RINGSEN RING TX TX4W 100k R4W HC5520 TIPSEN TIP RX RX 100k
CVRX 0.47F VRX 100k 100k CVTX 0.47F VTX 1M
+ 50k
-
VTHB
FIGURE 13. 4W TO 4W INSERTION LOSS AND TRANSHYBRID BALANCE - NORMAL AND REVERSE MODES PARAMETER 4W to 4W Insertion Loss Transhybrid Balance INPUT AT VRX 0dBm0 at Freq 0dBm0 at Freq MEASUREMENT VTX at Freq VTHB at Freq SPECIFICATIONS FOR 600 20log[VRX /VTX] 20log[VRX /VTHB] + 20dB
RTPS 100k TIP 50 RPT 600 VTR RPR 50 RING 100k RRGS RINGSEN RING TX TX4W 100k R4W HC5520 TIPSEN TIP RX RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
FIGURE 14. RECEIVE OVER LOAD LEVEL AT 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES INPUT AT VRX AT 1kHz VRX = 2.50VPEAK SLIC OUTPUT IMPEDANCE 600 SLIC VOLTAGE GAIN 0dB SPECIFICATION AT 600 20log(VTR /VRX)
MEASUREMENT VTR at 2nd to 5th Harmonics
13
HC5520
RTPS IL 100k TIP 50 600 VTR VAC RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W RPT HC5520 CVTX 0.47F VTX TIPSEN TIP RX RX 100k CVRX 0.47F VRX
FIGURE 15. TRANSMIT OVER LOAD LEVEL AT 2W AND 4W TEST CIRCUIT - NORMAL AND REVERSE MODES INPUT AT VAC AT 1kHz VAC = 2x(2.15VPEAK) SLIC OUTPUT IMPEDANCE 600 SLIC TRANSMIT GAIN 0dB
MEASUREMENT VTR and VTX at 2nd to 5th Harmonics
SPECIFICATION AT 600 20log[VTR /(VAC/2)] and 20log[VTX/(VAC/2)]
RTPS ILONG 368 2.16F VAC 368 ILONG VR RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W VT 100k TIP 50 RPT HC5520 TIPSEN TIP RX RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
FIGURE 16. LONGITUDINAL IMPEDANCE TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER Longitudinal Impedance, Tip Side Longitudinal Impedance, Ring Side INPUT VAC = 0dBm0 at Freq VAC = 0dBm0 at Freq MEASUREMENT ILONG (rms) and VT (rms) ILONG (rms) and VR (rms) SPECIFICATIONS ZLONG = VT /ILONG ZLONG = VR /ILONG
RTPS ILONG 20F 100k TIP 50 TRIANGULAR WAVEFORM VAC 2.16F RPT TIPSEN TIP RX SHDO HC5520 20F ILONG RING 100k RRGS RINGSEN RPR 50 RING TX TX4W 100k R4W RX 100k
CVRX 0.47F VRX
CVTX 0.47F VTX
FIGURE 17. ON-HOOK LONGITUDINAL CURRENT LIMIT TEST CIRCUIT - NORMAL AND REVERSE MODES PARAMETER Longitudinal Current Limit INPUT VAC at Freq, ILONG = 15mAPEAK MEASUREMENT SHDO SPECIFICATIONS SHDO = Hi
14
HC5520
RTPS ILONG 368 2.16F VAC 368 ILONG RING 100k RRGS RINGSEN VR RPR 50 RING TX TX4W 100k R4W 100k TIP 50 RPT HC5520 CVTX 0.47F VTX TIPSEN TIP RX RX 100k CVRX 0.47F VRX
FIGURE 18. 2W AND 4W LONGITUDINAL BALANCE TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER 2W Longitudinal Balance 4W Longitudinal Balance
INPUT VAC = 0dBm0 at Freq VAC = 0dBm0 at Freq
MEASUREMENT VTR at Freq VTX at Freq
SPECIFICATIONS 20log(VAC /VTR) 20log(VAC /VTX)
RTPS 100k TIP 50 RPT 600 VTR RPR 50 RING 100k RRGS RINGSEN RING TX TX4W 100k R4W HC5520 TIPSEN TIP RX RX 100k
CVRX 0.47F VRX VAC VCC VEE VBB CVTX 0.47F VTX
FIGURE 19. OFF HOOK PSRR 4W AND 2W TEST CIRCUIT - NORMAL AND REVERSE MODES
PARAMETER PSRR VBAT to 4W PSRR VBAT to 2W PSRR VCC to 4W PSRR VCC to 2W PSRR VEE to 4W PSRR VEE to 2W
INPUT VBAT = -48V + VAC VBAT = -48V + VAC VCC = +5V + VAC VCC = +5V + VAC VEE = -5V + VAC VEE = -5V + VAC
MEASUREMENT VTX at Freq VTR at Freq VTX at Freq VTR at Freq VTX at Freq VTR at Freq
SPECIFICATIONS 20log(VAC /VTX) at Freq 20log(VAC /VTR) at Freq 20log(VAC /VTX) at Freq 20log(VAC /VTR) at Freq 20log(VAC /VTX) at Freq 20log(VAC /VTR) at Freq
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HC5520 Pin Descriptions
MQFP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 35 36 37 38 39 40 41 42 43 44 41 42 43 44 1 2 3 4 5 6 PLCC 7 8 9 10 11 12 13 14 15 16 17 18 19 SYMBOL RX AGND TX TX4W KZO RN RDC CDC CP VEE TIPSEN BGND RPSG NC RPST TIP NC RING RPSR NC RPSB VBAT RINGSEN RBH RBL CRTD RD TB TA RGND VCC NC NC NC NC TAI TBI RCI PRI PDI NC NC TSDO SHDO NC DESCRIPTION 4W receive input pin, a ground referenced current sense input. Analog ground pin. This pin must be tied to the BGND and RGND pins. 4W transmit output pin, a ground referenced voltage source. Transmit gain setting pin - connecting a resistor between TX4W and TX establishes the 2W to 4W gain. 2W impedance setting pin, connecting a network K(ZL) between KZO pin and AGND will program the 2W impedance to be ZL. Resistor divider pin for ZO, in conjunction with KZO it defines the 2W impedance. DC feed reference pin. DC feeding circuit low pass filter capacitor pin. Half battery voltage reference pin. Negative power supply pin, VEE = -5V at 5%. Tip sense input pin. Battery ground pin. This pin must be tied to the AGND and RGND pins. Power sharing resistor ground side connection pin. No connect. Power sharing resistor Tip side connection pin. Tip feed pin. No connect. Ring feed pin. Power sharing resistor Ring side connection pin. No connect. Power sharing resistor battery side connection pin. Battery power supply pin, VBAT = -42V to -58V. Ring sense input pin. Ring trip amplifier ground side sense input pin. Ring trip amplifier line side sense input pin. Ring trip capacitor pin. Ring relay driver pin, open collector output. Diode protected internally. Test access relay driver pin, open collector output. Diode protected internally. Test access relay driver pin, open collector output. Diode protected internally. Relay driver ground current return pin. This pin must be tied to the AGND and BGND pins. Positive power supply pin, VCC = +5V at 5%. No connect. No connect. No connect. No connect. TA Relay Driver Control Input. TB Relay Driver Control Input. RD Relay Driver Control Input. Loop Feed Polarity Control Input. Loop Feed Control Input. No connect. No connect. Thermal Shutdown Indicator Output. Off Hook Detect Indicator Output. No connect.
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HC5520 Typical Application Circuit Diagram
RBH 237K 1K RBAL RBL 237K RTPS 100K TIP 50 TEST ACCESS RELAY RPT RING RELAY SURGECTOR RPR 50 RING 100K RRGS RPST TO RING GENERATOR 910 910 RPSG RPST RPSR 910 RPSR RELAY RELAY RELAY +5V 0.1F +5V 0.1F 5V GND 0.1F -5V BATTERY GND 0.1F -48V VBAT VEE BGND RCI PDI PRI AGND TBI VCC TAI TA TB RD RGND SHDO TSDO RPSB RDC 2.15K RDC +5V HC5520 CRTD 1F RINGSEN RING CP KZO TIP RN RN 6.49K RKZO 15.4K RCP 200 1F CDC CDC 4.7F CRTD -5V CP TIPSEN RBL TX4W TX 100K R4W CVTX VTX 0.47F RBH RX RX 100K CVRX
0.47F VRX
GROUND PLANE
EARTH GROUND
NOTE: The HC5520 application circuit is configured to provide a receive gain of 0dB, a transmit gain of 0dB, and a synthesized 2W impedance of 593. Note, the value of RTPS, RRGS should always be selected to be 100k.
17
HC5520 External Component List for Application Circuit
NAME RX, R4W, RTPS, RRGS RN RDC RBH, RBL RPT, RPR RBAL RKZ0 RCP RPST, RPSR CVRX, CVTX CDC CP CRTD C DECOUPLING SURGECTOR PTC VALUE 100k 6.49k 2.15k 237k 50 1000 15.4k 200 910 0.47F 4.7F 1F 1F 0.1F TISP1072F3SL TR250-120u TOLERANCE 1% 1% 1% 1% 5% 5% 1% 5% 5% 20% 10% 10% 10% 20% RATING 1/10W 1/10W 1/10W 1/10W 2.5W or PTC 1W 1/10W 1/10W 2W 10V 10V Tantalum 35V Tantalum 10V Tantalum 10V except on Vb Texas Instruments Raychem
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HC5520 Metric Plastic Quad Flatpack Packages (MQFP/PQFP)
D D1 -D-
Q44.10x10 (JEDEC MO-108AA-2 ISSUE A)
44 LEAD METRIC PLASTIC QUAD FLATPACK PACKAGE INCHES SYMBOL A A1 A2 MIN 0.004 0.077 0.012 0.012 0.510 0.390 0.510 0.390 0.026 44 0.032 BSC MAX 0.093 0.010 0.083 0.018 0.016 0.530 0.398 0.530 0.398 0.037 MILLIMETERS MIN 0.10 1.95 0.30 0.30 12.95 9.90 12.95 9.90 0.65 44 0.80 BSC MAX 2.35 0.25 2.10 0.45 0.40 13.45 10.10 13.45 10.10 0.95 NOTES 6 3 4, 5 3 4, 5 7 Rev. 1 1/94 NOTES:
0.10 0.004
-AE E1
-B-
B B1 D D1 E
e
PIN 1 SEATING A PLANE
E1 L N e
-H-
0.40 0.016 MIN 0o MIN
5o-16o 0.20 A-B S 0.008 M C A2 A1
-CDS B B1 0.13/0.17 0.005/0.007 BASE METAL WITH PLATING
1. Controlling dimension: MILLIMETER. Converted inch dimensions are not necessarily exact. 2. All dimensions and tolerances per ANSI Y14.5M-1982. 3. Dimensions D and E to be determined at seating plane -C- . 4. Dimensions D1 and E1 to be determined at datum plane -H- . 5. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25mm (0.010 inch) per side. 6. Dimension B does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total. 7. "N" is the number of terminal positions.
0o-7o
L
5o-16o
0.13/0.23 0.005/0.009
19
HC5520 Plastic Leaded Chip Carrier Packages (PLCC)
0.042 (1.07) 0.048 (1.22) PIN (1) IDENTIFIER C L 0.042 (1.07) 0.056 (1.42) 0.050 (1.27) TP 0.004 (0.10) C
N44.65 (JEDEC MS-018AC ISSUE A)
44 LEAD PLASTIC LEADED CHIP CARRIER PACKAGE INCHES SYMBOL A MIN 0.165 0.090 0.685 0.650 0.291 0.685 0.650 0.291 44 MAX 0.180 0.120 0.695 0.656 0.319 0.695 0.656 0.319 MILLIMETERS MIN 4.20 2.29 17.40 16.51 7.40 17.40 16.51 7.40 44 MAX 4.57 3.04 17.65 16.66 8.10 17.65 16.66 8.10 NOTES 3 4, 5 3 4, 5 6 Rev. 1 3/95
0.025 (0.64) R 0.045 (1.14)
D2/E2 C L
A1 D
E1 E
D1 D2
D2/E2 VIEW "A"
E E1
D1 D 0.020 (0.51) MAX 3 PLCS
A1 A
0.020 (0.51) MIN
E2 N
-C- SEATING PLANE 0.026 (0.66) 0.032 (0.81) 0.013 (0.33) 0.021 (0.53)
0.045 (1.14) MIN
0.025 (0.64) MIN VIEW "A" TYP.
NOTES: 1. Controlling dimension: INCH. Converted millimeter dimensions are not necessarily exact. 2. Dimensions and tolerancing per ANSI Y14.5M-1982. 3. Dimensions D1 and E1 do not include mold protrusions. Allowable mold protrusion is 0.010 inch (0.25mm) per side. 4. To be measured at seating plane -C- contact point. 5. Centerline to be determined where center leads exit plastic body. 6. "N" is the number of terminal positions.
All Harris Semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Harris Semiconductor products are sold by description only. Harris Semiconductor reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Harris is believed to be accurate and reliable. However, no responsibility is assumed by Harris or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Harris or its subsidiaries.
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For general information regarding Harris Semiconductor and its products, call 1-800-4-HARRIS NORTH AMERICA Harris Semiconductor P. O. Box 883, Mail Stop 53-210 Melbourne, FL 32902 TEL: 1-800-442-7747 (407) 729-4984 FAX: (407) 729-5321 EUROPE Harris Semiconductor Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Harris Semiconductor PTE Ltd. No. 1 Tannery Road Cencon 1, #09-01 Singapore 1334 TEL: (65) 748-4200 FAX: (65) 748-0400
SEMICONDUCTOR
20

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