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| Philips Semiconductors Product specification Thyristors logic level GENERAL DESCRIPTION Passivated, sensitive gate thyristors in a full pack, plastic envelope, intended for use in general purpose switching and phase control applications. These devices are intended to be interfaced directly to microcontrollers, logic integrated circuits and other low power gate trigger circuits. BT258X series QUICK REFERENCE DATA SYMBOL VDRM, VRRM IT(AV) IT(RMS) ITSM PARAMETER BT258XRepetitive peak off-state voltages Average on-state current RMS on-state current Non-repetitive peak on-state current MAX. MAX. MAX. UNIT 500R 500 5 8 75 600R 600 5 8 75 800R 800 5 8 75 V A A A PINNING - SOT186A PIN 1 2 3 DESCRIPTION cathode anode gate PIN CONFIGURATION case SYMBOL a k case isolated 123 g LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 134). SYMBOL PARAMETER CONDITIONS MIN. half sine wave; Ths 90 C all conduction angles half sine wave; Tj = 25 C prior to surge t = 10 ms t = 8.3 ms t = 10 ms ITM = 10 A; IG = 50 mA; dIG/dt = 50 mA/s -40 MAX. -500R -600R -800R 5001 6001 800 5 8 75 82 28 50 2 5 5 0.5 150 1252 UNIT V A A A A A2s A/s A V W W C C VDRM, VRRM Repetitive peak off-state voltages IT(AV) IT(RMS) ITSM Average on-state current RMS on-state current Non-repetitive peak on-state current I2t dIT/dt IGM VRGM PGM PG(AV) Tstg Tj I2t for fusing Repetitive rate of rise of on-state current after triggering Peak gate current Peak reverse gate voltage Peak gate power Average gate power over any 20 ms period Storage temperature Operating junction temperature 1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 15 A/s. 2 Note: Operation above 110C may require the use of a gate to cathode resistor of 1k or less. October 2002 1 Rev 2.000 Philips Semiconductors Product specification Thyristors logic level ISOLATION LIMITING VALUE & CHARACTERISTIC Ths = 25 C unless otherwise specified SYMBOL Visol PARAMETER R.M.S. isolation voltage from all three terminals to external heatsink CONDITIONS f = 50-60 Hz; sinusoidal waveform; R.H. 65% ; clean and dustfree MIN. - BT258X series TYP. - MAX. 2500 UNIT V Cisol Capacitance from T2 to external f = 1 MHz heatsink - 10 - pF THERMAL RESISTANCES SYMBOL Rth j-hs Rth j-a PARAMETER Thermal resistance junction to heatsink Thermal resistance junction to ambient CONDITIONS with heatsink compound without heatsink compound in free air MIN. TYP. 55 MAX. 5.0 6.9 UNIT K/W K/W K/W STATIC CHARACTERISTICS Tj = 25 C unless otherwise stated SYMBOL IGT IL IH VT VGT ID, IR PARAMETER Gate trigger current Latching current Holding current On-state voltage Gate trigger voltage Off-state leakage current CONDITIONS VD = 12 V; IT = 0.1 A VD = 12 V; IGT = 0.1 A VD = 12 V; IGT = 0.1 A IT = 16 A VD = 12 V; IT = 0.1 A VD = VDRM(max); IT = 0.1 A; Tj = 110 C VD = VDRM(max); VR = VRRM(max); Tj = 125 C MIN. 0.1 TYP. 50 0.4 0.3 1.3 0.4 0.2 0.1 MAX. 200 10 6 1.6 1.5 0.5 UNIT A mA mA V V V mA DYNAMIC CHARACTERISTICS Tj = 25 C unless otherwise stated SYMBOL dVD/dt tgt tq PARAMETER Critical rate of rise of off-state voltage Gate controlled turn-on time Circuit commutated turn-off time CONDITIONS VDM = 67% VDRM(max); Tj = 125 C; exponential waveform; RGK = 100 ITM = 10 A; VD = VDRM(max); IG = 5 mA; dIG/dt = 0.2 A/s VD = 67% VDRM(max); Tj = 125 C; ITM = 12 A; VR = 24 V; dITM/dt = 10 A/s; dVD/dt = 2 V/s; RGK = 1 k MIN. 50 TYP. 100 2 100 MAX. UNIT V/s s s October 2002 2 Rev 2.000 Philips Semiconductors Product specification Thyristors logic level BT258X series Ptot (W) 8 conduction angle degrees 30 60 90 120 180 form factor (a) 6 4 2.8 2.2 1.9 1.57 1.9 2.2 2.8 4 Ths(max) (C) 85 a = 1.57 90 95 100 105 110 80 70 60 50 40 30 20 10 0 ITSM / A IT I TSM time T Tj initial = 25 C max 4 2 115 120 0 0 2 4 IT(AV) (A) 6 125 1 10 100 Number of half cycles at 50Hz 1000 Fig.1. Maximum on-state dissipation, Ptot, versus average on-state current, IT(AV), where a = form factor = IT(RMS)/ IT(AV). ITSM / A Fig.4. Maximum permissible non-repetitive peak on-state current ITSM, versus number of cycles, for sinusoidal currents, f = 50 Hz. 1000 24 20 16 IT(RMS) / A dI T/dt limit 100 I TSM T time 12 IT 8 4 0 0.01 Tj initial = 25 C max 10 10us 100us T/s 1ms 10ms 0.1 1 surge duration / s 10 Fig.2. Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp 10ms. IT(RMS) / A 90 C Fig.5. Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Ths 90C. VGT(Tj) VGT(25 C) 9 8 7 6 5 4 3 2 1 1.6 1.4 1.2 1 0.8 0.6 0 -50 0 50 Ths / C 100 150 0.4 -50 0 50 Tj / C 100 150 Fig.3. Maximum permissible rms current IT(RMS) , versus mounting base temperature Ths. Fig.6. Normalised gate trigger voltage VGT(Tj)/ VGT(25C), versus junction temperature Tj. October 2002 3 Rev 2.000 Philips Semiconductors Product specification Thyristors logic level BT258X series 3 2.5 2 1.5 1 0.5 IGT(Tj) IGT(25 C) I /A 30 T Tj = 125 C Tj = 25 C 20 typ 10 Vo = 1 V Rs = 0.04 max 0 -50 0 0 50 Tj / C 100 150 0 0.5 1 VT / V 1.5 2 Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25C), versus junction temperature Tj. IL(Tj) IL(25 C) Fig.10. Typical and maximum on-state characteristic. 3 2.5 BT150 10 Zth j-hs (K/W) without heatsink compound 1 with heatsink compound 2 1.5 1 0.5 0 -50 0.01 10us 0.1ms 1ms 10ms tp / s 0.1s 1s 0.1 P D tp t 0 50 Tj / C 100 150 10s Fig.8. Normalised latching current IL(Tj)/ IL(25C), versus junction temperature Tj. IH(Tj) IH(25 C) Fig.11. Transient thermal impedance Zth j-hs, versus pulse width tp. dVD/dt (V/us) 1000 3 2.5 2 1.5 1 0.5 RGK = 100 ohms 100 10 0 -50 0 50 Tj / C 100 150 1 0 50 Tj / C 100 150 Fig.9. Normalised holding current IH(Tj)/ IH(25C), versus junction temperature Tj. Fig.12. Typical, critical rate of rise of off-state voltage, dVD/dt versus junction temperature Tj. October 2002 4 Rev 2.000 Philips Semiconductors Product specification Thyristors logic level MECHANICAL DATA Dimensions in mm Net Mass: 2 g 10.3 max 3.2 3.0 BT258X series 4.6 max 2.9 max Recesses (2x) 2.5 0.8 max. depth 2.8 6.4 seating plane 15.8 max 15.8 max. 3 max. not tinned 19 max. 3 2.5 13.5 min. 1 0.4 M 2 3 1.0 (2x) 0.6 2.54 0.5 2.5 1.3 0.9 0.7 5.08 Fig.13. SOT186A; The seating plane is electrically isolated from all terminals. Notes 1. Refer to mounting instructions for F-pack envelopes. 2. Epoxy meets UL94 V0 at 1/8". October 2002 5 Rev 2.000 Philips Semiconductors Product specification Thyristors logic level BT258X series DEFINITIONS DATA SHEET STATUS DATA SHEET STATUS3 Objective data PRODUCT STATUS4 Development DEFINITIONS This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A Preliminary data Qualification Product data Production Limiting values Limiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of this specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 2003 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, it is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent or other industrial or intellectual property rights. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices or systems where malfunction of these products can be reasonably expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale. 3 Please consult the most recently issued datasheet before initiating or completing a design. 4 The product status of the device(s) described in this datasheet may have changed since this datasheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. October 2002 6 Rev 2.000 |
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