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19-1895; Rev 0; 1/01
Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
General Description
The MAX5223 contains two 8-bit, buffered, voltage output digital-to-analog converters (DAC A and DAC B) in a small 8-pin SOT23 package. DAC outputs can source and sink 1mA to within 100mV of ground and VDD. The MAX5223 operates with a single +2.7V to +5.5V supply. The device uses a 3-wire serial interface, which operates at clock rates up to 25MHz and is compatible with SPITM, QSPITM, and MICROWIRETM interface standards. The serial input shift register is 16 bits long and consists of 8 bits of DAC input data and 8 bits for DAC selection and shutdown control. DAC registers can be loaded independently or in parallel at the positive edge of CS. The MAX5223's ultra-low power consumption and tiny 8-pin SOT23 package make it ideal for portable and battery-powered applications. Supply current is a low 100A and drops below 1A in shutdown mode. In addition, the reference input is disconnected from the REF pin during shutdown, which reduces the system's total power consumption. o Low Power Consumption 100A Operating Current <1A Shutdown Current o +2.7V to +5.5V Single-Supply Operation o Dual Buffered Voltage Output o Programmable Shutdown Mode o 25MHz, 3-Wire Serial Interface o SPI, QSPI, and MICROWIRE-Compatible
Features
o Tiny 8-Pin SOT23 Package (3mm 3mm)
Ordering Information
PART MAX5223EKA-T TEMP. RANGE -40C to +85C PIN-PACKAGE 8 SOT23
________________________Applications
Digital Gain and Offset Adjustment Programmable Current Source Programmable Voltage Source Power Amp Bias Control VCO Tuning
8 DIN SCLK 4 0.22F
Functional Diagram
0.1F (OPTIONAL) 3 VDD 7 REF
Pin Configuration
TOP VIEW
16-BIT SHIFT REGISTER CONTROL (8) DATA (8)
DAC LATCH A
DAC A
OUTA VOUTA 5
DAC LATCH B
DAC B
OUTB VOUTB 6
CS 1 GND 2 VDD 3 SCLK 4
8
DIN REF OUTB OUTA
MAX5223
7 6 5
CS 1
MAX5223
SOT23-8
2 GND
SPI and QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. ________________________________________________________________ Maxim Integrated Products 1
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
ABSOLUTE MAXIMUM RATINGS
VDD to GND ............................................................. -0.3V to +6V All Other Pins to GND (Note 1).................. -0.3V to (VDD + 0.3V) Continuous Power Dissipation (TA = +70C) 8-Pin SOT23 (derate 8.7mW/C above +70C)............696mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER STATIC PERFORMANCE Resolution Integral Nonlinearity Differential Nonlinearity Total Unadjusted Error Zero-Code Offset Zero-Code Temperature Coefficient N INL DNL TUE VZS TCVZS 4.5V VDD 5.5V, VREF = 4.096V, ILOAD = 250A 2.7V VDD 3.6V, VREF = 2.4V, ILOAD = 250A GND 25 RREF (Note 3) 8 16 50 ILOAD = 250A (Note 2) Guaranteed monotonic, ILOAD = 250A (Note 2) 8 0.3 0.2 1 10 100 1 mV/V 1 1 1 Bits LSB LSB LSB mV V/C SYMBOL CONDITIONS MIN TYP MAX UNITS
Power Supply Rejection Ratio
PSRR
REFERENCE INPUT Reference Input Voltage Range Reference Input Capacitance Reference Input Resistance Reference Input Resistance (Shutdown Mode) DAC OUTPUTS Output Voltage Range Capacitive Load at OUT_ Output Resistance DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Input Capacitance VIH VIL IIN CIN VIN = 0 or VDD (Note 4) 0.1 0.7 x VDD 0.3 x VDD 10 10 V V A pF 500 ILOAD = 0 0 REF 100 V pF VDD V pF k M
2
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Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER DYNAMIC PERFORMANCE Voltage Output Slew Rate Voltage Output Settling Time Digital Feedthrough and Crosstalk POWER SUPPLY Supply Voltage Range Supply Current Shutdown Supply Current VDD IDD All inputs = 0 VDD = +5.5V VDD = +5.5V VDD = +3.6V 2.7 150 100 0.6 5.5 275 220 V A A SR CL = 100pF To 12LSB, CL = 100pF All zeros to all ones 0.15 50 0.25 V/s s nV-s SYMBOL CONDITIONS MIN TYP MAX UNITS
TIMING CHARACTERISTICS
(Figure 3, VDD = +2.7V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) (Note 4) PARAMETER SERIAL INTERFACE TIMING -- -- CS Fall to SCLK Rise Setup Time -- -- SCLK Rise to CS Rise Setup Time DIN to SCLK Rise Setup Time DIN to SCLK Rise Hold Time SCLK Pulse Width High SCLK Pulse Width Low -- -- CS Pulse Width High SYMBOL tCSS tCSH tDS tDH tCH tCL tCSPWH CONDITIONS MIN 50 50 20 20 20 20 50 TYP MAX UNITS ns ns ns ns ns ns ns
Note 1: The outputs may be shorted to VDD or GND if the package power dissipation is not exceeded. Typical short-circuit current to GND is 70mA. Note 2: Reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. See Typical Operating Characteristics. Note 3: Reference input resistance is code-dependent. The lowest input resistance occurs at code 55hex. See the Reference Input section. Note 4: Guaranteed by design. Not production tested.
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3
Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
__________________________________________Typical Operating Characteristics
(VDD = +3V, TA = +25C, unless otherwise noted.)
OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT
MAX5223 toc01
OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = +5V)
MAX5223 toc02
OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT
700 OUTPUT VOLTAGE (mV) 600 500 400 300 200 100 0
MAX5223 toc03
3.5 3.0 OUTPUT VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5 0 0.001
6 5 OUTPUT VOLTAGE (V) 4 3 2 1 0 0.0001
800
0.01
0.1
1
10
100
0.01
1
100
-100 0.0001
0.001
0.01
0.1
1
10
OUTPUT SOURCE CURRENT (mA)
OUTPUT SOURCE CURRENT (mA)
OUTPUT SINK CURRENT (mA)
INTEGRAL NONLINEARITY vs. DIGITAL CODE
MAX5223 toc04
DIFFERENTIAL NONLINEARITY vs. DIGITAL CODE
MAX5223 toc05
POSITIVE SUPPLY CURRENT vs. SUPPLY VOLTAGE
0.14 0.12 IDD (mA) 0.10 0.08 0.06 0.04 0.02 0
MAX5223 toc06
0.20 0.15 0.10
0.10 0.08 0.06 0.04 DNL (LSB) 0.02 0 -0.02 -0.04
0.16
INL (LSB)
0.05 0 -0.05 -0.10 -0.15 -2.20 0 50 100 150 CODE 200 250 300
-0.06 -0.08 -0.10 0 50 100 150 CODE 200 250 300
2
3
4 VDD (V)
5
POSITIVE SUPPLY CURRENT vs. TEMPERATURE
MAX5223 toc07
SHUTDOWN SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX5223 toc08
REFERENCE SMALL SIGNAL FREQUENCY RESPONSE
0 RELATIVE OUTPUT (dB) -5 -10 -15 -20 -25 -30 -35 -40
MAX5223 toc09
0.18 0.16 0.14 IDD (mA) 0.12 0.10 0.08 0.06 0.04 -40 -25 -10 5 20 35 50 65 80 TEMPERATURE (C)
1.0 0.9 0.8 0.7 IDD (A) 0.6 0.5 0.4 0.3 0.2 0.1 0 2 3 4 5 SUPPLY VOLTAGE (V)
5
0.1
1
10
100
1k
10k
FREQUENCY (Hz)
4
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Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
Typical Operating Characteristics (continued)
(VDD = +3V, TA = +25C, unless otherwise noted.)
LARGE-SIGNAL OUTPUT STEP RESPONSE
MAX5223 toc10
CLOCK FEEDTHROUGH
MAX5223 toc11
CH1 CS 2V/div
SCLK, 5MHz 0 TO 3V 5V/div
OUT_ 1V/div
CH2
OUT_ 10mV/div AC-COUPLED
CS = HIGH, SCLK = 5MHz 10s/div VREF = VDD = +3V RL = 10k, CL = 100pF 50ns/div
POWER-UP OUTPUT GLITCH
MAX5223 toc12
POWER-UP OUTPUT GLITCH
MAX5223 toc13
VDD 2V/div
VDD 2V/div
OUT_ 50mV/div
OUT_ 20mV/div
100s/div VDD = 0 TO 5V RISE TIME = FALL TIME = 10s
2ms/div VDD = 0 TO 5V RISE TIME = FALL TIME = 1ms
NEGATIVE SETTLING TIME
MAX5223 toc14
POSITIVE SETTLING TIME
MAX5223 toc15
CS 2V/div
CS 2V/div
OUT_ 1V/div
OUT_ 1V/div
4s/div VDD = REF = +3V RL = 10k, CL =100pF ALL DATA BITS OFF TO ALL DATA BITS ON
4s/div VDD = REF = +3V RL = 10k, CL =100pF ALL DATA BITS OFF TO ALL DATA BITS ON
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5
Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
Typical Operating Characteristics (continued)
(VDD = +3V, TA = +25C, unless otherwise noted.)
OUTPUT VOLTAGE NOISE (DC TO 1MHz)
MAX5223 toc16
CH1
OUTA 2mV/div AC-COUPLED
VDD = +3V, REF = VDD, NO LOAD, DIGITAL CODE = FF 2ms/div
______________________________________________________________Pin Description
PIN NAME -- -- CS GND VDD SCLK OUTA OUTB REF DIN FUNCTION Chip Select. Active-Low. Enables data to be shifted into the 16-bit shift register. Programming commands -- -- are executed at the rising edge of C S. Ground Positive Power Supply (+2.7V to +5.5V). Bypass with 0.22F to GND. Serial Clock Input DAC A Output Voltage (Buffered) DAC B Output Voltage (Buffered) Reference Input for DAC A and DAC B (Optional: Bypass with 0.1F to GND) Serial Data Input of the 16-Bit Shift Register. Data is clocked into the register on the rising edge of SCLK.
1
2 3 4 5 6 7 8
6
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Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
Detailed Description
Analog Section
The MAX5223 contains two 8-bit, voltage output DACs. The DACs are "inverted" R-2R ladder networks. They use complementary switches that convert 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage. The MAX5223 has one reference input that is shared by DAC A and DAC B. The device includes output buffer amplifiers for both DACs and input logic for simple microprocessor (P) and CMOS interfaces. The power supply range is from +5.5V down to +2.7V. Reference Input and DAC Output Range The voltage at REF sets the full-scale output of the DACs. The input impedance of the REF input is codedependent. The lowest value, approximately 8k, occurs when the input code is 01010101 (55hex). The typical value of 50M occurs when the input code is zero. In shutdown mode, the selected DAC output is set to zero, while the value stored in the DAC register remains unchanged. This removes the load from the reference input to save power. Bringing the MAX5223 out of shutdown mode restores the DAC output voltage. Since the input resistance at REF is code-dependent, the DAC's reference source should have an output impedance of no more than 5 to meet accuracy specifications and to avoid crosstalk. The input capacitance at the REF pin is also code dependent and typically does not exceed 25pF. The reference voltage on REF can range anywhere from GND to VDD. See the Output Buffer Amplifier section for more information. Figure 1 is the DAC simplified circuit diagram. Output Buffer Amplifiers DAC A and DAC B voltage outputs are internally buffered. The buffer amplifiers have a Rail-to-Rail(R) (GND to VDD) output voltage range. Both DAC output amplifiers can source and sink up to 1mA of current. The amplifiers are unity-gain stable with a capacitive load of 100pF or smaller. The slew rate is typically 0.15V/s. Shutdown Mode When programmed to shutdown mode, the outputs of DAC A and DAC B are passively pulled to GND with a series 5k resistor. In shutdown mode, the REF input is high impedance (50M typ) to conserve current drain from the system reference; therefore, the system reference does not have to be powered down. Coming out of shutdown, the DAC outputs return to the values kept in the registers. The recovery time is equivalent to the DAC settling time.
R
R
R
OUT
2R
2R
2R
2R
2R
Serial Interface -- -- An active low chip select (CS) enables the shift register to receive data from the serial data input. Data is clocked into the shift register on every rising edge of the serial clock signal (SCLK). The clock frequency can be as high as 25MHz. Data is sent by the most significant bit (MSB) first and can be transmitted in one 16-bit word. The write cycle -- -- can be segmented when C S is kept active (low) to allow, for example, two 8-bit wide transfers. After clocking all 16-- - bits into the input shift register, the rising - edge of CS updates the DAC outputs and the shutdown status. DACs cannot be simultaneously updated to different digital values because of their single buffered structure.
Serial Input Data Format and Control Codes Table 1 lists the serial input data format and Table 2 lists the programming commands. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally. Every control bit performs one function. Data is clocked
REF GND SHOWN FOR ALL ONES ON DAC
Figure 1. DAC Simplified Circuit Diagram
(R)Rail-to-Rail
is a registered trademark of Nippon Motorola, Ltd. _______________________________________________________________________________________ 7
Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
in starting with UB1 (uncommitted bit), followed by the remaining control bits and the data byte. The least significant bit (LSB) of the data byte (D0) is the last bit clocked into the shift register (Figure 2). Table 3 is an example of a 16-bit input word. It performs the following functions: * 80 hex (128 decimal) loaded into DAC registers A and B. * DAC A and DAC B are active. Table 4 shows code examples and how to calculate their corresponding outputs.
CONTROL BITS
Table 1. Input Shift Register
D0* D1 DATA BITS D2 D3 D4 D5 D6 D7 LA LB UB4 SA SB UB3 UB2 UB1** *Clocked in last **Clocked in first DAC Data Bit 0 (LSB) DAC Data Bit 1 DAC Data Bit 2 DAC Data Bit 3 DAC Data Bit 4 DAC Data Bit 5 DAC Data Bit 6 DAC Data Bit 7 (MSB) Load Reg DAC A, Active-High Load Reg DAC B, Active-High Uncommitted Bit 4 Shutdown, Active-High Shutdown, Active-High Uncommitted Bit 3 Uncommitted Bit 2 Uncommitted Bit 1
CS INSTRUCTION EXECUTED OPTIONAL DIN UB1 UB2 UB3 SB SA UB4 LB LA D7 D6 D5 D4 D3 D2 D1 D0
SCLK
(CONTROL BYTE)
(DATA BYTE)
Figure 2. 3-Wire Serial-Interface Timing Diagram
8
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Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
Table 2. Serial-Interface Programming Commands
CONTROL UB1 UB2 UB3 SB X X X X X X X X X X X X X X X X X X X X 1 1 1 1 1 1 1 1 1 1 SA UB4 LB LA 0 0 0 1 1 X X X X X X X X X X X X X X X 8-Bit DAC Data 8-Bit DAC Data 8-Bit DAC Data X X X X X X X X X X X X X X X X X X X X X X X X X D7 D6 MSB X X D5 X DATA D4 X D3 X D2 X D1 X D0 LSB X FUNCTION
* * * * *
0 0 1 0 1
* * * * *
0 0 0 1 1
0 0 0 0 0 0 0 0 0 0
0 0 1 0 1
No Operation to DAC Registers Unassigned Command Load Register to DAC B Load Register to DAC A Load Both DAC Registers All DACs Active Unassigned Command Shutdown Shutdown Shutdown
* * * * *
* * * * *
X = Don't care.
* = Not shown, for the sake of clarity. The functions of loading and shutting down the DACs and programming the logic can be combined in a single command.
Table 3. Example of a 16-Bit Input Word
LOADED IN FIRST UB1 X UB2 X UB3 1 SB 0 SA 0 UB4 0 LB 1 LA 1 D7 1 D6 0 D5 0 D4 0 D3 0 D2 0 D1 0 LOADED IN LAST D0 0
Digital Inputs The digital inputs are compatible with CMOS logic. Supply current increases slightly when toggling the logic inputs through the transition zone between 0.3 VDD and 0.7 VDD. Microprocessor Interfacing The MAX5223 serial interface is compatible with MICROWIRE, SPI, and QSPI. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the inactive clock state to zero, and CPHA = 0
changes data at the falling edge of SCLK. This setting allows SPI to run at full clock speeds. If a serial port is not available on your P, three bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary.
_______________________________________________________________________________________
9
Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23 MAX5223
CS tCSPWH tCSS tCH SCLK tCSH
tDS tDH
tCL
DIN
Figure 3. Detailed Serial-Interface Timing Diagram
Applications Information
The MAX5223 is specified for single-supply operation with V DD ranging from +2.7V to +5.5V, covering all commonly used supply voltages in +3V and +5V systems.
Table 4. Code Table
DAC CONTENTS D7 D6 D5 D4 D3 D2 D1 D0 1 1 1 1 1 1 1 1 ANALOG OUTPUT
255 +REF x 256 129 +REF x 256 REF 128 +REF x =+ 256 2 127 +REF x 256 1 +REF x 256
Initialization
An internal POR circuit forces the outputs to zero scale and initializes all internal registers to zero. Perform an initial write operation to set the outputs to the desired voltage at power-up.
1
0
0
0
0
0
0
1
Power-Supply and Ground Management
GND should be connected to the highest quality ground available. Bypass VDD with a 0.1F to 0.22F capacitor to GND. The reference input can be used without bypassing. For optimum line- and load-transient response and noise performance, bypass the reference input with 0.1F to 4.7F to GND. Careful PC board layout minimizes crosstalk among DAC outputs, the reference, and digital inputs. Separate analog lines with ground traces between them. Make sure that high-frequency digital lines are not routed in parallel to analog lines.
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
0 0
0 0
0 0
0 0
0 0
0 0
0 0
1 0
0V
Note: 1LSB = REF x 2
-8
= REF x
1 256 D where D = decimal 256 value of digital input
Chip Information
TRANSISTOR COUNT: 1480 PROCESS TECHNOLOGY: BiCMOS
ANALOG OUTPUT = REF x
10
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Low-Power, Dual, 8-Bit, Voltage Output Serial DAC in 8-Pin SOT23
________________________________________________________Package Information
SOT23, 8L.EPS
MAX5223
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________11 (c) 2001 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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