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| TM NS ESIG EW D UCT R N OD R D FO NDE ITUTE P E OMM SUBST N REC LE NOT Data ISheet IRF540 SB POS IRF540, RF1S540SM June 2000 File Number 2309.6 28A, 100V, 0.077 Ohm, N-Channel Power MOSFETs [ /Title (IRF54 0, RF1S5 40SM) /Subject (28A, 100V, 0.077 Ohm, NChannel Power MOSFETs) /Autho r () /Keywords (Intersil Corporation, NChannel Power MOSFETs, TO220AB , TO263AB ) /Creator () /DOCI These are N-Channel enhancement mode silicon gate power field effect transistors. They are advanced power MOSFETs designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. All of these power MOSFETs are designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. Formerly developmental type TA17421. Features * 28A, 100V * rDS(ON) = 0.077 * Single Pulse Avalanche Energy Rated * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance * Related Literature - TB334 "Guidelines for Soldering Surface Mount Components to PC Boards" Symbol D Ordering Information PART NUMBER IRF540 RF1S540SM PACKAGE TO-220AB TO-263AB BRAND IRF540 G RF1S540SM S NOTE: When ordering, use the entire part number. Add the suffix 9A to obtain the TO-263AB variant in the tape and reel, i.e., RF1S540SM9A. Packaging JEDEC TO-220AB SOURCE DRAIN GATE DRAIN (FLANGE) GATE SOURCE JEDEC TO-263AB DRAIN (FLANGE) 1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright (c) Intersil Corporation 2000 IRF540, RF1S540SM Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified IRF540, RF1S540SM 100 100 28 20 110 20 120 0.8 230 -55 to 175 300 260 UNITS V V A A A V W W/oC mJ oC oC oC Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .ID Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Dissipation Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 4). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. NOTE: 1. TJ = 25oC to TJ = 150oC. Electrical Specifications PARAMETER Drain to Source Breakdown Voltage Gate to Threshold Voltage Zero Gate Voltage Drain Current TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS ID(ON) IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD Measured From the Contact Screw on Tab To Center of Die Measured From the Drain Lead, 6mm (0.25in) from Package to Center of Die Modified MOSFET Symbol Showing the Internal Devices Inductances D LD G LS S TEST CONDITIONS ID = 250A, VGS = 0V (Figure 10) VGS = VDS, ID = 250A VDS = 95V, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 150oC VDS > ID(ON) x rDS(ON) MAX, VGS = 10V (Figure 7) VGS = 20V ID = 17A, VGS = 10V (Figures 8, 9) VDS 50V, ID = 17A (Figure 12) VDD = 50V, ID 28A, RG 9.1, RL = 1.7 MOSFET Switching Times are Essentially Independent of Operating Temperature VGS = 10V, ID = 28A, VDS = 0.8 x Rated BVDSS , Ig(REF) = 1.5mA (Figure 14) Gate Charge is Essentially Independent of Operating Temperature MIN 100 2 28 8.7 - TYP 0.060 13 15 70 40 50 38 8 21 1450 550 100 3.5 MAX 4 25 250 100 0.077 23 110 60 83 59 - UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance VDS = 25V, VGS = 0V, f = 1MHz (Figure 11) - - 4.5 - nH Internal Source Inductance LS Measured From the Source Lead, 6mm (0.25in) From Header to Source Bonding Pad - 7.5 - nH Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient RJC RJA RJA Free Air Operation RF1S540SM Mounted on FR-4 Board with Minimum Mounting Pad - - 1.25 80 62 oC/W oC/W oC/W 2 IRF540, RF1S540SM Source to Drain Diode Specifications PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode G D MIN - TYP - MAX 28 110 UNITS A A S Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovery Charge NOTES: VSD trr QRR TJ TJ TJ = 25oC, ISD = 27A, VGS = 0V (Figure 13) = 25oC, ISD = 28A, dISD/dt = 100A/s = 25oC, ISD = 28A, dISD/dt = 100A/s 70 0.2 150 1.0 2.5 300 1.9 V ns C 2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3). 4. VDD = 25V, starting TJ = 25oC, L = 440H, RG = 25, peak IAS = 28A. Typical Performance Curves 1.2 POWER DISSIPATION MULTIPLIER 1.0 0.8 0.6 0.4 0.2 0 0 25 Unless Otherwise Specified 30 ID, DRAIN CURRENT (A) 24 18 12 6 0 125 50 75 100 TC , CASE TEMPERATURE (oC) 150 175 25 50 75 100 125 150 175 TC, CASE TEMPERATURE (oC) FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE 10 ZJC, TRANSIENT THERMAL IMPEDANCE (oC/W) 1 0.5 0.2 0.1 0.1 0.05 0.02 0.01 0.01 10-5 SINGLE PULSE 10-4 10-3 10-2 10-1 t1 t2 PDM NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJC + TC 1 10 t1, RECTANGULAR PULSE DURATION (s) FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE 3 IRF540, RF1S540SM Typical Performance Curves 300 SINGLE PULSE TJ = MAX RATED TC = 25oC 50 ID, DRAIN CURRENT (A) VGS = 10V VGS = 8V VGS = 7V Unless Otherwise Specified (Continued) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 100 40 30 20 100s 10 VGS = 6V OPERATION IN THIS AREA MAY BE LIMITED BY rDS(ON) 1ms 10ms VGS = 5V 10 VGS = 4V 0 1 1 10 100 300 VDS, DRAIN TO SOURCE VOLTAGE (V) 0 12 24 36 48 VDS, DRAIN TO SOURCE VOLTAGE (V) 60 FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. OUTPUT CHARACTERISTICS 50 VGS = 8V VGS = 7V VGS = 10V 30 VGS = 6V ID(ON), ON-STATE DRAIN CURRENT (A) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 40 100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V 10 20 VGS = 5V 10 VGS = 4V 0 0 1 2 3 4 5 VDS, DRAIN TO SOURCE VOLTAGE (V) 175oC 1 25oC 0.1 0 2 4 6 8 VGS, GATE TO SOURCE VOLTAGE (V) 10 FIGURE 6. SATURATION CHARACTERISTICS FIGURE 7. TRANSFER CHARACTERISTICS 1.0 rDS(ON), DRAIN TO SOURCE 0.8 ON RESISTANCE () NORMALIZED DRAIN TO SOURCE ON RESISTANCE PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 3.0 2.4 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = 28A 0.6 1.8 0.4 1.2 0.2 VGS = 10V VGS = 20V 0 25 50 75 100 125 0.6 0 ID, DRAIN CURRENT (A) 0 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 TJ , JUNCTION TEMPERATURE (oC) FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE 4 IRF540, RF1S540SM Typical Performance Curves 1.25 NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE ID = 250A Unless Otherwise Specified (Continued) 3000 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD CISS 1.15 C, CAPACITANCE (pF) 2400 1.05 1800 0.95 1200 COSS 600 CRSS 0.85 0.75 -60 -40 -20 0 20 40 60 80 100 120 140 160 180 0 1 10 VDS, DRAIN TO SOURCE VOLTAGE (V) 100 TJ , JUNCTION TEMPERATURE (oC) FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE 20 16 25oC 12 175oC 8 ISD, SOURCE TO DRAIN CURRENT (A) gfs, TRANSCONDUCTANCE (S) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS 50V 1000 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 100 175oC 25oC 10 4 0 0 10 20 30 40 50 ID , DRAIN CURRENT (A) 1 0 0.6 1.2 1.8 2.4 VSD, SOURCE TO DRAIN VOLTAGE (V) 3.0 FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE 20 VGS, GATE TO SOURCE VOLTAGE (V) ID = 28A VDS = 50V 16 VDS = 20V 12 VDS = 80V 8 4 0 0 12 24 36 48 60 Qg , GATE CHARGE (nC) FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE 5 IRF540, RF1S540SM Test Circuits and Waveforms VDS BVDSS L VARY tP TO OBTAIN REQUIRED PEAK IAS VGS DUT tP RG IAS VDD tP VDS VDD + 0V IAS 0.01 0 tAV FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 16. UNCLAMPED ENERGY WAVEFORMS tON td(ON) tr RL VDS 90% tOFF td(OFF) tf 90% + RG DUT - VDD 0 10% 90% 10% VGS VGS 0 10% 50% PULSE WIDTH 50% FIGURE 17. SWITCHING TIME TEST CIRCUIT FIGURE 18. RESISTIVE SWITCHING WAVEFORMS CURRENT REGULATOR VDS (ISOLATED SUPPLY) VDD Qg(TOT) Qgd Qgs VGS 12V BATTERY 0.2F 50k 0.3F SAME TYPE AS DUT D G DUT VDS 0 Ig(REF) 0 IG CURRENT SAMPLING RESISTOR S VDS ID CURRENT SAMPLING RESISTOR IG(REF) 0 FIGURE 19. GATE CHARGE TEST CIRCUIT FIGURE 20. GATE CHARGE WAVEFORMS 6 IRF540, RF1S540SM All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification. Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries. For information regarding Intersil Corporation and its products, see web site www.intersil.com 7 |
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