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TDA7278
HIGH-EFFICIENCY CD ACTUATOR DRIVER
WIDE OPERATIVE SUPPLY RANGE (1.6 to 5V) LOW VOLTAGE OPERATION CAPABILITY 4 LOAD DRIVING VOLTAGES PWM REGULATED (STEP DOWN FROM BATTERY) LOW ON RESISTANCE H BRIDGES (2 x 1.6 MAX + 2 x 2.5 MAX) FOR: - FOCUS AND TRACKING ACTUATORS - SLEDGE AND SPINDLE MOTORS SYNCHRONIZABLE SAWTOOTH OSCILLATOR CONFIGURABLE DC/DC CONVERTER FOR ADJUSTABLE MAIN POWER SUPPLY, WITH LOW ON RESISTANCE (0.4 MAX) SWITCH GENERAL ENABLE INPUT ADJUSTABLE WATCH DOG AND DELAYED POWER ON RESET FUNCTIONS
PQFP44
ADJUSTABLE COMPARATORS FOR BATTERY LOW AND BATTERY EMPTY DETECTION
PIN CONNECTION
H OUT 2B H OUT 4B 34 33 32 31 30 29 28 27 26 25 24 23 12 SSCAP 13 INP 14 IRC 15 VCPU 16 OUT1 17 OUT2 18 VBG 19 RESET 20 CRES 21 WDINP 22 STCAP H IN 4 H OUT 4A FLIN 4 VBAT FLIN 3 GND H OUT 3A H IN 3 H OUT 3B ENABLE SYNC ERROR 1 ERROR 2 ERROR 4 36 ERROR 3 35 VREF(2) 38 VREF(1) 37 BLOW 40 VCON 39
44 H IN 2 H OUT 2A FLIN 2 VBAT FLIN 1 GND H OUT 1A H IN 1 H OUT 1B OUT VHIGH 1 2 3 4 5 6 7 8 9 10 11
43
42
41
BEMP
D94AU112A
March 1997
1/15
TDA7278
ABSOLUTE MAXIMUM RATINGS (25C)
Pin Name HIN 1, HIN 2, HIN 3, HIN 4 HOUT 1A, HOUT 2A, HOUT 3A, HOUT 4A, HOUT 1B, HOUT 2B, HOUT 3B, HOUT 4B FLIN 1, FLIN 2, FLIN 3, FLIN 4 ERROR 1, ERROR 2, ERROR 3, ERROR 4, VBAT VREF 1, V REF 2 BLOW, BEMP, VCON OUT, VHIGH OUT 2 OUT 1 SSCAP, IRC, INP VCPU VBG, RESET, CRES, WDINP, STCAP, SYNC EN Min -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 -0.4 Max 8 8 10 7 8 7 7 16 8 16 7 7 7 8 Unit V V V V V V V V V V V V V V
* Pin 1, 8, 12, 14, 20, 26 and 33 are ESD sensitive (max. voltage 1KV)
THERMAL DATA
Symbol Top Tj T j-amb Parameter Operating Temperature range Max. Junction Temperature Thermal Resistance Junction to Ambient Value -25 to 70 100 70 Unit C C C/W
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TDA7278
PIN FUNCTIONS
No 21 20 19 41 40 39 24 18 12 16 17 15 14 13 11 10 22 23 4, 30 6, 28 38 37 5 7 8 9 43 29 27 26 25 35 3 2 1 44 42 Name WDINP CRES RESET BEMP BLOW VCON ENABLE VBG SSCAP OUT 1 OUT 2 VCPU IRC INP VHIGH OUT STCAP SYNC VBAT GND VREF 2 VREF 1 FLIN 1 HOUT 1A HIN 1 HOUT 1B ERROR 1 FLIN 3 HOUT 3A HIN 3 HOUT 3B ERROR 3 FLIN 2 HOUT2A HIN 2 HOUT 2B ERROR 2 Function Watch dog input - AC coupled to WD controller output (Disabled when connected to GND) Start up reset control for C & watch dog time constant Reset output command to C (open collector) Battery empty comparator input Battery low comparator input Battery level control output VCON = Z VBEMP > VBCON > VBG VCON = 1 VBEMP > VBG > VBLOW VCON = 0 VBG > VBEMP > VBLOW General Enable Input (active Low) Reference voltage capacitor Soft start capacitor Switching transistor terminal high Switching transistor terminal low Regulated voltage Error amplifier output Error amplifier inverting input Regulated Voltage Switching transistor output Sawtooth toth Oscillator synchronizing input Power supply voltage Power ground Buffered reference output voltage Reference input voltage Switching Output H bridge positive output Regulated voltage H bridge supply H bridge negative output Error input Switching Output H bridge positive output Regulated voltage H bridge supply H bridge negative output Error input Switching output H bridge positive output Regulated voltage H bridge supply H bridge negative output Error input Spindle motor step down converter & H bridge Tracking actuator step down converter & H bridge Focus actuator step down converter & H bridge Vhigh Boost DC-DC Converter Oscillator VCPU DC-DC converter Battery control circuit Watch dog & reset circuit
Band Gap Reference
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TDA7278
ELECTRICAL CHARACTERISTICS (Tamb = 25C, VBAT = 1.6V unless otherwise specified)
Symbol VBAT Parameter Power Supply (Tamb = 25 to 70C) Test Condition Config. in fig. 3a: VCPU <4V Config. in fig. 3a: VCPU >4V Config. in fig. 3b Config. in fig. 3c Stand-by condition Config. in fig 3a Config. in fig. 3a Config. in fig. 3b Config. in fig. 3c Stand-by condition Config. in fig 3a VCPU = 5V Min. 1.6 1.6 VCPU +0.3 1.6 Typ. Max. VCPU 4 4 4 4 VCPU 5 5 5.5 5 1.5 VBAT = 5V VBAT +4 2.4 I = 1A VCPU < 4.5V Config. fig 3a 150 VBAT +7 0.25 20 VBAT +12 5 0.4 Unit V V V V V V V V V mA mA A V V mA
Power Supply (Tamb = 25 to 60C)
1.6 VCPU +0.3 1.6
VHIGH VCPU (adj)
Current Consumption from VCPU (1) Current Consumption from VBAT (3) Leakage Current in standby condition Output Voltages RON ofDC/DC Converter Switch Max Output Current from VCPU Voltage Ripple on VCPU Oscillator - free freq. - sync. freq - free freq. H_bridge - Ron, actuators (CH 1,3) - Ron, motors (CH 2,4) PWM Circuit - Ron, actuators - Ron, motors Reference Voltage Load Regulation Line Regulation Bridge gain Reset Time Coefficient Error Impedance Inputs VREF2 Load Regulation VREF1 Impedance WINDIP Impedance BEMP & BLOW intervention threshold RESET Voltage Saturation VCON Voltage Saturation
STCAP = 470pF . VBAT = 1.6 to 5V I = 100mA
200 80 180 20 1.0 1.6 1.6 2.5 0.8 1.25 1.34 30 30 4.5 17.2 30 750 30 0.65
KHz KHz KHz V mV mV msec/F k mV k k V mV mV mV
I = 100mA 0.5 0.8 1.28
VBG
AV K ZIN
ILOAD =-10 to+10A; VBAT = 1.6 to 5V From Error to HIN note 2 ILOAD =-1 to+1mA
1.22 -30 2.8 7.4 26 -30
3.6 11 40
0.55 ILOAD =-100A ILOAD =-100A ILOAD =100A
0.75 200 200
VCPU-200
(1): all the 4 PWM outputs switched off. (2) TRESET = width of the Reset pulse on pin 19 = K C, where C is the capacitance on pin 20 (CRES). To avoid reset, the frequency of watch dog pulses must be greater than (3 TRESET)-1 (3) All the 4 PWM output switched OFF, auxiliary and main DC/DC converters polarized but not switching
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TDA7278
Figure 1: Block Diagram.
ERROR 3 35 ERROR 1 43 VREF (1) 37
SYNC 23
VBAT 4
VBAT 30
VHIGH DRIV
VBAT
ST CAP
22
OSCILL
5 S R
VREF (2)
38 ER +
FL IN 1
Q
VHIGH
11 VHIGH DRIV VHIGH DRIV
8
H IN 1
+ 10 -
OUT
7 9
H OUT 1A H OUT 1B
V bg
INP
13
VHIGH DRIV
VBAT
IRC
14
29 S R
FL IN 3
ER 15 16 VHIGH + DRIV OUT2 + 17 12 Vbg -
+
Q
VCPU OUT1
26 VHIGH DRIV VHIGH DRIV 27 25
H IN 3
H OUT 3A H OUT 3B
SSCAP
VHIGH VBAT VBG 18 DRIV
VBAT
3 REFERENCE and THERMAL S R
FL IN 2
ENABLE
24
Vbg
ER
+
Q
1 Vbg/2 + CRES RESET 20 VHIGH DRIV VHIGH DRIV 2 44
H IN 2
H OUT 2A H OUT 2B
19 CONTROL Vbg VBAT
WD INP
21
VHIGH DRIV
BEMP
41 S R
31
FL IN 4
BLOW
40 VCPU + 39 Vbg/2 Vbg/2
ER
+
Q
33 VHIGH DRIV VHIGH DRIV 32 34
H IN 4
+ -
VCON
+ -
H OUT 4A H OUT 4B
6 GND
28 GND
42 ERROR 2 ERROR 4
36
D94AU078B
5/15
TDA7278
Figure 2: Test Circuit
ERROR 3 35 VBAT ERROR 1 43 VREF (1) 37
SYNC 23 ST CAP 470pF VREF (2) 10F VHIGH VBAT 47H 10 OUT 10F AUXIL. STEP UP V bg 11 38 22 4 30
VHIGH DRIV
VBAT
OSCILL
5 S R
FL IN 1
ER
+
Q
100H
8 VHIGH DRIV VHIGH DRIV 7 9
H IN 1 10F
+ -
H OUT 1A H OUT 1B FOCUS ACTUATOR
INP FEEDBAKC & COMPENSATION NETWORK (see fig.4)
13
VHIGH DRIV
VBAT
IRC
14
29 S R
FL IN 3
ER
+
Q
100H
VCPU STEP LP or STEP DOWN STRUCTURE (see fig.3) OUT1
15 16 VHIGH + DRIV + 17 Vbg VHIGH DRIV
26 VHIGH DRIV 27 25
H IN 3 10F
H OUT 3A H OUT 3B TRACKING ACTUATOR
OUT2
SSCAP 2F
12 VBAT
VHIGH DRIV
VBG 100nF ENABLE
18
VBAT
3 S R
FL IN 2
24
REFERENCE and THERMAL
Vbg
ER
+
Q
100H
1 VHIGH DRIV VHIGH DRIV 2 44 19
H IN 2 10F
+ CRES 1F RESET 20 -
H OUT 2A H OUT 2B M SPINDLE MOTOR
CONTROL
Vbg VHIGH DRIV VBAT
WD INP VBAT BEMP
21
41 S R
31
FL IN 4
BLOW
40 VCPU + 39 Vbg/2 Vbg/2
ER
+
Q
100H
33 VHIGH DRIV VHIGH DRIV 32 34
H IN 4 10F
+ -
VCON
+ -
H OUT 4A H OUT 4B M SLEDGE MOTOR
6 GND
28
42 ERROR 2 ERROR 4
36
D94AU111A
6/15
TDA7278
Figure 3: DC - DC Converter Configuration.
VCPU VBAT L
15
VHIGH 16 OUT 1 DRIV
C
OUT 2 17
D94AU081B
a) step-up
VCPU
15
VBAT 16 OUT 1
VHIGH
DRIV L C OUT 2 17
D94AU082B
b) step-down
VCPU VBAT
15
VHIGH C OUT 1 DRIV OUT 2 17
D94AU083B
16
c) with transformer
7/15
TDA7278
Figure 4: DC - DC Converter: Feedback and Compensation Networks.
VCPU SETTING RESISTOR
INP R4 Cf IRC VCPU
13
R
14
Vbg 15
D94AU113A
a) Dominant Pole Compensation
INP R4 C2 Cf Rf R2 IRC VCPU
13
R3
14 15 + Vbg
D94AU114A
b) Extended Bandwidth 2 zero, 2 pole compensation
INP R4 C2 Cf Rf R2 IRC VCPU C1 R1
13
R3
14 15 + Vbg
D94AU115A
c) Extended Bandwidth 2 zero, 3 pole compensation
8/15
TDA7278
SUGGESTED VALUES FOR OUTPUT FILTER AND COMPENSATION NETWORK
DC- DC COVERTER CONFIGURATIONS OUTPUT FILTER (see fig. 3) COMPENSATION (see fig. 4) a) DOMINANT POLE R = 50K Cf = 47nF R4 = 35K STEP-DOWN L = 47H C = 47F b) 2 ZERO, 2 POLE R2 = 11.18K R3 = 100 K C2 = 936pF Rf = 16.65K Cf = 5.6nF R4 = 70K a) DOMINANT POLE R = 100K Cf = 220nF R4 = 70K c) 2 ZERO, 3 POLE L = 47H C = 47F R1 = 500 C1 = 18nF R2 = 20.8K R3 = 250K C2 = 636pF Rf = 21.4K Cf = 7.44nF R4 = 200K c) 2 ZERO, 3 POLE R1 = 500 C1 = 18nF R2 = 10.4K R3 = 250K C2 = 318pF Rf = 21.4K Cf = 3.7nF R4 = 200K
STEP-UP AND TRANSFORMER
L = 11H C = 47F
PINS: 1, 2, 44
PINS: 8, 7,9
12V
12V
1
VHIGH
8 + -
VHIGH
2
7
+ -
44
VHIGH
9
VHIGH
D96AU447A
D96AU448A
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TDA7278
PINS: 25, 26, 27 PINS: 32, 33, 34
12V
12V
26
VHIGH
33 + -
VHIGH
27
32
+ -
25
VHIGH
34
VHIGH
D96AU449A
D96AU450A
PIN: 3
PINS: 5
12V VBAT 4 VHIGH 4
12V VBAT VHIGH
3 VHIGH
5 VHIGH
D96AU451
D96AU452
PIN: 29
PINS: 31
12V VBAT 30 VHIGH 30
12V VBAT VHIGH
29 VHIGH
31 VHIGH
D96AU453
D96AU454
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TDA7278
PINS: 35 PIN: 36
VCPU 35 7V 38
D96AU465
VCPU 36 7V 38
D96AU466
+
+
PIN: 42
PIN: 43
VCPU 42 7V 38
D96AU467
VCPU 43 7V 38
D96AU468
+
+
PIN: 18
PINS: 19
VBAT
VBAT
19
18 7V + REFERENCE
7V
D96AU459
D96AU458
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TDA7278
PINS: 20 PINS: 21
VCPU 1.8
VCPU + -
VCPU VCPU
VCPU + 21 7V VCPU +
20 7V 0.7
VCPU + VCPU 0.6
D96AU460A
+ D96AU461A
PIN: 22
PIN: 23
VBAT 1.3 VBAT + 22
VCPU
7V
VBAT 0.6 + VBAT 0.2
D96AU462
23 7V
D96AU463
+ -
PIN: 24
PINS: 10, 11
17V
VBAT VBAT VBAT
11
+ 24 12V
D96AU464A
10
D96AU474
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TDA7278
PINS: 12, 13, 14
VBAT VBAT VBAT
PINS: 16, 17
13 +
16
12
VBG
17 17V
14 7V
D96AU475
D96AU476
PINS: 37, 38
PIN: 39
VCPU
VCPU VCPU
37
+
-
39
38 7V
D96AU469
7V
D96AU470A
PINS: 40, 41
VBG VCPU + 40 5V VCPU + 7V 41 5V
D96AU471
13/15
TDA7278
PQFP44 (10x10) PACKAGE MECHANICAL DATA
DIM. MIN. A A1 A2 B c D D1 D3 e E E1 E3 L L1 K 0.65 12.95 9.90 0.25 1.95 0.30 0.13 12.95 9.90 13.20 10.00 8.00 0.80 13.20 10.00 8.00 0.80 1.60 0(min.), 7(max.) 0.95 0.026 13.45 10.10 0.510 0.390 2.00 2.10 0.45 0.23 13.45 10.10 mm TYP. MAX. 2.45 0.010 0.077 0.012 0.005 0.51 0.390 0.52 0.394 0.315 0.031 0.520 0.394 0.315 0.031 0.063 0.037 0.530 0.398 0.079 0.083 0.018 0.009 0.53 0.398 MIN. inch TYP. MAX. 0.096
D D1 D3 A1
33 34 23 22
0.10mm .004 Seating Plane
A A2
E3
E1
B
44 1 11
12
E
B C L K
e L1
PQFP44
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TDA7278
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as criticalcomponents in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1997 SGS-THOMSON Microelectronics All Rights Reserved SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands - Singapore Spain - Sweden - Switzerland - Taiwan - Thaliand - United Kingdom - U.S.A.
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