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E2I0031-17-Y1 Semiconductor Semiconductor MSM524208 524,288-Word 8-Bit CMOS STATIC RAM This version: Jan. 1998 MSM524208 Previous version: Aug. 1996 Pr el im in ar y DESCRIPTION The MSM524208 is a 524,288-word by 8-bit CMOS fast static RAM featuring a single 3.3 V power supply operation and direct LVTTL input/output compatibility. Since the circuitry is completely static, external clock and refreshing operations are unnecessary, making this device very easy to use. The MSM524208 can be used in the high-speed operation of an access time 25 ns due to adopting a high-performance CMOS technology. In addition, the MSM524208 is provided with a chip enable signal (CE) suited to the power-down function, and an output enable signal (OE) suited to the I/O bus line control. FEATURES * 524,288-word 8-bit configuration * Single 3.3 V power supply * Fully static operation * Operating temperature range: Ta = 0C to 70C * Power dissipation Standby: 10 mA (Max.) Operation: - 25 180 mA (Max.) - 30 170 mA (Max.) - 35 160 mA (Max.) * Access time: - 25 25 ns (Max.) - 30 30 ns (Max.) - 35 35 ns (Max.) * (Input/Output) LVTTL compatible * Power-down function by chip enable signal * 3-state output * Package: 36-pin 400 mil plastic SOJ (SOJ36-P-400-1.27) (Product : MSM524208-xxJS) xx indicates speed rank. PRODUCT FAMILY Family MSM524208-25 MSM524208-30 MSM524208-35 Access Time (Max.) 25 ns 30 ns 35 ns Package 400 mil 36-pin SOJ 1/10 Semiconductor MSM524208 PIN CONFIGURATION (TOP VIEW) A0 1 A1 2 A2 3 A3 4 A4 5 CE 6 I/O1 7 I/O2 8 VCC 9 VSS 10 I/O3 11 I/O4 12 WE 13 A5 14 A6 15 A7 16 A8 17 A9 18 36 NC 35 A18 34 A17 33 A16 32 A15 31 OE 30 I/O8 29 I/O7 28 VSS 27 VCC 26 I/O6 25 I/O5 24 A14 23 A13 22 A12 21 A11 20 A10 19 NC 36-Pin Plastic SOJ Pin Name A0 - A18 I/O1 - I/O8 CE OE WE VCC, VSS NC Function Address Input Data Input/Output Chip Enable Output Enable Write Enable Power Supply No Connection 2/10 Semiconductor MSM524208 BLOCK DIAGRAM A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8 Input Data Control Column I/O Circuits Column Select Row Select Memory Array 1024 Rows 512 Columns 8 Blocks VCC VSS A10 A11 A12 A13 A14 A15 A16 A17 A18 CE WE OE FUNCTION TABLE Operating Mode Standby Read Cycle Write Cycle CE H L L L WE * H H L OE * H L * Operating Contents Output Floating Output Floating Data Read Data Write *Don't Care ("H" or "L") 3/10 Semiconductor MSM524208 ELECTRICAL CHARACTERISTICS Absolute Maximum Ratings Parameter Power Supply Voltage Pin Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VCC VT PD Topr Tstg Condition Ta = 25C, for VSS Ta = 25C -- -- Rating -0.5 to 4.6 -0.5* to VCC + 0.5 1.0 0 to 70 -55 to 125 Unit V V W C C * -2.0 V Min. for pulse width less than 10 ns. Recommended Operating Conditions Parameter Power Supply Voltage Input High Voltage Input Low Voltage Load Capacitance Symbol VCC VSS VIH VIL CL Condition -- VCC = 3.3 V 0.3 V -- Min. 3.0 0 2.0 -0.3* -- Typ. 3.3 0 -- -- -- Max. 3.6 0 VCC + 0.3 0.8 30 Unit V V V V pF * -2.0 V Min. for pulse width less than 10 ns. Capacitance (Ta = 25C, f = 1 MHz) Parameter Input Capacitance Input/Output Capacitance Symbol CI CI/O Condition VIN = 0 V VI/O = 0 V Min. -- -- Max. 8 8 Unit pF pF Note: This parameter is periodically sampled and not 100% tested. 4/10 Semiconductor DC Characteristics MSM524208 (VCC = 3.3 V 0.3 V, Ta = 0C to 70C) Parameter Input Leakage Current Input/Output Leakage Current Output High Voltage Output Low Voltage Standby Power Supply Current ICCS1 Operating Power Supply Current ICCA Symbol ILI ILO VOH VOL ICCS Condition VI = 0 to VCC CE = VIH or OE = VIH, VI/O = 0 to VCC IOH = -2 mA IOL = 2 mA CE VCC - 0.2 V, VIN 0.2 V or VIN VCC - 0.2 V CE = VIH, Min. cycle Min. cycle, IOUT = 0 mA Min. -10 -10 2.4 -- -- -- -- MSM524208 Typ. Max. -- -- -- -- -- -- -- 10 10 -- 0.4 10 40 q Unit mA mA V V mA mA mA 180 mA 170 mA 160 mA q 524208-25 524208-30 524208-35 AC Characteristics Test Conditions Parameter Input Pulse Level Input Rise and Fall Times Input/Output Timing Level Output Load Condition VIH = 3 V, VIL = 0 V 3 ns 1.4 V See Figures 1.4 V 500 W DOUT 30 pF (Including scope and jig) DOUT 1.4 V 500 W 5 pF (Including scope and jig) Figure 1 Output Load Figure 2 Output Load (tOLZ, tCLZ, tOHZ, tCHZ, tWLZ, tWHZ) 5/10 Semiconductor Read Cycle MSM524208 (VCC = 3.3 V 0.3 V, Ta = 0C to 70C) MSM524208-25 Parameter Read Cycle Time Address Access Time CE Access Time OE Access Time CE to Output in Low-Z OE to Output in Low-Z Output Hold Time from Address Change CE to Output in High-Z OE to Output in High-Z Symbol tRC tAA tCO tOE tCLZ tOLZ tOH tCHZ tOHZ Min. 25 -- -- -- 5 0 5 -- -- Max. -- 25 25 12 -- -- -- 12 12 MSM524208-30 Min. 30 -- -- -- 5 0 5 -- -- Max. -- 30 30 15 -- -- -- 14 14 MSM524208-35 Min. 35 -- -- -- 5 0 5 -- -- Max. -- 35 35 17 -- -- -- 15 15 Unit ns ns ns ns ns ns ns ns ns Address Controlled Read (WE = H, CE = L, OE = L) tRC ADDRESS tAA tOH DOUT Dataout Valid 6/10 , , Semiconductor CE, OE Controlled Read (WE = H) tRC ADDRESS tAA tCHZ CE tCO tCLZ OE tOE tOHZ DOUT Dataout Valid tOLZ tOH MSM524208 Notes : 1. A read cycle occurs during the overlap of CE = "L", OE = "L" and WE = "H". 2. tCHZ and tOHZ are specified by the time when DATA is floating, not defined by the output level. 7/10 Semiconductor Write Cycle Parameter Write Cycle Time Address Setup Time Write Pulse Width Write Recovery Time Data Setup Time Data Hold Time WE to Output in High-Z CE to End of Write WE CE Symbol tWC tAS tWP tWR tDS tDH tWHZ tCW tAW MSM524208 (VCC = 3.3 V 0.3 V, Ta = 0C to 70C) MSM524208-25 MSM524208-30 MSM524208-35 Min. 25 0 15 3 3 12 0 -- 17 0 Max. -- -- -- -- -- -- -- 10 -- Min. 30 0 20 3 3 14 0 -- 22 0 Max. -- -- -- -- -- -- -- 12 -- Min. 35 0 25 3 3 16 0 -- 27 0 Max. -- -- -- -- -- -- -- 14 -- Unit ns ns ns ns ns ns ns ns , , Address Valid to End of Write 17 -- 22 -- 27 -- ns Output Active from End of Write tWLZ -- -- -- ns WE Controlled Write (OE = L) tWC ADDRESS tCW CE tAW WE tAS tWR tWP tWLZ DOUT tDS tDH tWHZ DIN Data In 8/10 Semiconductor CE Controlled Write (OE = H) tWC ADDRESS tAS CE tCW MSM524208 WE DIN DOUT Notes: tAW tWR tWP tDS tDH Data In High Impedance 1. 2. 3. 4. 5. 6. A write cycle occurs during the overlap of CE = "L" and WE = "L". OE may be either of "H" or "L" in the write cycle. tAS is specified from CE = "L" or WE = "L", whichever occurs last. tWP is an overlap time of CE = "L" and WE = "L". tWR, tDS and tDH are specified from CE = "H" or WE = "H", whichever occurs first. tWHZ is specified by the time when DATA output is floating, not defined by the output level. 7. When I/O pins are in the output mode, don't apply the inverted input signal to the output pins. 9/10 Semiconductor MSM524208 PACKAGE DIMENSIONS (Unit : mm) SOJ36-P-400-1.27 Package material Lead frame material Pin treatment Solder plate thickness Package weight (g) Epoxy resin Cu alloy Solder plating 5 mm or more 1.40 TYP. Notes for Mounting the Surface Mount Type Package The SOP, QFP, TSOP, SOJ, QFJ (PLCC), SHP and BGA are surface mount type packages, which are very susceptible to heat in reflow mounting and humidity absorbed in storage. Therefore, before you perform reflow mounting, contact Oki's responsible sales person for the product name, package name, pin number, package code and desired mounting conditions (reflow method, temperature and times). 10/10 |
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