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| BUK9245-55A TrenchMOSTM logic level FET Rev. 01 -- 11 October 2001 M3D300 Product data 1. Description N-channel enhancement mode field-effect power transistor in a plastic package using TrenchMOSTM1 technology, featuring very low on-state resistance. Product availability: BUK9245-55A in SOT428 (D-PAK). 2. Features s s s s TrenchMOSTM technology Q101 compliant 175 C rated Logic level compatible. 3. Applications s Automotive and general purpose power switching: x 12 V and 24 V loads x Motors, lamps and solenoids. 4. Pinning information Table 1: Pin 1 2 3 mb Pinning - SOT428 (D-PAK), simplified outline and symbol Description gate (g) drain (d) source (s) mounting base; connected to drain (d) 1 Top view g s mb d Simplified outline Symbol MBB076 2 3 MBK091 SOT428 (D-PAK) 1. TrenchMOS is a trademark of Koninklijke Philips Electronics N.V. Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 5. Quick reference data Table 2: VDS ID Ptot Tj RDSon Quick reference data Conditions Tmb = 25 C; VGS = 5 V Tmb = 25 C Tj = 25 C; VGS = 5 V; ID = 5 A Tj = 25 C; VGS = 4.5 V; ID = 5 A Tj = 25 C; VGS = 10 V; ID = 5 A Typ - - - - 31 - 27 Max 55 28 70 175 45 50 40 Unit V A W C m m m drain-source voltage (DC) drain current (DC) total power dissipation junction temperature drain-source on-state resistance Symbol Parameter 6. Limiting values Table 3: Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter VDS VDGR VGS ID drain-source voltage (DC) drain-gate voltage (DC) gate-source voltage (DC) drain current (DC) Tmb = 25 C; VGS = 5 V; Figure 2 and 3 Tmb = 100 C; VGS = 5 V; Figure 2 IDM Ptot Tstg Tj IDR IDRM WDSS peak drain current total power dissipation storage temperature operating junction temperature reverse drain current (DC) pulsed reverse drain current non-repetitive avalanche energy Tmb = 25 C Tmb = 25 C; pulsed; tp 10 s unclamped inductive load; ID = 28 A; VDS 55 V; VGS = 5 V; RGS = 50 ; starting Tj = 25 C Tmb = 25 C; pulsed; tp 10 s; Figure 3 Tmb = 25 C; Figure 1 RGS = 20 k Conditions Min - - - - - - - -55 -55 - - - Max 55 55 15 28 20 112 70 +175 +175 28 112 62 Unit V V V A A A W C C A A mJ Source-drain diode Avalanche ruggedness 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 2 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 120 Pder (%) 80 03aa16 30 ID (A) 25 03ng00 20 15 40 10 5 0 0 50 100 150 200 Tmb ( C) o 0 25 50 75 100 125 150 175 200 Tj (C) P tot P der = ---------------------- x 100% P tot ( 25 C ) VGS 4.5 V ID I der = ------------------- x 100% I D ( 25 C ) Fig 1. Normalized total power dissipation as a function of mounting base temperature. Fig 2. Continuous drain current as a function of mounting base temperature. 103 03nf98 ID (A) 102 RDSon = VDS / ID tp = 10 s 100 s 10 DC 1 ms 10 ms 100 ms 1 1 10 VDS (V) 102 Tmb = 25 C; IDM is single pulse. Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage. 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 3 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 7. Thermal characteristics Table 4: Symbol Rth(j-a) Rth(j-mb) Thermal characteristics Parameter thermal resistance from junction to ambient thermal resistance from junction to mounting Figure 4 base Conditions Value 71.4 2.1 Unit K/W K/W 7.1 Transient thermal impedance 10 03nf99 Zth(j-mb) (K/W) 1 = 0.5 0.2 0.1 0.05 10-1 0.02 P = tp T Single Shot 10-2 10-6 10-5 10-4 10-3 10-2 10-1 tp T t tp (s) 1 Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration. 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 4 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 8. Characteristics Table 5: Characteristics Tj = 25 C unless otherwise specified Symbol V(BR)DSS Parameter drain-source breakdown voltage Conditions ID = 0.25 mA; VGS = 0 V Tj = 25 C Tj = -55 C VGS(th) gate-source threshold voltage ID = 1 mA; VDS = VGS; Figure 9 Tj = 25 C Tj = 175 C Tj = -55 C IDSS drain-source leakage current VDS = 55 V; VGS = 0 V Tj = 25 C Tj = 175 C IGSS RDSon gate-source leakage current drain-source on-state resistance VGS = 10 V; VDS = 0 V VGS = 5 V; ID = 5 A; Figure 7 and 8 Tj = 25 C Tj = 175 C VGS = 4.5 V; ID = 5 A VGS = 10 V; ID = 5 A Dynamic characteristics Qg(tot) Qgs Qgd Ciss Coss Crss td(on) tr td(off) tf Ld Ls total gate charge gate-to-source charge gate-to-drain (Miller) charge input capacitance output capacitance reverse transfer capacitance turn-on delay time rise time turn-off delay time fall time internal drain inductance internal source inductance measured from drain to centre of die measured from source lead to source bond pad VDD = 30 V; RL = 1.2 ; VGS = 5 V; RG = 10 VGS = 0 V; VDS = 25 V; f = 1 MHz; Figure 12 VGS = 5 V; VDD = 44 V; ID = 5 A; Figure 14 - - - - - - - - - - - - 14 1.6 6.3 750 140 97 10 132 38 112 2.5 7.5 - - - 1006 166 132 - - - - - - nC nC nC pF pF pF ns ns ns ns nH nH - - - - 31 - - 27 45 90 50 40 m m m m - - - 0.05 - 2 10 500 100 A A nA 1 0.5 - 1.5 - - 2 - 2.3 V V V 55 50 - - - - V V Min Typ Max Unit Static characteristics 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 5 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET Table 5: Characteristics...continued Tj = 25 C unless otherwise specified Symbol VSD trr Qr Parameter source-drain (diode forward) voltage reverse recovery time recovered charge Conditions IS = 8 A; VGS = 0 V; Figure 15 IS = 20 A; dIS/dt = -100 A/s VGS = -10 V; VDS = 30 V Min - - - Typ 0.85 50 53 Max 1.2 - - Unit V ns nC Source-drain diode 80 ID (A) 60 8 6 03nf95 45 RDSon (m) 03nf94 VGS (V) = 10 5 40 40 4 35 20 3 30 2.2 0 0 2 4 6 8 10 VDS (V) 25 3 6 9 12 VGS (V) 15 Tj = 25 C Tj = 25 C; ID = 5 A Fig 5. Output characteristics: drain current as a function of drain-source voltage; typical values. Fig 6. Drain-source on-state resistance as a function of gate-source voltage; typical values. 100 RDSon V GS (V) = 3 (m) 80 3.4 3.8 4 5 03nf96 2 a 03ne89 1.5 60 1 40 0.5 20 0 0 20 40 60 ID (A) 80 0 -60 0 60 120 Tj (C) 180 Tj = 25 C R DSon a = ---------------------------R DSon ( 25 C ) Fig 8. Normalized drain-source on-state resistance factor as a function of junction temperature. (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Fig 7. Drain-source on-state resistance as a function of drain current; typical values. 9397 750 08559 Product data Rev. 01 -- 11 October 2001 6 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 03aa33 2.5 VGS(th) (V) 2 max 10-1 ID (A) 10-2 03aa36 typ 1.5 10-3 min typ max 1 min 10-4 0.5 10-5 0 -60 0 60 120 Tj ( C) o 10-6 180 0 0.5 1 1.5 2 2.5 3 VGS (V) ID = 1 mA; VDS = VGS Tj = 25 C; VDS = VGS Fig 9. Gate-source threshold voltage as a function of junction temperature. Fig 10. Sub-threshold drain current as a function of gate-source voltage. 20 gfs (S) 15 03nf92 2100 C (pF) 1800 1500 1200 Ciss 03nf97 10 900 Coss 600 300 Crss 5 0 0 5 10 15 20 ID (A) 25 0 10-2 10-1 1 10 VDS (V) 102 Tj = 25 C; VDS = 25 V VGS = 0 V; f = 1 MHz Fig 11. Forward transconductance as a function of drain current; typical values. Fig 12. Input, output and reverse transfer capacitances as a function of drain-source voltage; typical values. 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 7 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 20 ID (A) 15 03nf93 5 VGS (V) 4 VDD = 14 V 3 03nf91 10 2 VDD = 44 V 5 1 Tj = 175 C 0 0 1 2 3 VGS (V) 4 Tj = 25 C 0 0 3 6 9 12 15 QG (nC) VDS = 25 V Tj = 25 C; ID = 5 A Fig 13. Transfer characteristics: drain current as a function of gate-source voltage; typical values. Fig 14. Gate-source voltage as a function of turn-on gate charge; typical values. 20 IS (A) 15 03nf90 10 5 Tj = 175 C Tj = 25 C 0 0.0 0.2 0.4 0.6 0.8 1.0 VSD (V) VGS = 0 V Fig 15. Reverse diode current as a function of reverse diode voltage; typical values. 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 8 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 9. Package outline Plastic single-ended surface mounted package (Philips version of D-PAK); 3 leads (one lead cropped) SOT428 seating plane y A E b2 A A1 mounting base A2 D1 E1 D HE L2 2 L L1 1 b1 e e1 b 3 wM A c 0 10 scale 20 mm DIMENSIONS (mm are the original dimensions) A UNIT max. mm 2.38 2.22 A1(1) 0.65 0.45 A2 0.89 0.71 b 0.89 0.71 b1 max. 1.1 0.9 b2 5.36 5.26 c 0.4 0.2 D1 E D max. max. max. 6.22 5.98 4.81 4.45 6.73 6.47 E1 min. 4.0 e e1 HE max. 10.4 9.6 L 2.95 2.55 L1 min. 0.5 L2 0.7 0.5 w 0.2 y max. 0.2 2.285 4.57 Note 1. Measured from heatsink back to lead. OUTLINE VERSION SOT428 REFERENCES IEC JEDEC TO-252 EIAJ SC-63 EUROPEAN PROJECTION ISSUE DATE 98-04-07 99-09-13 Fig 16. SOT428 (D-PAK). 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 9 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 10. Revision history Table 6: Rev Date 01 20011011 Revision history CPCN Description Product data; initial version. 9397 750 08559 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 10 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET 11. Data sheet status Data sheet status[1] Objective data Preliminary data Product status[2] Development Qualification Definition This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Product data Production [1] [2] Please consult the most recently issued data sheet before initiating or completing a design. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 12. Definitions Short-form specification -- The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition -- Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information -- Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. 13. Disclaimers Life support -- These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes -- Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. Contact information For additional information, please visit http://www.semiconductors.philips.com. For sales office addresses, send e-mail to: sales.addresses@www.semiconductors.philips.com. 9397 750 08559 Fax: +31 40 27 24825 (c) Koninklijke Philips Electronics N.V. 2001. All rights reserved. Product data Rev. 01 -- 11 October 2001 11 of 12 Philips Semiconductors BUK9245-55A TrenchMOSTM logic level FET Contents 1 2 3 4 5 6 7 7.1 8 9 10 11 12 13 Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Pinning information . . . . . . . . . . . . . . . . . . . . . . 1 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 2 Thermal characteristics. . . . . . . . . . . . . . . . . . . 4 Transient thermal impedance . . . . . . . . . . . . . . 4 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 9 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 (c) Koninklijke Philips Electronics N.V. 2001. Printed in The Netherlands All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Date of release: 11 October 2001 Document order number: 9397 750 08559 |
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