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| DISCRETE SEMICONDUCTORS DATA SHEET M3D315 PHC2300 Complementary enhancement mode MOS transistors Product specification Supersedes data of 1997 Oct 24 2002 Jul 09 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors FEATURES * High-speed switching * No secondary breakdown. APPLICATIONS * Universal line interface in telephone sets * Relay, high-speed and line transformer drivers. DESCRIPTION One N-channel and one P-channel enhancement mode MOS transistor in an 8-pin plastic SOT96-1 (SO8) package. CAUTION The device is supplied in an antistatic package. The gate-source input must be protected against static discharge during transport or handling. 1 4 MAM118 PHC2300 PINNING - SOT96-1 (SO8) PIN 1 2 3 4 5 6 7 8 SYMBOL s1 g1 s2 g2 d2 d2 d1 d1 DESCRIPTION source 1 gate 1 source 2 gate 2 drain 2 drain 2 drain 1 drain 1 8 handbook, halfpage 5 d1 d1 d2 d2 s1 g1 s2 g2 Fig.1 Simplified outline and symbol. QUICK REFERENCE DATA SYMBOL Per FET VDS drain-source voltage (DC) N-channel P-channel VGS VGSth gate-source voltage (DC) gate-source threshold voltage N-channel P-channel ID drain current (DC) N-channel P-channel RDSon drain-source on-state resistance N-channel P-channel Ptot total power dissipation VGS = 10 V; ID = 170 mA VGS = -10 V; ID = -115 mA Ts = 80 C - - - 6 17 1.6 W VDS = VGS; ID = 1 mA VDS = VGS ; ID = -1 mA Ts = 80 C - - 340 -235 mA mA 0.8 -0.8 2 -2 - - - 300 -300 20 V V V V V V PARAMETER CONDITIONS MIN. MAX. UNIT 2002 Jul 09 2 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL Per FET VDS drain-source voltage (DC) N-channel P-channel VGS ID gate-source voltage (DC) drain current (DC) N-channel P-channel IDM peak drain current N-channel P-channel Ptot total power dissipation Ts = 80 C; note 3 Tamb = 25 C; note 4 Tamb = 25 C; note 5 Tamb = 25 C; note 6 Tstg Tj Notes 1. Ts is the temperature at the soldering point of the drain leads. 2. Pulse width and duty cycle limited by maximum junction temperature. storage temperature operating junction temperature note 2 - - - - - - -55 -55 Ts = 80 C; note 1 - - - - - PARAMETER CONDITIONS MIN. PHC2300 MAX. UNIT 300 -300 20 340 -235 1.4 -0.9 1.6 1.8 0.9 1.2 +150 +150 V V V mA mA A A W W W W C C 3. Maximum permissible dissipation per MOS transistor (both devices may thus be loaded up to 1.6 W at the same time). 4. Maximum permissible dissipation per MOS transistor. Value based on a printed-circuit board with an Rth a-tp (ambient to tie-point) of 27.5 K/W. 5. Maximum permissible dissipation per MOS transistor. Value based on a printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W. 6. Maximum permissible dissipation if only one MOS transistor dissipates. Value based on a printed-circuit board with an Rth a-tp (ambient to tie-point) of 90 K/W. 2002 Jul 09 3 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, halfpage 2 MDA235 MDA240 Ptot handbook, halfpage 10 (W) 1.6 ID (A) 1 (1) 1.2 10-1 0.8 10-2 0.4 tp 0 0 40 80 120 Ts (C) 160 10-3 1 T 10 102 VDS (V) 103 t P = T tp DC = 0.01; Ts = 80 C. (1) RDSon limitation. Fig.2 Power derating curve. Fig.3 SOAR; N-channel. handbook, halfpage -10 ID (A) -1 MGL245 -10-1 P -10-2 (1) = T tp DC tp -10-3 -1 T -10 t -102 VDS (V) -103 = 0.01; Ts = 80 C. (1) RDSon limitation. Fig.4 SOAR; P-channel. 2002 Jul 09 4 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors THERMAL CHARACTERISTICS SYMBOL Rth j-s PARAMETER thermal resistance from junction to soldering point VALUE 43 PHC2300 UNIT K/W 102 handbook, full pagewidth Rth js (K/W) (1) (2) (3) (4) MDA244 10 (5) (6) (7) 1 (8) (9) P = tp T (10) tp T 10-1 10-6 10-5 10-4 10-3 10-2 10-1 t tp (s) 1 (1) = 1.00. (6) = 0.1. (2) = 0.75. (7) = 0.05. (3) = 0.5. (8) = 0.02. (4) = 0.33. (9) = 0.01. (5) = 0.2. (10) = 0. Fig.5 Transient thermal resistance from junction to soldering point as a function of pulse time for N- and P-channel; typical values. CHARACTERISTICS Tj = 25 C unless otherwise specified. SYMBOL Per FET V(BR)DSS drain-source breakdown voltage N-channel P-channel VGSth gate-source threshold voltage N-channel P-channel IDSS drain-source leakage current N-channel P-channel VGS = 0; VDS = 240 V VGS = 0; VDS = -240 V - - - - 100 -100 nA nA VGS = VDS ; ID = 1 mA VGS = VDS ; ID = -1 mA 0.8 -0.8 - - 2 -2 V V VGS = 0; ID = 10 A VGS = 0; ID = -10 A 300 -300 - - - - V V PARAMETER CONDITIONS MIN. TYP. MAX. UNIT 2002 Jul 09 5 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors SYMBOL IGSS PARAMETER gate leakage current N-channel P-channel RDSon drain-source on-state resistance N-channel P-channel Ciss input capacitance N-channel P-channel Coss output capacitance N-channel P-channel Crss reverse transfer capacitance N-channel P-channel QG total gate charge N-channel P-channel QGS gate-source charge N-channel P-channel QGD gate-drain charge N-channel P-channel Switching times ton turn-on time N-channel P-channel toff turn-off time N-channel P-channel VGS = 10 to 0 V; VDD = 50 V; ID = 170 mA VGS = -10 to 0 V; VDD = -50 V; ID = -115 mA - - 53 25 VGS = 0 to 10 V; VDD = 50 V; ID = 170 mA VGS = 0 to -10 V; VDD = -50 V; ID = -115 mA - - 7 4 VGS = 10 V; VDS = 50 V; ID = 170 mA - VGS = 10 V; VDS = 50 V; ID = 170 mA - 226 68 VGS = 10 V; VDS = 50 V; ID = 170 mA - VGS = 0; VDS = 50 V; f = 1 MHz VGS = 0; VDS = -50 V; f = 1 MHz - - 7.3 3 VGS = 0; VDS = 50 V; f = 1 MHz VGS = 0; VDS = -50 V; f = 1 MHz - - 15 15 VGS = 0; VDS = 50 V; f = 1 MHz VGS = 0; VDS = -50 V; f = 1 MHz - - 102 45 VGS = 10 V; ID = 170 mA VGS = -10 V; ID = - 115 mA - - - - CONDITIONS VGS = 20 V; VDS = 0 - - - - MIN. PHC2300 TYP. MAX. UNIT 100 100 6 17 - - - - - - - - - - - - nA nA pF pF pF pF pF pF pC pC pC pC pC pC 6240 2137 VGS = -10 V; VDS = -50 V; ID = -115 mA - VGS = -10 V; VDS = -50 V; ID = -115 mA - 1385 674 VGS = -10 V; VDS = -50 V; ID = -115 mA - 12 10 ns ns 65 35 ns ns 2002 Jul 09 6 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, full pagewidth VDD Vin RL Vout 0 90 % 10 % 90 % Vin Vout 10 % 0 td(on) tf MAM274 td(off) tr toff ton Fig.6 Switching times test circuit with input and output waveforms; N-channel. handbook, full pagewidth 0 -VDD Vin 10 % RL Vout 0 10 % Vout Vin td(on) tr ton 90 % 90 % 10 % 90 % td(off) tf toff MGD391 Fig.7 Switching times test circuit with input and output waveforms; P-channel. 2002 Jul 09 7 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, halfpage 1200 ID MLD841 VGS = 10 V 5V 4V 3.5 V 3V handbook, halfpage -800 ID (mA) -600 MBH441 VGS = -10 V (mA) 800 -4.5 V -4.0 V -400 -3.5 V -3.0 V 400 2.5 V -200 -2.5 V -2.0 V 2V 0 0 4 8 VDS (V) 12 0 0 -2 -4 -6 -8 -10 -12 VDS (V) Tamb = 25 C; tp = 80 s; = 0. Tamb = 25 C; tp = 80 s; = 0. Fig.8 Output characteristics; N-channel; typical values. Fig.9 Output characteristics; P-channel; typical values. handbook, halfpage 1200 ID MLD842 handbook, halfpage -800 ID (mA) -600 MBH440 (mA) 800 -400 400 -200 0 0 2 4 6 8 10 VGS (V) 0 0 -2 -4 -6 -8 -10 VGS (V) VDS = 10 V; Tamb = 25 C; tp = 80 s; = 0. VDS = -10 V; Tamb = 25 C; tp = 80 s; = 0. Fig.10 Transfer characteristic; N-channel; typical values. Fig.11 Transfer characteristic; P-channel; typical values. 2002 Jul 09 8 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, halfpage 200 MLD843 handbook, halfpage 160 MDA236 C (pF) 150 C (pF) 120 Ciss 100 80 Ciss 50 Coss Crss 0 0 5 10 15 20 25 VDS (V) 40 Coss Crss 0 0 -5 -10 -15 -20 -25 VDS (V) f = 1 MHz; Tamb = 25 C. f = 1 MHz; Tamb = 25 C. Fig.12 Capacitance as a function of drain-source voltage; N-channel typical values. Fig.13 Capacitance as a function of drain-source voltage; P-channel typical values. handbook, halfpage 12 MLD844 50 VDS (V) 37.5 handbook, halfpage 12 MLD845 50 VDS (V) 37.5 VGS (V) 8 VGS (V) 8 25 (1) (2) (1) (2) 25 4 12.5 4 12.5 0 0 1560 3120 0 6240 4680 QG (pC) 0 0 535 1070 0 2140 1605 QG (pC) VDD = 50 V; ID = 170 mA; Tamb = 25 C. (1) VDS. (2) VGS. VDD = -50 V; ID = -115 mA; Tamb = 25 C. (1) VDS. (2) VGS. Fig.14 Gate-source voltage and drain-source voltage as a function of total gate charge; N-channel typical values. Fig.15 Gate-source voltage and drain-source voltage as a function of total gate charge; P-channel typical values. 2002 Jul 09 9 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, halfpage 0.5 MDA238 ISD handbook, halfpage -0.5 ISD MDA239 (A) 0.4 (A) -0.4 0.3 -0.3 0.2 -0.2 0.1 -0.1 0 0 0.2 0.4 0.6 0.8 1 VSD (V) 0 0 -0.4 -0.8 VSD (V) -1.2 VGD = 0 V. VGD = 0 V. Fig.16 Source-drain current as a function of source-drain diode forward voltage; N-channel typical values. Fig.17 Source-drain current as a function of source-drain diode forward voltage; P-channel typical values. 102 handbook, halfpage MLD846 (1) (2) (3) 102 handbook, halfpage RDSon () MDA233 RDSon () (4) (5) (1) (2) (3) (4) (5) 10 10 1 0 2 4 6 8 10 VGS (V) 1 0 -2 -4 -6 -8 -10 VGS (V) VDS ID x RDSon; Tamb = 25 C; tp = 300 s; = 0. (1) ID = 10 mA. (2) ID = 20 mA. (3) ID = 50 mA. (4) ID = 100 mA. (5) ID = 200 mA. VDS ID x RDSon; Tamb = 25 C; tp = 300 s; = 0. (1) ID = -10 mA. (2) ID = -20 mA. (3) ID = -50 mA. (4) ID = -100 mA. (5) ID = -200 mA. Fig.18 Drain-source on-state resistance as a function of gate-source voltage; N-channel typical values. Fig.19 Drain-source on-state resistance as a function of gate-source voltage; P-channel typical values. 2002 Jul 09 10 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, halfpage 1.25 k MLD847 MBH438 handbook, halfpage 1.4 k 1.2 1 0.75 1.0 0.5 0.8 0.25 0 -50 0 50 100 Tj (C) 150 0.6 -75 -25 25 75 125 175 Tj (C) V GSth at T j k = ------------------------------------V GSth at 25C VGSth at VDS = VGS; ID = 1 mA. V GSth at T j k = ------------------------------------V GSth at 25C VGSth at VDS = VGS; ID = -1 mA. Fig.20 Temperature coefficient of gate-source threshold voltage as a function of junction temperature; N-channel, typical values. Fig.21 Temperature coefficient of gate-source threshold voltage as function of junction temperature; P-channel typical values. 2002 Jul 09 11 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PHC2300 handbook, halfpage 2 MLD848 MBH439 handbook, halfpage 2.4 k 1.5 k (1) 2.0 (1) (2) (2) 1.6 1 1.2 0.5 0.8 0 -50 0 50 100 Tj (C) 150 0.4 -75 -25 25 75 125 175 Tj (C) R DSon at T j k = ---------------------------------------R DSon at 25 C (1) RDSon at VGS = 10 V; ID = 250 mA. (2) RDSon at VGS = 2.4 V; ID = 20 mA. R DSon at T j k = ---------------------------------------R DSon at 25 C (1) RDSon at VGS = -4.5 V; ID = -80 mA. (2) RDSon at VGS = -2.8 V; ID = -50 mA. Fig.22 Temperature coefficient of drain-source on-resistance as a function of junction temperature; N-channel typical values. Fig.23 Temperature coefficient of drain-source on-resistance as a function of junction temperature; P-channel typical values. 2002 Jul 09 12 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors PACKAGE OUTLINE SO8: plastic small outline package; 8 leads; body width 3.9 mm PHC2300 SOT96-1 D E A X c y HE vMA Z 8 5 Q A2 A1 pin 1 index Lp 1 e bp 4 wM L detail X (A 3) A 0 2.5 scale 5 mm DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT96-1 REFERENCES IEC 076E03 JEDEC MS-012 EIAJ EUROPEAN PROJECTION A max. 1.75 A1 0.25 0.10 A2 1.45 1.25 A3 0.25 0.01 bp 0.49 0.36 c 0.25 0.19 D (1) 5.0 4.8 0.20 0.19 E (2) 4.0 3.8 0.16 0.15 e 1.27 HE 6.2 5.8 L 1.05 Lp 1.0 0.4 Q 0.7 0.6 v 0.25 0.01 w 0.25 0.01 y 0.1 Z (1) 0.7 0.3 0.010 0.057 0.069 0.004 0.049 0.019 0.0100 0.014 0.0075 0.244 0.039 0.028 0.050 0.041 0.228 0.016 0.024 0.028 0.004 0.012 8 0o o ISSUE DATE 97-05-22 99-12-27 2002 Jul 09 13 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors DATA SHEET STATUS DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2) Development DEFINITIONS PHC2300 This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Changes will be communicated according to the Customer Product/Process Change Notification (CPCN) procedure SNW-SQ-650A. Preliminary data Qualification Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2002 Jul 09 14 Philips Semiconductors Product specification Complementary enhancement mode MOS transistors NOTES PHC2300 2002 Jul 09 15 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. (c) Koninklijke Philips Electronics N.V. 2002 SCA74 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands 613510/03/pp16 Date of release: 2002 Jul 09 Document order number: 9397 750 09912 |
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