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| New 3D Y/C Separation, TBC, and Frame Synchronizer Functions Built into Single Chip Video Digital Conversion LSI MN673744(HL) Overview Analog video signals, such as NTSC and PAL analog video signals, are input into the MN673744(HL) and converted into Rec.656 output signals that meet international standards of digital video signals. Feature Improved processing precision of both 2D and 3D Y/C separation : 9 bits A single clock fixed at 27 MHz is used from the A/D conversion to Rec.656 output stages. A time base corrector (TBC) with a function of velocity error correction is provided to ensure the correct time axis on the whole screen. A frame synchronizer is provided to convert all input signals into standard signals perfectly. It requires a single SDRAM (capacity: 16-Mbit; clock frequency: 108 MHz) externally. Applications Disc recorders with hard discs or DVDs employed, screen displays such as TV and PDP units, and PCs with AV functions. Block Diagram SDRAM (16-Mbit) 27 MHz Xtal Y 3D Y/C Separation SDRAM I/F CPN Y CPS ADC D/D Conversion C Color Demodulation Amplitude Compression D/D Conversion TBC Frame Synchronizer YNR CNR REC656 I/F Rec.656 out CPN C AN 13300A ADC D/D Conversion CPS/CPN Coefficient Control Amplitude Detection Sync Signal Processing Copyright Signal Detection HS, VS and others Rec.656 in DAC DAC DAC Clamp ACC DC Detection AGC Amplitude Detection MV, CGMS, WSS and others Register Setting Microcontroller Interface Microcontroller Products and specifications are subject to change without notice. Please ask for the latest Product Standards to guarantee the satisfaction of your product requirements. 1 Kotari-yakemachi, Nagaokakyo, Kyoto 617-8520, Japan M00514AE Tel. +81-75-951-8151 http://www.panasonic.co.jp/semicon/ New publication, effective from 05 July 2002 Specifications Function Movement adaptive 3D Y/C separation, 3D noise reduction processing, TBC processing, and frame synchronizer processing Composite signal and Y and C signals input (2 lines) ITU-R and BT.656 (1 line each) 3.3 V 0.3 V (I/O, analog block) 1.8 V 0.15 V (Internal digital block) 0.55 W max. 208-pin LQFP with 28 mm square (MN673744HL) 239-pin C-CSP with11mm square (MN673744) Analog input Digital I/O Operating supply voltage Power consumption Package Package Unit : mm 30.000.20 28.000.10 156 157 105 104 Unit : mm (1.25) 11.000.15 28.000.10 30.000.20 9.00 max 0.05 T R P N M L K J H G F E D C B A 0.400.10 0.15 M 0.65 9.00 max 11.000.15 208 1 (1.25) 0.50 0.200.05 52 53 1 4-(1.05) 2 3 5 7 9 11 13 15 4 6 8 10 12 14 16 1.400.10 1.70 max 0.325 0.08 M 0.150.05 (1.00) 0.10 SEATING PLANE LQFP208-P-2828 MN673744HL 0.100.10 0 to 8 0.50 0.20 MLGA239-C-1111 MN673744 Support Tools Evaluation board Register control program Specifications and Product Standards 0.325 9.75 0.6250.20 1.00 max 0.05 max 9.75 0.6250.20 |
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