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NJU8711 PRELIMINARY 3V Operation Switching Driver for Class D Amplifier ! GENERAL DESCRIPTION The NJU8711 is a Switching Driver for class D Amplifier including BEEP and BPZ (Bipolar Zero) output circuits. It converts 1bit digital signal input, such as PWM or PDM signal, to analog signal output with simple external LC low-pass filter. The NJU8711 realizes very high power-efficiency by class D operation. Therefore, It is suitable for portable audio set and others. ! PACKAGE OUTLINE NJU8711V ! FEATURES # # # # # # # 2-channel 1bit Audio Signal Input Standby(Hi-Z), BPZ Control Internal BPZ Charger Beep Function Operating Voltage : 2.0V to 3.6V CMOS Technology Package Outline : SSOP10 ! PIN CONFIGURATION EN1 MCK VDD BEEP EN2 1 2 3 4 5 10 9 8 7 6 OUT2 IN2 VSS IN1 OUT1 ! BLOCK DIAGRAM VDD VSS BPZ Output IN1 OUT1 BEEP IN2 Output Control BPZ Output OUT2 MCK EN1 EN2 -1- NJU8711 ! TERMINAL DESCRIPTION No. 3 8 2 1 5 7 9 4 SYMBOL VDD VSS MCK EN1 EN2 IN1 IN2 BEEP I/O I I I I Function Power Supply, VDD=3V Power GND, VSS=0V Master Clock Input Terminal The condition of the data input terminal is fetched with the rising edge of this signal. Output Control Terminal Output circuit is selected by the condition of this terminal. Audio Signal Input Terminal 1-bit Audio Signal inputs into this terminal. Beep Signal Input Terminal Beep signal inputs into this terminal. Output Terminal * When Output Terminal selects Audio Signal, IN1 terminal input data outputs from OUT1 terminal and IN2 terminal input data outputs from OUT2 terminal. * When Output Terminal selects Beep Signal, BEEP terminal input data outputs from OUT1 and OUT2 terminals. 6 10 OUT1 OUT2 O ! INPUT TERMINAL STRUCTURE VDD Input Terminal Inside Circuit VSS -2- NJU3555 NJU8711 ! FUNCTIONAL DESCRIPTION (1) Signal Output PWM signals of L channel and R output from OUT1 and OUT2 terminals respectively. These signals are converted to analog signal by external 2nd-order or over LC filter. The output driver power supplied from VDD and VSS are required high response power supply against voltage fluctuation like as switching regulator because Output THD is effected by power supply stability. (2) Master Clock Master clock (MCK) synchronizes the Audio signal inputs (IN1 and IN2). The setup time and the hold time should be kept in the AC characteristics because IN1 and IN2 are fetched with the rising edge of MCK. MCK requires jitter-free or jitter as small as possible because the jitter downs S/N ratio. OUT1 and OUT2 occur the pop noise when MCK is stopped in operation without standby mode. Therefore, the standby mode should be set before MCK stop. (3) Output Control Output circuit is selected by the conditions of EN1 and EN2 terminals. EN2 0 0 1 1 EN1 0 1 0 1 Output State of OUT1 & OUT2 Standby(High impedance) Audio Signal Output BPZ Output Beep Signal Output (4) Beep Function The beep signal must be input before the rising edge of EN2 signal and must be stopped after the falling edge of EN2 signal. EN1 EN2 MCK BEEP Audio Signal Output Beep Signal Output Audio Signal Output -3- NJU8711 ! ABSOLUTE MAXIMUM RATINGS (Ta=25C) PARAMETER Supply Voltage Input Voltage Operating Temperature Storage Temperature Power Dissipation SSOP10 SYMBOL VDD Vin Ta Tstg PD RATING -0.3 to +4.0 -0.3 to VDD+0.3 -40 to +85 -40 to +125 280 UNIT V V C C mW Note 1) All voltage values are specified as VSS=0V. Note 2) If the LSI is used on condition beyond the absolute maximum rating, the LSI may be destroyed. Using LSI within electrical characteristics is strongly recommended for normal operation. Use beyond the electrical characteristics conditions will cause malfunction and poor reliability. Note 3) Decoupling capacitors should be connected between VDD-VSS due to the stabilized operation. ! ELECTRICAL CHARACTERISTICS (Ta=25C, VDD=3.0V, VSS=0.0V, Load Impedance=16, fS=44.1kHz, unless otherwise noted) PARAMETER SYMBOL CONDITIONS MIN. TYP. MAX. UNIT VDD Supply Voltage BPZ Driving Voltage Output Driver High side Resistance Output Driver Low side Resistance Beep High side Current Beep Low side Current Power Supply Current At Standby Power Supply Current At Operating VDD VBPZ RH RL IBH IBL IST IDD VIH Input Voltage VIL Input Leakage Current ILK 0 0.3VDD 1 V uA VOUT=VDD-0.1V VOUT=0.1V VOUT=VDD-1V VOUT=1V Stopping MCK, IN1, IN2, BEEP No-load operating IN1, IN2=32fS MCK=256fS 2.0 VDD /2-0.2 100 100 0.7VDD 3.0 VDD /2 1.5 1.5 250 250 1 3.6 VDD /2+0.2 2 2 600 600 1 2 VDD V V uA uA uA mA V Note 4) When VDD Supply Voltage is lower than typical voltage, a pop noise may occur in output change between BPZ and Audio Signal. Therefore, please consider and check the circuit carefully against pop noise. -4- NJU3555 NJU8711 ! TIMING CHARACTERISTICS * Audio Signal Input tMCKH MCK tMCKI IN1, IN2 tDS tDH (Ta=25C, VDD=3.0V, VSS=0.0V, unless otherwise noted) CONDITIONS MIN. TYP. MAX. UNIT 8 12 12 20 20 25 MHz ns ns ns ns tMCKL PARAMETER MCK Frequency MCK Pulse Width (H) MCK Pulse Width (L) IN1,IN2 Setup Time IN1,IN2 Hold Time SYMBOL fMCKI tMCKH tMCKL tDS tDH Note 5) tMCKI shows the cycle of the MCK signal. * Output Control Signal Input EN1,EN2 tUP tDN (Ta=25C, VDD=3.0V, VSS=0.0V, unless otherwise noted) CONDITIONS MIN. TYP. MAX. UNIT 100 100 ns ns PARAMETER Rise Time Fall Time SYMBOL tUP tDN Note 6) All timings are based on 30% and 70% voltage level of VDD. -5- NJU8711 ! APPLICATION CIRCUIT * Stereo OTL configuration *A915BY-220M is manufactured by TOKO, INC. For further information, please refer to its technical papers. 220uF A915BY-101M 0.22uF 7 Audio Signal IN1 IN2 9 4 100uH 1k OUT1 6 16 Headphone NJU8711 220uF A915BY-101M 0.22uF Beep Signal BEEP OUT2 100uH 1 Output Control EN1 EN2 5 Master Clock VDD MCK VSS 2.2uF 100uF 2 3 8 Switching Regulator * 1 channel BTL configuration *A915BY-220M is manufactured by TOKO, INC. For further information, please refer to its technical papers. A915BY-220M 22uH 1.5uF Audio Signal 7 9 4 IN1 IN2 OUT1 6 8 Speaker NJU8711 22uH Beep Signal BEEP OUT2 10 A915BY-220M 1 Output Control EN1 EN2 5 Master Clock VDD MCK VSS 2.2uF 100uF 2 3 8 Switching Regulator Note 7) De-coupling capacitors must be connected between each power supply pin and GND pin. Note 8) The power supply for VDD require fast driving response performance such as a switching regulator for THD. Note 9) The bigger capacitor value of AC-coupling capacitors for headphone outputs realize better frequency response characteristics, especially low frequency area. Note 10) The above circuit shows only application example and does not guarantee the any electrical characteristics. Therefore, please consider and check the circuit carefully to fit your application. -6- 1.5uF 1k 10 NJU3555 NJU8711 [CAUTION] The specifications on this databook are only given for information , without any guarantee as regards either mistakes or omissions. The application circuits in this databook are described only to show representative usages of the product and not intended for the guarantee or permission of any right including the industrial rights. -7- |
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