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| PRELIMINARY INFORMATION ICS3726-12 HIGH PERFORMANCE VCXO Description The ICS3726-12 is a low cost, low-jitter, high-performance 3.3 volt VCXO designed to replace expensive discrete VCXOs modules. The ICS3726-12 offers a wider operating frequency range and improved power supply noise rejection. The on-chip Voltage Controlled Crystal Oscillator accepts a 0 to 3.3 V input voltage. Using ICS' patented VCXO techniques, the device uses an inexpensive external pullable crystal in the range of 20 to 52 MHz to produce a VCXO output clock at that same frequency. This part is ideal for Set-Top Box, multimedia clock synthesizers and ADSL/VDSL applications. The frequency of the on-chip VCXO is adjusted by an external control voltage input into pin VIN. Because VIN is a high-impedance input, it can be driven directly from an PWM RC integrator circuit. Frequency output increases with VIN voltage input. The usable range of VIN is 0 to VDD. Features * * * * * * * * * * Packaged in 8-pin SOIC Operational frequency range of 20 MHz to 52 MHz Uses an inexpensive external crystal On-chip patented VCXO with pull range of 400 ppm VCXO tuning voltage of 0 to VDD Operating voltage of 3.3 V 12 mA output drive capability at TTL levels Works with surface mount crystal with CL=10 pF Advanced, low-power, sub-micron CMOS process Available in Pb (lead) free package Block Diagram VDD VIN X1 20 to 52 MHz Pullable Crystal X2 Voltage Controlled Crystal Oscillator 20 to 52 MHz Clock (REFOUT) Optional tuning crystal capacitors GND MDS 3726-12 B I n t e gra te d C i r c u i t S y s t e m s 1 525 Race Stre et, San Jo se, CA 9 5126 Revision 120505 te l (40 8) 2 97-12 01 w w w. i c st . c o m PRELIMINARY INFORMATION ICS3726-12 HIGH PERFORMANCE VCXO Pin Assignment X1 NC VI N GND 1 2 3 4 I CS37 26- 12 8 - P i n ( 1 5 0 mi l ) S OI C 8 7 6 5 X2 NC VDD REFOUT Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name X1 NC VIN GND REFOUT VDD NC X2 Pin Type Input -- Input Power Output Power -- Input Do connet to this pin. Pin Description Crystal connection. Connect to the external pullable crystal. Voltage input to VCXO. Zero to VDD signal which controls the VCXO frequency. Connect to ground. VCXO CMOS level clock output matches the nominal frequency of the crystal. Connect to +3.3 V (0.01 f decoupling capacitor recommended). No connect. Do not connect this pin to anything. Crystal connection. Connect to a pullable 20 to 52 MHz crystal. MDS 3726-12 B In te grated Circuit Systems 2 525 Ra ce Street, San Jose, CA 9512 6 Revision 120505 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3726-12 HIGH PERFORMANCE VCXO External Component Selection The ICS3726-12 requires a minimum number of external components for proper operation. Decoupling Capacitors A decoupling capacitor of 0.01 F should be connected between VDD and GND on pins 6 and 4 as close to the ICS3726-12 as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. The external crystal must be connected as close to the chip as possible and should be on the same side of the PCB as the ICS3726-12. There should be no vias between the crystal pins and the X1 and X2 device pins. There should be no signal traces underneath or close to the crystal. See application note MAN05. Crystal Tuning Load Capacitors The crystal traces should include pads for small fixed capacitors, one between X1 and ground, and another between X2 and ground. Stuffing of these capacitors on the PCB is optional. The need for these capacitors is determined at system prototype evaluation, and is influenced by the particular crystal used (manufacture and frequency) and by PCB layout. The typical required capacitor value is 1 to 4 pF. This chip has internal load capacitors and is designed to work with surface mount crystals with 10 pF load capacitance. The procedure for determining the value of these capacitors can be found in application note MAN05. Series Termination Resistor When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50 trace (a commonly used trace impedance), place a 33 resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20. Quartz Crystal The ICS3726-12 VCXO function consists of the external crystal and the integrated VCXO oscillator circuit. To assure the best system performance (frequency pull range) and reliability, a crystal device with the recommended parameters (shown below) must be used, and the layout guidelines discussed in the following section shown must be followed. The oscillation frequency of a quartz crystal is determined by its "cut" and by the load capacitors connected to it. The ICS3726-12 incorporates on-chip variable load capacitors that pull (change) the frequency of the crystal. The crystal specified for use with the ICS3726-12 is designed to have zero frequency error when the total of on-chip + stray capacitance is 10 pF. Recommended Crystal Parameters: Initial Accuracy at 25C Temperature Stability Aging Load Capacitance Shunt Capacitance, C0 C0/C1 Ratio Equivalent Series Resistance 20 ppm 30 ppm 20 ppm 10 pF 7 pF max 250 max 35 max MDS 3726-12 B In te grated Circuit Systems 3 525 Ra ce Street, San Jose, CA 9512 6 Revision 120505 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3726-12 HIGH PERFORMANCE VCXO Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS3726-12. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Supply Voltage, VDD All Inputs and Outputs Ambient Operating Temperature Storage Temperature Soldering Temperature 7V Rating -0.5 V to VDD+0.5 V 0 to +70C -65 to +150C 260C Recommended Operation Conditions Parameter Ambient Operating Temperature Power Supply Voltage (measured in respect to GND) Reference crystal parameters Min. 0 +3.15 Typ. - Max. +70 +3.45 Units C V Refer to page 3 MDS 3726-12 B In te grated Circuit Systems 4 525 Ra ce Street, San Jose, CA 9512 6 Revision 120505 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3726-12 HIGH PERFORMANCE VCXO DC Electrical Characteristics VDD=3.3 V 5% , Ambient temperature 0 to +70C, unless stated otherwise Parameter Operating Voltage Output High Voltage Output Low Voltage Output High Voltage (CMOS Level) Operating Supply Current Short Circuit Current VIN, VCXO Control Voltage Symbol VDD VOH VOL VOH IDD IOS VIA Conditions IOH = -12 mA IOL = 12 mA IOH = -4 mA No load Min. 3.15 2.4 Typ. Max. 3.45 0.4 Units V V V V VDD-0.4 6 50 0 3.3 mA mA V AC Electrical Characteristics VDD = 3.3 V 5%, Ambient Temperature 0 to +70 C, unless stated otherwise Parameter Output Frequency Crystal Pullability VCXO Gain Output Rise Time Output Fall Time Output Clock Duty Cycle Period Jitter RMS Period Jitter P- P Integrated Jitter RMS Phase Noise relative to Carrier @10 Hz @100 Hz @1 kHz @10 kHz @100 kHz @1 MHz Symbol FO FP tOR tOF tD tJ tJ Conditions 0V< VIN < 3.3 V, Note 1 VIN = VDD/2 + 1 V, Note 1 0.8 to 2.0 V, CL=15 pF 2.0 to 0.8 V, CL=15 pF Measured at 1.4 V, CL=15 pF CL=15 pF @35.328 MHz CL=15 pF@35.328 MHz Integrated 12 kHz to 20 MHz @ 35.328 MHz @35.328 MHz Carrier frequency Min. 20 + 200 Typ. Max. Units 52 MHz ppm ppm/V 1.5 1.5 ns ns % ps ps ps 150 40 50 6.7 46 1 60 -65 -90 -120 -140 -147 -147 dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz dBc/Hz Note 1: External crystal device must conform with Pullable Crystal Specifications listed on page 3. MDS 3726-12 B In te grated Circuit Systems 5 525 Ra ce Street, San Jose, CA 9512 6 Revision 120505 tel (4 08) 297-1 201 w w w. i c s t . c o m PRELIMINARY INFORMATION ICS3726-12 HIGH PERFORMANCE VCXO Package Outline and Package Dimensions (8-pin SOIC) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Inches* Min Max Symbol Min Max E INDEX AREA H 12 D A A1 B C D E e H h L 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0 8 .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0 8 *For reference only. Controlling dimensions in mm. A A1 h x 45 C -Ce B SEATING PLANE L .10 (.004) C Ordering Information Part / Order Number ICS3726M-12 ICS3726M-12T ICS3726M-12LF ICS3726M-12LFT Marking 3726M-12 3726M-12 3726M12L 3726M12L Shipping Packaging Tubes Tape and Reel Tubes Tape and Reel Package 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC Temperature 0 to +70 C 0 to +70 C 0 to +70 C 0 to +70 C Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 3726-12 B In te grated Circuit Systems 6 525 Ra ce Street, San Jose, CA 9512 6 Revision 120505 tel (4 08) 297-1 201 w w w. i c s t . c o m |
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