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Final Electrical Specifications LT1310 1.5A Boost DC/DC Converter with Phase-Locked Loop December 2001 FEATURES s s s s DESCRIPTIO s s s Synchronizable or Constant Frequency Low Noise Output Synchronizable Up to 4.5MHz Wide Input Voltage Range: 2.8V to 18V Low Profile Surface Mount Solution (All Ceramic Capacitors) Low VCESAT Switch: 240mV at 1A Adjustable Output from VIN to 35V Small Thermally Enhanced 10-Lead MSOP Package The LT(R)1310 boost DC/DC converter combines a 1.5A current mode PWM switcher with an integrated phaselock loop, allowing the user to set the switching frequency anywhere from 10kHz to 4.5MHz. Intended for use in applications where switching frequency must be accurately controlled, the LT1310 can generate 12V at up to 400mA from a 5V input. Switching frequency is set with an external capacitor, and the device can be operated in either free-running or phaselocked mode. A wide capture range of nearly 2:1 allows the free-running frequency to be set using standard 10% tolerance NP0 dielectric capacitors. The LT1310 is available in the tiny thermally enhanced 10-lead MSOP package. , LTC and LT are registered trademarks of Linear Technology Corporation. APPLICATIO S s s s s s s Instruments Avionics Data Acquisition Communications Imaging Ultrasound TYPICAL APPLICATIO VIN 5V L1 6.2H C1 4.7F CERAMIC LT1310 VIN SHDN SYNC PLL-LPF VC R4 3.01k C4 1500pF R3 15k C3 820pF CT GND SW FB D1 R1 178k VOUT 12V 400mA 90 85 80 75 3.3VIN 5VIN SHUTDOWN SYNC 1.5MHz EFFICIENCY (%) R2 20.5k 70 65 60 55 50 45 40 35 0 100 200 300 LOAD CURRENT (mA) 400 1310 F01b C5 82pF NP0 C2 4.7F CERAMIC 1310 F01a C1, C2: TAIYO YUDEN EMK316BJ475ML C3: AVX 06033A821 C4: AVX 06031C152 C5: AVX 06035A820 D1: MOTOROLA MBRM120 L1: PANASONIC ELL6RH6R2M Figure 1. 5V to 12V Converter Synchronized at 1.5MHz Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U LT1310 Efficiency 1310i U U 1 LT1310 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW FB SHDN PLL-LPF SYNC GND 1 2 3 4 5 10 9 8 7 6 VC CT VIN SW SW VIN .......................................................................... 18V SHDN ...................................................................... 18V SYNC ...................................................................... 18V FB ............................................................................. 5V CT .............................................................................. 5V VC .............................................................................. 2V PLL-LPF ..................................................................... 2V SW ........................................................................... 36V Operating Temperature Range (Note 2) .. - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C ORDER PART NUMBER LT1310EMSE MSE EXPOSED PAD PACKAGE 10-LEAD PLASTIC MSOP TJMAX = 125C, JA = 40C/W EXPOSED PAD IS GROUND (MUST BE SOLDERED TO PCB) MSE PART MARKING LTRZ Consult LTC Marketing for parts specified with wider operating temperature ranges. ELECTRICAL CHARACTERISTICS PARAMETER Undervoltage Lockout Maximum Input Voltage Feedback Voltage The q denotes specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. VIN = 3.3V, VSHDN = 3.3V, unless otherwise noted. (Note 2) CONDITIONS MIN TYP MAX 2.8 18 q UNITS V V V V nA %/V A/V V/V 1.242 1.236 1.255 60 1.268 1.268 150 0.05 FB Pin Bias Current Reference Line Regulation Error Amplifier Transconductance Error Amplifier Voltage Gain SW Current Limit SW Saturation Voltage SW Maximum Duty Cycle SW Minimum On Time VCO Frequency ISW = 1A CT = 220pF CT = 47pF ISW = 150mA, VC = 0.25V CT = 220pF, PLL-LPF = High CT = 220pF, PLL-LPF = High CT = 220pF, PLL-LPF = Low CT = 47pF, PLL-LPF = High CT = 220pF, PLL-LPF = High, FB = 0V CT = 220pF, Maximum CT = 220pF, Minimum (Percent Change from Max) SHDN = High SHDN = Low Switch Off, SW = 3.3V VSHDN = 2.4V Active Mode Shutdown Mode 2.4 0.950 -40 q VIN = 2.9V to 18V I = 5A 1.5 80 78 0.950 0.800 0.01 350 200 2.1 0.240 84 83 70 1.10 500 3.3 200 1.10 -50 11.5 0.1 35 2.8 0.320 1.25 1.30 630 Frequency Foldback PLL Lock Range Supply Current SW Leakage Current SHDN Pin Bias Current SHDN Pin High SHDN Pin Low 1.25 15 1 5 65 0.4 Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: The LT1310E is guaranteed to meet performance specifications from 0C to 70C. Specifications over the - 40C to 85C operating temperature range are assured by design, chacterization and correlation with statistical process controls. 1310i 2 U A V % % ns MHz MHz kHz Mhz kHz MHz % mA A A A V V W U U WW W LT1310 TYPICAL PERFOR A CE CHARACTERISTICS Feedback Voltage 1.27 140 120 FEEDBACK CURRENT (nA) 1.26 FB VOLTAGE (V) 100 80 60 40 20 UNDERVOLTAGE LOCKOUT (V) 1.25 1.24 1.23 1.22 -50 -25 0 25 50 TEMPERATURE (C) Oscillator Frequency vs CT Capacitor 6000 PLL-LPF = HIGH 2000 5000 FREQUENCY (kHz) FREQUENCY (kHz) 4000 1200 FREQUENCY (kHz) 3000 2000 1000 20 40 80 60 CAPACITOR (pF) 100 LT1372 * G10 Oscillator Frequency 220pF Capacitor on CT Pin 1600 1400 PLL-LPF = HIGH FREQUENCY (kHz) FREQUENCY (kHz) 1200 1000 800 600 400 200 -50 3200 2900 2600 2300 2000 -50 MAX DUTY CYCLE (%) -25 50 25 0 TEMPERATURE (C) UW 75 1310 G01 Feedback Pin Current 2.80 2.75 2.70 2.65 2.60 2.55 Undervoltage Lockout 100 0 -50 -25 50 25 0 TEMPERATURE (C) 75 100 1310 G02 2.50 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1310 G03 Oscillator Frequency vs CT Capacitor PLL-LPF = HIGH 1400 1200 1600 1000 800 600 400 200 0 100 0 300 700 500 CAPACITOR (pF) 900 1100 1310 G05 Oscillator Frequency vs Feedback Voltage 220pF CT CAPACITOR 800 400 0 0.2 0.4 0.6 0.8 1.0 FEEDBACK (V) 1.2 1.4 1310 G06 Oscillator Frequency 47pF Capacitor on CT Pin 3800 3500 100 Maximum Duty Cycle vs Oscillator Frequency PLL-LPF = HIGH 90 100C 25C 80 -50C 70 60 75 100 1310 G07 -25 0 25 50 TEMPERATURE (C) 75 100 1310 G08 50 500 1000 1500 2000 2500 3000 3500 4000 OSCILLATOR FREQENCY (kHz) 1310 G09 1310i 3 LT1310 TYPICAL PERFOR A CE CHARACTERISTICS Switch Minimum On Time 100 90 MINIMUM ON TIME (ns) 1400 1200 MAXIMUM FREQUENCY (kHz) 80 70 60 50 40 -50 1000 800 MINIMUM 600 400 200 -50 FREQUENCY (kHz) -25 0 25 50 TEMPERATURE (C) Supply Current 12 11 SUPPLY CURRENT (mA) 10 VCESAT (mV) 9 8 7 -50 -25 0 25 50 TEMPERATURE (C) Transient Response VOUT 100mV/DIV IL 500mA/DIV 200mA ILOAD 100mA fSYNC = 1.5MHz 50s/DIV LT1310 G16 4 UW 75 1310 G10 PLL Lock Range 220pF Capacitor on CT Pin 3500 PLL Lock Range 47pF Capacitor on CT Pin MAXIMUM 3000 2500 2000 1500 1000 500 -50 MINIMUM 100 -25 0 25 50 TEMPERATURE (C) 75 100 1310 G11 -25 0 25 50 TEMPERATURE (C) 75 100 1310 G12 Switch VCESAT 400 300 200 100 75 100 1310 G13 0 0 0.5 1.0 SWITCH CURRENT (A) 1.5 1310 G15 PLL Response VOUT 50mV/DIV IL 200mA/DIV fSYNC 1.9MHz 1.2MHz 50s/DIV LT1310 G17 Start-Up Response VOUT 5V/DIV IL 1A/DIV VSHDN NO SYNC SIGNAL 20s/DIV f = 1.2MHz LT1310 G18 1310i LT1310 PI FU CTIO S FB (Pin 1): Feedback Pin for Error Amplifier. Connect the resistor divider here to set output voltage according to the formula: VOUT = 1.255(1 + R1/R2) Minimize trace area at this pin. SHDN (Pin 2): Shutdown Pin. For active mode, tie this pin to a voltage between 2.4V and 18V. To disable the part and go into low current mode, pull this pin below 0.4V. PLL-LPF (Pin 3): Phase Locked-Loop Filter Pin. This is the output of the phase detector and also the input to the voltage controlled oscillator (VCO). Connect an RC filter here. Typically, R = 3k and C = 1500pF. If the part is not externally synchronized (no sync signal), pull this pin to VIN through a 10k resistor (PLL-LPF = HIGH). This drives the oscillator to its maximum frequency. SYNC (Pin 4): Frequency Synchronization Pin. Inject the external synchronizing signal here. This signal must be ground referred and have a minimum amplitude of 1.2V. The phase detector is edge triggered and when locked the rising edge of the sync signal will be aligned with the turnon of the power transistor. GND (Pin 5, Exposed Pad): Ground. Tie both Pin 5 and the exposed pad directly to local ground plane. The ground metal to the exposed pad should be wide for better heat dissipation. Multiple vias (local ground plane ground backplane) placed close to the exposed pad can further aid in reducing thermal resistance. SW (Pins 6, 7): Switch Pin. Connect inductor/diode here. Minimize trace area at this pin to keep EMI down. VIN (Pin 8): Supply Pin. Must be bypassed as close as possible to the pin. CT (Pin 9): Timing Capacitor Pin for VCO. Place the timing capacitor from this pin to ground to set the frequency range for the oscillator. Minimize trace at this pin to reduce stray capacitance. VC (Pin 10): Compensation Pin for Error Amplifier. Tie an RC network here to compensate the voltage feedback loop. BLOCK DIAGRA FB 1 1.255V REF SHDN 2 GND 5 x5 0.024 SHUTDOWN W + - U U U VC 10 CT 9 PLL-LPF 3 SYNC RAMP GEN. A1 VCO PHASE DETECTOR 4 + A2 + + - S R Q Q SW 6, 7 1310 BD 1310i 5 LT1310 OPERATIO To understand operation, refer to the Block Diagram. The LT1310 contains a boost switching regulator that can be phase locked to an external synchronizing signal. The boost regulator uses current mode control and contains a 1.5A NPN power transistor. This type of control uses two feedback loops. The main control loop sets output voltage and operates as follows: a load step causes VOUT and the FB voltage to be slightly perturbed. The error amplifier A1 responds to this change in FB by driving the VC pin either higher or lower. Because switch current is proportional to the VC pin voltage, this change causes the switch current to be adjusted until VOUT is once again satisfied. Loop compensation is taken care of by an RC network from the VC pin to ground. Inside this main loop is another that sets current limit on a cycle-by-cycle basis. This loop utilizes current comparator A2 to control peak current. The oscillator issues a set pulse to the flip-flop at the beginning of each cycle, turning the switch on. With the switch now in the ON state, the SW pin is effectively connected to ground. Current ramps up in the inductor linearly at a rate of VIN/L. Switch current is set by the VC pin voltage and when the voltage across RSENSE trips the current comparator, a reset pulse will be generated and the switch will be turned off. Since the inductor is now loaded up with current, the SW pin will fly high until it is clamped by the catch diode, D1. Current will flow through the diode decreasing at a rate of (VOUT - VIN)/L until the oscillator issues a new set pulse, causing the cycle to repeat. C3 R3 VIN CIN R1 SHDN LT1310 SYNC SW R4 COUT C4 CT VALUE (pF) D1 GND VOUT 1310 F02 Figure 2. Suggested Layout 6 U The LT1310 is phase lockable up to 4.5MHz, giving the user precise control over switching frequency. The phase detector compares the incoming sync signal to the internal oscillator signal. If the switching frequency is lower than the sync signal, or if the phase lags the sync signal, then the phase detector output will source current into the PLL-LPF pin, driving it higher. The PLL-LPF pin is also the input to the voltage controlled oscillator. If the sync signal is slower than the switching frequency, the PLL-LPF pin will sink current until the PLL-LPF pin voltage drops. When locked, the PLL-LPF pin rests at a voltage between 0V and 1.3V. The PLL-LPF pin is capable of sinking or sourcing approximately 30A. CT Selection for Operating Frequency The LT1310's internal voltage controlled oscillator frequency range is set by an external timing capacitor, CT. A graph for selecting CT vs operating frequency is shown in Figure 3. The VCO frequency is proportional to the PLL-LPF pin voltage with maximum frequency corresponding to maximum PLL-LPF pin voltage. For Figure 2, the PLL-LPF pin is pulled high with a 10k resistor to VIN. When using Figure 3's graph for synchronizable applications, choose CT according to a frequency value approximately 33% above your center frequency. For this case, the PLL-LPF pin will be driven by the internal phase detector and should be connected only to the RC filter shown in Figure 1. R2 CT 4000 L1 1000 100 10 100 1000 OPERATING FREQUENCY (kHz) 6000 1310 F03 Figure 3. CT vs Operating Frequency 1310i LT1310 PACKAGE DESCRIPTIO U MSE Package 10-Lead Plastic MSOP (Reference LTC DWG # 05-08-1663) BOTTOM VIEW OF EXPOSED PAD OPTION 2.794 0.102 (.110 .004) 0.889 0.127 (.035 .005) 1 2.06 0.102 (.081 .004) 1.83 0.102 (.072 .004) 5.23 (.206) MIN 2.083 0.102 3.2 - 3.45 (.082 .004) (.126 - .136) 10 0.50 0.305 0.038 (.0197) (.0120 .0015) BSC TYP RECOMMENDED SOLDER PAD LAYOUT 3.00 0.102 (.118 .004) (NOTE 3) 10 9 8 7 6 0.497 0.076 (.0196 .003) REF 4.88 0.10 (.192 .004) 0.254 (.010) GAUGE PLANE 0.53 0.01 (.021 .006) DETAIL "A" 0.18 (.007) SEATING PLANE 1.10 (.043) MAX DETAIL "A" 0 - 6 TYP 12345 3.00 0.102 (.118 .004) NOTE 4 0.86 (.034) REF 0.17 - 0.27 (.007 - .011) NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.50 (.0197) TYP 0.13 0.05 (.005 .002) MSOP (MSE) 1001 1310i 7 LT1310 TYPICAL APPLICATIO U 3MHz 5V to 12V Converter L1 3.3H C1 2.2F SHUTDOWN SYNC IN 3MHz R4 3.01k C4 1500pF LT1310 VIN SHDN SYNC PLL-LPF VC R3 15k C3 820pF CT GND C5 27pF NP0 C2 2.2F SW FB R2 20.5k D1 VOUT 12V 400mA VIN 5V R1 178k 1310 TA01a C1, C2: TAIYO YUDEN LMK212BJ225MG D1: MOTOROLA MBRM120 L1: PANASONIC ELL6RH3R3M Efficiency 90 85 80 75 3.3VIN 5VIN EFFICIENCY (%) 70 65 60 55 50 45 40 35 0 100 200 300 LOAD CURRENT (mA) 400 1310 TA01b RELATED PARTS PART NUMBER LT1767 LT1930 LT1946 LTC3402 DESCRIPTION Monolithic 1.5A, 1.25MHz Step-Down Switching Regulator 1A, 1.2MHz/2.2MHz Step-Up DC/DC Converters in ThinSOT 2A, 3MHz Micropower Synchronous Boost Converter TM COMMENTS VIN: 3V to 25V, Current Mode, 8-Lead MSOP 12V at 300mA from 5V Input, ThinSOT Package 8V at 430mA from 3.3V Input, 8-Lead MSOP Package 97% Efficiency, 10-Lead MSOP Package 1.2MHz Boost DC/DC Converter with 1.5A Switch and Soft-Start ThinSOT is a trademark of Linear Technology Corporation. 1310i 8 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q LT/TP 1201 1.5K * PRINTED IN USA www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 2001 |
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