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LT1641 Positive High Voltage Hot Swap Controller FEATURES s s s s s s s s DESCRIPTIO Allows Safe Board Insertion and Removal from a Live Backplane Controls Supply Voltage from 9V to 80V Programmable Analog Foldback Current Limiting High Side Drive for an External N-Channel Automatic Retry Capability User Programmable Supply Voltage Power-Up Rate Undervoltage Lockout Overvoltage Protection The LT(R)1641 is an 8-pin Hot SwapTM controller that allows a board to be safely inserted and removed from a live backplane. Using an external N-channel pass transistor, the board supply voltage can be ramped up at a programmable rate. A high side switch driver controls an N-channel gate for supply voltages ranging from 9V to 80V. The chip features a programmable analog foldback current limit circuit. If the chip remains in current limit for more than a programmable time, the N-channel pass transistor turns off and is optionally set to automatically restart after a time-out delay. The PWRGD output indicates when the output voltage, sensed by the FB pin, is within tolerance. The ON pin provides programmable undervoltage lockout. The LT1641-1/LT1641-2 are recommended for new designs. The LT1641 is available in the 8-lead SO package. APPLICATIO S s s s s Hot Board Insertion Electronic Circuit Breaker Industrial High Side Switch/Circuit Breaker 24V/48V Industrial/Alarm Systems , LTC and LT are registered trademarks of Linear Technology Corporation. Hot Swap is a trademark of Linear Technology Corporation. TYPICAL APPLICATIO 24V Input Voltage Automatic Restart Application VIN 24V SHORT PIN R1 49.9k 1% 10nF R7 24k 5% FB LT1641 R2 3.4k 1% TIMER 5 GND *DIODES, INC. 1641f RS 0.01 Q1 IRF530 VOUT R5 10 5% D1 CMPZ 5248B R3 59k 1% CL 8 *SMAT70A VCC 1 ON 7 SENSE 6 GATE 2 R4 3.57k 1% 3 PWRGD GND 4 C2 0.68F U PWRGD 1641 TA01 U U 1 LT1641 ABSOLUTE (Note 1) AXI U RATI GS PACKAGE/ORDER I FOR ATIO TOP VIEW ON 1 FB 2 PWRGD 3 GND 4 8 7 6 5 VCC SENSE GATE TIMER Supply Voltage (VCC) ...............................- 0.3V to 100V Input Voltage (SENSE) .............................- 0.3V to 100V Input Voltage (TIMER) ...............................- 0.3V to 44V Input Voltage (FB, ON) ...............................- 0.3V to 60V Output Voltage (PWRGD) ........................- 0.3V to 100V Output Voltage (GATE) ............................- 0.3V to 100V Operating Temperature Range LT1641CS8 ............................................. 0C to 70C LT1641IS8 .......................................... - 40C to 85C Storage Temperature Range ................. - 65C to 150C Lead Temperature (Soldering, 10 sec).................. 300C ORDER PART NUMBER LT1641CS8 LT1641IS8 S8 PART MARKING 1641 1641I S8 PACKAGE 8-LEAD PLASTIC SO TJMAX = 125C, JA = 110C/W NOT RECOMMENDED FOR NEW DESIGNS SEE LT1641-1/LT1641-2 Consult LTC Marketing for parts specified with wider operating temperature ranges. The q denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25C. Vcc = 24V SYMBOL VCC ICC VLKO VFBL VFBL VFBHST IINFB VFB VSENSETRIP IGATEUP IGATEDN VGATE ITIMERUP ITIMERON VONH VONL VONHYST IINON VOL IOH PARAMETER VCC Operating Range VCC Supply Current VCC Undervoltage Lockout FB Pin High Voltage Threshold FB Pin Low Voltage Threshold FB Pin Hysteresis Voltage FB Pin Input Current FB Pin Threshold Line Regulation SENSE Pin Trip Voltage (VCC - VSENSE) GATE Pin Pull-Up Current GATE Pin Pull-Down Current External N-Channel Gate Drive TIMER Pin Pull-Up Current TIMER Pin Pull-Down Current ON Pin High Threshold ON Pin Low Threshold ON Pin Hysteresis ON Pin Input Current PWRGD Output Low Voltage PWRGD Pin Leakage Current VON = GND IO = 2mA IO = 4mA VPWRGD = 80V q q q DC ELECTRICAL CHARACTERISTICS CONDITIONS q MIN 9 q q TYP 2 MAX 80 5.5 8.8 1.345 1.245 -1 UNITS V mA V V V mV A mV/V mV mV A mA V V A A V V mV A V V A ON = 3V FB Low to High Transition FB High to Low Transition VFB = GND 9V VCC 80V VFB = 0V VFB = 1V Charge Pump On, VGATE = 7V Any Fault Condition, VGATE = 2V VGATE - VCC, VCC = 10.8V to 20V VCC = 20V to 80V VTIMER = 0V VTIMER = 1V ON Low to High Transition ON High to Low Transition 7.5 1.280 1.221 8.3 1.313 1.233 80 q q q q q q q q q q q q q 0.05 8 39 -5 35 4.5 10 - 24 1.5 1.280 1.221 - 80 3 1.313 1.233 80 -1 0.4 2.5 10 12 47 - 10 70 17 55 - 20 100 18 18 - 132 5 1.355 1.245 2 U 1641f W U U WW W LT1641 AC ELECTRICAL CHARACTERISTICS SYMBOL tPHLON tPLHON tPHLFB tPLHFB tPHLSENSE PARAMETER ON Low to GATE Low ON High to GATE High FB Low to PWRGD Low FB High to PWRGD High (VCC - SENSE) High to GATE Low CONDITIONS Figures 1, 2 Figures 1, 2 Figures 1, 3 Figures 1, 3 Figures 1, 4 TA = 25C, VCC = 24V MIN TYP 6 1.7 3.2 1.5 0.5 1 2 MAX UNITS s s s s s Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified. TYPICAL PERFOR A CE CHARACTERISTICS ICC vs VCC 3.5 3.0 2.5 ICC (mA) 2.0 1.5 1.0 0.5 0 0 20 40 60 VCC (V) 80 100 1641 G01 85C 25C -45C ICC (mA) 48V 2.5 24V 2.0 1.5 1.0 0.5 0 -50 FB PIN LOW VOLTAGE THRESHOLD (V) FB Pin High Voltage Threshold vs Temperature 1.335 0.100 VCC = 48V 0.095 0.090 FB PIN HIGH VOLTAGE THRESHOLD (V) 1.330 1.325 1.320 1.315 1.310 1.305 1.300 1.295 1.290 1.285 1.280 -50 FB PIN HYSTERESIS (V) 0.080 0.075 0.070 0.065 0.060 0.055 0.050 0.045 0.040 -50 IGATE PULL UP (A) -25 0 25 50 TEMPERATURE (C) UW 75 1641 G04 ICC vs Temperature 3.0 1.250 1.245 1.240 1.235 1.230 1.225 1.220 1.215 1.210 1.205 FB Pin Low Voltage Threshold vs Temperature VCC = 48V -25 0 25 50 TEMPERATURE (C) 75 100 1641 G02 1.200 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1641 G03 FB Pin Hysteresis vs Temperature -5 VCC = 48V -6 -7 -8 -9 -10 -11 -12 -25 0 25 50 TEMPERATURE (C) 75 100 1641 G05 IGATE Pull Up vs Temperature VCC = 48V 0.085 100 -13 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1641 G06 1641f 3 LT1641 TYPICAL PERFOR A CE CHARACTERISTICS Gate Drive vs Temperature 16 15 GATE DRIVE (VGATE - VCC) (V) 14 13 12 11 10 9 8 7 6 -50 -25 VCC = 10.8V VCC = 48V 16 TIMER PIN PULL UP CURRENT (A) GATE DRIVE (VGATE - VCC) (V) 0 25 50 TEMPERATURE (C) TIMER Pin Pull Up Current vs VCC 16 1.335 ON PIN HIGH VOLTAGE THRESHOLD (V) TIMER PIN PULL UP CURRENT (A) 1.330 1.325 1.320 1.315 1.310 1.305 1.300 1.295 1.290 1.285 -50 ON PIN LOW VOLTAGE THRESHOLD (V) 14 12 TA = -45C TA = 0C 10 TA = 25C 8 TA = 85C 6 10 30 50 VCC (V) 70 90 1641 G10 ON Pin Voltage Hysteresis vs Temperature 0.100 20 18 16 PWRGD VOUT LOW (V) 14 12 10 8 6 4 2 0.050 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1641 G13 SENSE PIN REGULATION VOLTAGE (mV) ON PIN LOW VOLTAGE HYSTERESIS (V) VCC = 48V 0.090 0.080 0.070 0.060 4 UW 75 1641 G07 Gate Drive vs VCC -40 -50 -60 -70 -80 -90 TIMER Pin Pull Up Current vs Temperature VCC = 48V 14 TA = 25C 12 10 8 -100 -110 -50 6 100 0 20 40 VCC (V) 60 80 1641 G08 -25 0 25 50 TEMPERATURE (C) 75 100 1641 G09 ON Pin High Voltage Threshold vs Temperature 1.239 VCC = 48V 1.237 1.235 1.233 1.231 1.229 1.227 1.225 ON Pin Low Voltage Threshold vs Temperature VCC = 48V -25 0 25 50 TEMPERATURE (C) 75 100 1641 G11 1.223 -50 -25 0 25 50 TEMPERATURE (C) 75 100 1641 G12 PWRGD VOUT Low vs ILOAD 50 VCC = 48V 45 40 35 30 25 20 15 10 5 0 10 30 50 ILOAD (mA) 70 90 1641 G14 SENSE Pin Regulation Voltage vs VFEEDBACK VCC = 48V TA = 25C TA = -45C TA = 25C TA = 85C 0 0 0.2 0.4 0.6 VFEEDBACK (V) 0.8 1 1641 G15 1641f LT1641 PI FU CTIO S ON (Pin 1): The ON pin is used to implement undervoltage lockout. When the ON pin is pulled below the 1.233V Highto-Low threshold voltage, an undervoltage condition is detected and the GATE pin is pulled low to turn the MOSFET off. When the ON pin rises above the 1.313V Low-to-High threshold voltage, the MOSFET is turned on again. FB (Pin 2): Power Good Comparator Input. It monitors the output voltage with an external resistive divider. When the voltage on the FB pin is lower than the High-to-Low threshold of 1.233V, the PWRGD pin is pulled low and released when the FB pin is pulled above the 1.313V Lowto-High threshold. The FB pin also effects foldback current limit (see Figure 7 and related discussion). PWRGD (Pin 3): Open Collector Output to GND. The PWRGD pin is pulled low whenever the voltage at the FB pin falls below the High-to-Low threshold voltage. It goes into a high impedance state when the voltage on the FB pin exceeds the Low-to-High threshold voltage. An external pull-up resistor can pull the pin to a voltage higher or lower than VCC. GND (Pin 4): Chip Ground. TIMER (Pin 5): Timing Input. An external timing capacitor at this pin programs the maximum time the part is allowed to remain in current limit. When the part goes into current limit, an 80A pull-up current source starts to charge the timing capacitor. When the voltage on the TIMER pin reaches 1.233V, the GATE pin is pulled low; the pull-up current will be turned off and the capacitor is discharged by a 3A pull-down current. When the TIMER pin falls below 0.5V, the GATE pin turns on once the ON pin is pulsed low. By connecting a 0.01F capacitor from the GATE pin to the center tap of a resistive divider at the ON pin, the part automatically restarts after a current limit fault. With a short at the output, the part cycles on and off with a 3.75% on-time duty cycle. GATE (Pin 6): The High Side Gate Drive for the External N-Channel. An internal charge pump guarantees at least 10V of gate drive for supply voltages above 20V and 4.5V gate drive for supply voltages between 10.8V and 20V. The rising slope of the voltage at the GATE is set by an external capacitor connected from the GATE pin to GND and an internal 10A pull-up current source from the charge pump output. When the current limit is reached, the GATE pin voltage will be adjusted to maintain a constant voltage across the sense resistor while the timer capacitor starts to charge. If the TIMER pin voltage exceeds 1.233V, the GATE pin will be pulled low. The GATE pin is pulled to GND whenever the ON pin is pulled low, the VCC supply voltage drops below the 8.3V undervoltage lockout threshold or the TIMER pin rises above 1.233V. SENSE (Pin 7): The Current Limit Sense Pin. A sense resistor must be placed in the supply path between VCC and SENSE. The current limit circuit will regulate the voltage across the sense resistor (VCC - VSENSE) to 47mV when VFB is 0.5V or higher. If VFB drops below 0.5V, the voltage across the sense resistor decreases linearly and stops at 12mV when VFB is 0V. To defeat current limit, short the SENSE pin to the VCC pin. VCC (Pin 8): The Positive Supply Input ranges from 9V to 80V for normal operation. ICC is typically 2mA. An internal undervoltage lockout circuit disables the chip for inputs less than 8.3V. Place a 0.1F bypass capacitor next to the VCC pin. U U U 1641f 5 LT1641 BLOCK DIAGRA W VCC SENSE VP VP GEN FB - 12mV ~ 47mV + + REF GEN 0.5V CHARGE PUMP AND GATE DRIVER GATE - 1.233V + PWRGD 1.233V - + ON - VCC - UNDERVOLTAGE LOCKOUT 8.3V + LOGIC 0.5V + - VP 80A + 1.233V - TIMER 3A 1641 BD GND TEST CIRCUIT ON VCC + - 24V FB V+ 5V SENSE PWRGD 5k GND GATE 10nF TIMER 1641 F01 Figure 1 1641f 6 LT1641 TI I G DIAGRA S 1.313V ON tPLHON 1.233V tPHLON 1V GATE 5V 1641 F02 Figure 2. ON to GATE Timing APPLICATIO S I FOR ATIO Hot Circuit Insertion When circuit boards are inserted into a live backplane, the supply bypass capacitors on the boards draw high peak currents from the backplane power bus as they charge up. The transient currents can permanently damage the connector pins and glitch the system supply, causing other boards in the system to reset. The LT1641 is designed to turn on a board's supply voltage in a controlled manner, allowing the board to be safely inserted or removed from a live backplane. The chip also provides undervoltage and overcurrent protection while a power good output signal indicates when the output supply voltage is ready. Power-Up Sequence The power supply on a board is controlled by placing an external N-channel pass transistor (Q1) in the power path (Figure 5). Resistor RS provides current detection and capacitor C1 provides control of the GATE slew rate. Resistor R6 provides current control loop compensation while R5 prevents high frequency oscillations in Q1. Resistors R1 and R2 provide undervoltage sensing. U W W U U UW 1.313V FB tPLHFB 1.233V tPHLFB 1V PWRGD 1V 1641 F03 Figure 3. FB to PWRGD Timing VCC - SENSE 47mV tPHLSENSE VCC 1641 F04 GATE Figure 4. SENSE to GATE Timing After the power pins first make contact, transistor Q1 is turned off. If the voltage at the ON pin exceeds the turn-on threshold voltage, the voltage on the VCC pin exceeds the undervoltage lockout threshold, and the voltage on the TIMER pin is less than 1.233V, transistor Q1 will be turned on (Figure 6). The voltage at the GATE pin rises with a slope equal to 10A/C1 and the supply inrush current is set at IINRUSH = CL * 10A/C1. If the voltage across the current sense resistor RS gets too high, the inrush current will then be limited by the internal current limit circuitry which adjusts the voltage on the GATE pin to maintain a constant voltage across the sense resistor. Once the voltage at the output has reached its final value, as sensed by resistors R3 and R4, the PWRGD pin goes high. Short-Circuit Protection The LT1641 features a programmable foldback current limit with an electronic circuit breaker that protects against short-circuits or excessive supply currents. The current limit is set by placing a sense resistor between VCC (Pin 8) and SENSE (Pin 7). 1641f 7 LT1641 APPLICATIO S I FOR ATIO VIN 24V SHORT PIN R1 49.9k 1% 8 VCC 1 ON LT1641 R2 3.4k 1% TIMER 5 GND C2 0.68F GND 4 1641 F05 RS 0.025 Q1 IRF530 D1 CMPZ 5248B C1 R6, 10nF 1k, 5% 7 6 GATE FB 2 R4 3.57k 1% 3 PWRGD R7 24k 5% R5 10 5% R3 59k 1% SENSE PWRGD Figure 5. Typical Application To prevent excessive power dissipation in the pass transistor and to prevent voltage spikes on the input supply during short-circuit conditions at the output, the current folds back as a function of the output voltage, which is sensed at the FB pin (Figure 7). When the voltage at the FB pin is 0V, the current limit circuit drives the GATE pin to force a constant 12mV drop across the sense resistor. As the output voltage at the FB pin increases, the voltage across the sense resistor increases until the FB pin reaches 0.5V, at which point the voltage across the sense resistor is held constant at 47mV. The maximum current limit is calculated as: ILIMIT = 47mV/RSENSE For a 0.025 sense resistor, the current limit is set at 1.88A and folds back to 480mA when the output is shorted to ground. The LT1641 also features a variable overcurrent response time. The time required for the chip to regulate the GATE pin (Pin 6) voltage is a function of the voltage across the sense resistor connected between the VCC pin (Pin 8) and the SENSE pin (Pin 7). The larger the voltage, the faster the gate will be regulated. Figure 8 shows the response time as a function of overdrive at the SENSE pin. 8 U + VOUT CL W U U Figure 6. Power-Up Waveforms TIMER The TIMER pin (Pin 5) provides a method for programming the maximum time the chip is allowed to operate in current limit. When the current limit circuitry is not active, the TIMER pin is pulled to GND by a 3A current source. After the current limit circuit becomes active, an 80A pullup current source is connected to the TIMER pin and the voltage will rise with a slope equal to 77A/CTIMER as long as the current limit circuit remains active. Once the desired maximum current limit time is set, the capacitor value is: C(nF) = 62 * t(ms). If the current limit circuit turns off, the TIMER pin will be discharged to GND by the 3A current source. Whenever the TIMER pin reaches 1.233V, the GATE pin is immediately pulled to GND and the TIMER pin is pulled back to GND by the 3A current source. The part is not allowed to turn on again until the voltage at the TIMER pin falls below 0.5V. The waveform in Figure 9 shows how the output turns off following a short-circuit. The drop across the sense resistor is held at 12mV as the timer ramps up. Since the output did not rise bringing FB above 0.5V, the circuit turns off. 1641f LT1641 APPLICATIO S I FOR ATIO VCC - VSENSE 47mV 12mV 0V 0.5V VFB 1641 F07 Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage Automatic Restart To force the LT1641 to automatically restart after an overcurrent fault, the bottom plate of capacitor C1 can be tied back to the ON pin (Figure 10). When an overcurrent condition occurs, the GATE pin is driven to maintain a constant voltage across the sense resistor. The capacitor C2 at the TIMER pin will begin to charge. When the voltage at the TIMER pin reaches 1.233V, the GATE pin is immediately pulled to GND and transistor Q1 turns off. Capacitor C1 momentarily pulses the ON pin low and allows the part to turn off. When the voltage at the TIMER pin ramps back down to 0.5V, the LT1641 turns on again. If the short-circuit condition at the output still exists, the cycle will repeat itself indefinitely with a 3.75% on-time duty cycle which prevents Q1 from overheating. The waveforms are shown in Figure 11. Undervoltage and Overvoltage Detection The ON pin can be used to detect an undervoltage condition at the power supply input. The ON pin is internally connected to an analog comparator with 80mV of hysteresis. If the ON pin falls below its threshold voltage (1.233V), the GATE pin is pulled low and is held low until ON is high again. Figure 12 shows an overvoltage detection circuit. When the input voltage exceeds the Zener diode's breakdown voltage, D1 turns on and starts to pull the TIMER pin high. After the TIMER pin is pulled higher than 1.233V, the fault latch is set and the GATE pin is pulled to GND immediately, U RESPONSE TIME 12s 10s 8s 6s 4s 2s 50mV 100mV 150mV 200mV VCC - VSENSE 1641 F08 W U U Figure 8. Response Time to Overcurrent turning off transistor Q1. The waveforms are shown in Figure 13. Operation is restored either by interrupting power or by pulsing ON low. Power Good Detection The LT1641 includes a comparator for monitoring the output voltage. The noninverting input (FB pin) is compared against an internal 1.233V precision reference and exhibits 80mV hysteresis. The comparator's output (PWRGD pin) is an open collector capable of operating from a pull-up as high as 100V. The PWRGD pin can be used to directly enable/disable a power module with an active high enable input. Figure 14 shows how to use the PWRGD pin to control an active low enable input power module. Signal inversion is accomplished by transistor Q2 and R7. Supply Transient Protection The LT1641 is 100% tested and guaranteed to be safe from damage with supply voltages up to 100V. However, spikes above 100V may damage the part. During a shortcircuit condition, the large change in currents flowing through the power supply traces can cause inductive voltage spikes which could exceed 100V. To minimize the spikes, the power trace parasitic inductance should be minimized by using wider traces or heavier trace plating and a 0.1F bypass capacitor placed between VCC and GND. A surge suppressor at the input can also prevent damage from voltage surges. 1641f 9 LT1641 APPLICATIO S I FOR ATIO U VIN 24V SHORT PIN R1 49.9k 1% C1 10nF R7 24k 5% FB LT1641 R2 3.4k 1% TIMER 5 GND C2 0.68F GND 4 1641 F10 Figure 9. Short-Circuit Waveforms Figure 11. Automatic Restart Waveforms GATE Pin Voltage A curve of gate drive vs VCC is shown in Figure 15. The GATE pin is clamped to a maximum voltage of 18V above the input voltage. At minimum input supply voltage of 9V, the minimum gate drive voltage is 4.5V. When the input supply voltage is higher than 20V, the gate drive voltage is at least 10V and a regular N-FET can be used. In applications ranges 9V to 24V range, a logic level N-FET must be used with a proper protection Zener diode between its gate and source (as D1 shown is Figure 5). 1641f 10 W U U RS 0.025 Q1 IRF530 VOUT R5 10 5% D1 CMPZ 5248B R3 59k 1% CL 8 VCC 1 ON 7 SENSE 6 GATE 2 R4 3.57k 1% 3 PWRGD PWRGD Figure 10. Automatic Restart Application RS 0.025 Q1 IRF530 D1 CMPZ 5248B C1 R6, 10nF 1k, 5% 8 VCC 1 ON LT1641 R2 3.4k 1% TIMER 5 GND C2 0.68F GND 4 1641 F12 VIN 24V SHORT PIN R1 49.9k 1% + R3 59k 1% VOUT CL R5 10 5% D1 30V 1N5256B 7 6 2 R4 3.57k 1% 3 SENSE GATE FB R7 24k 5% PWRGD PWRGD Figure 12. Overvoltage Detection LT1641 APPLICATIO S I FOR ATIO Layout Considerations To achieve accurate current sensing, a Kelvin connection is recommended. The minimum trace width for 1oz copper foil is 0.02" per amp to make sure the trace stays at a reasonable temperature. 0.03" per amp or wider is recommended. Note that 1oz copper exhibits a sheet resistance of about 530/ . Small resistances add up quickly in Figure 13. Overvoltage Waveforms 18 16 14 VGATE - VCC (V) VCC SENSE 12 10 8 6 4 2 0 8 13 18 VCC (V) 23 1641 F15 R2 ILOAD GND ON Figure 15. Gate Drive vs Supply Voltage Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. U high current applications. To make the system immune to noise, the resistor divider to the ON pin needs to be close to the chip and keep traces to VCC and GND short. A 0.1F capacitor from the ON pin to GND also helps reject induced noise. Figure 16 shows a layout that addresses these issues. VIN 48V SHORT PIN R1 294k 1% 8 VCC UV = 37V 1 ON LT1641 R2 10.2k 1% TIMER 5 GND C2 0.68F GND 4 1641 F14 W U U RS 0.01 Q1 IRF530 D1 CMPZ 5248B C1 10nF R7 47k 5% FB 2 R4 4.22k 1% 3 Q2 MMBT5551LT1 R5 10 5% R6, 1k, 5% 7 SENSE 6 GATE R3 143k 1% ACTIVE LOW ENABLE MODULE + VIN + CL 220F ON/OFF VIN - VOUT + VOUT VOUT - PWRGD Figure 14. Active Low Enable Module ILOAD SENSE RESISTOR, RS LT1641 R1 1541 F16 Figure 16. Recommended Layout for R1, R2 and RS 1641f 11 LT1641 PACKAGE DESCRIPTIO U S8 Package 8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) 0.189 - 0.197* (4.801 - 5.004) 8 7 6 5 0.228 - 0.244 (5.791 - 6.197) 0.150 - 0.157** (3.810 - 3.988) 1 0.010 - 0.020 x 45 (0.254 - 0.508) 0.008 - 0.010 (0.203 - 0.254) 0- 8 TYP 2 3 4 0.053 - 0.069 (1.346 - 1.752) 0.004 - 0.010 (0.101 - 0.254) 0.050 (1.270) BSC SO8 1298 0.014 - 0.019 (0.355 - 0.483) TYP *DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE **DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE 0.016 - 0.050 (0.406 - 1.270) RELATED PARTS PART NUMBER LT1640A LTC1421 LTC1422 LT1641-1/LT1641-2 LTC1642 LTC1643 LT4250 DESCRIPTION Negative High Voltage Hot Swap Controller Dual Channel Hot Swap Controller High Side Drive Hot Swap Controller in SO-8 Positive High Voltage Hot Swap Controller Fault Protected Hot Swap Controller PCI Hot Swap Controller Negative 48V Hot Swap Controller COMMENTS Operates from - 10V to - 80V Operates Two Supplies from 3V to 12V and a Third to -12V System Reset Output with Programmable Delay Pin Compatible for Latched Mode Operation/Automatic Retry Operates from 3V to 16.5V, Handles Surges to 33V 3.3V, 5V, 12V, -12V Supplies for PCI Bus Active Current Limiting for Supplies from - 20V to - 80V 1641f 12 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 q FAX: (408) 434-0507 q LT/TP 1101 2K * PRINTED IN USA www.linear.com (c) LINEAR TECHNOLOGY CORPORATION 1999 |
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