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 FDZ208P
January 2002
FDZ208P
P-Channel 30 Volt PowerTrench(R) BGA MOSFET
General Description
Combining Fairchild's advanced 30 Volt P -Channel Trench II Process with 25 Volts Vgs. Abs. Max Gate Rating for the ultimate low Rds Battery Protection MOSFET. This MOSFET also embodies a breakthrough in packaging technology which enables the device to combine excellent thermal transfer characteristics, high current handling capability, ultralow profile packaging, low gate charge, and low RDS(ON).
Features
* -12.5 A, -30 V. RDS(ON) = 10.5 m @ V GS = -10 V RDS(ON) = 16.5 m @ V GS = -4.5 V * Occupies only 14 mm2 of PCB area. Only 42% of the area of SO-8 * Ultra-thin package: less than 0.76 mm height when mounted to PCB * 3.5 x 4 mm2 footprint * High power and current handling capability
Applications
* Battery management * Load switch * Battery protection
Pin 1 D D D D Pin 1 D D S S S G D S S S S D S S S S D S S S S D D D D D
S
F208P
G
D
Bottom
Top
TA=25oC unless otherwise noted
Absolute Maximum Ratings
Symbol
V DSS V GSS ID PD TJ , Tstg
Parameter
Drain-Source Voltage Gate-Source Voltage Drain Current - Continuous - Pulsed Power Dissipation (Steady State)
Ratings
-30 25 -12.5 -60 2.2 1.0 -55 to +150
Units
V V A W C
(Note 1a) (Note 1a) (Note 1a)
Operating and Storage Junction Temperature Range
Thermal Characteristics
RJA RJB RJ C Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Ball Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1) (Note 1)
56 4.5 0.6
C/W C/W C/W
Package Marking and Ordering Information
Device Marking 208P Device FDZ208P Reel Size 7'' Tape width 8mm Quantity 3000 units
(c)2002 Fairchild Semiconductor Corporation
FDZ208P Rev. C (W)
FDZ208P
Electrical Characteristics
Symbol
BV DSS BVDSS TJ IDSS IGSSF IGSSR
TA = 25C unless otherwise noted
Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage Current, Forward Gate-Body Leakage Current, Reverse
(Note 2)
Test Conditions
V GS = 0 V, ID = -250 A ID = -250 A, Referenced to 25C V DS = -24 V, V GS = 0 V V GS = -25 V, V DS = 0 V V GS = 25 V, V DS = 0 V
Min
-30
Typ
Max Units
V mV/C -1 -100 100 A nA nA
Off Characteristics
-20
On Characteristics
V GS(th) VGS(th) TJ RDS(on)
Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance On-State Drain Current Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance
(Note 2)
V DS = V GS , ID = -250 A ID = -250 A, Referenced to 25C V GS = -10 V, ID = -12.5 A V GS = -4.5 V, ID = -9.5 A V GS = -10 V,ID = -12.5A,TJ =125C V GS = -10 V, V DS = -5 V V DS = -10 V, ID = -12.5 A V DS = -15 V, f = 1.0 MHz V GS = 0 V,
-1
-1.5 5 9 13 11.7
-3
V mV/C m
10.5 16.5 15
ID(on) gFS Ciss Coss Crss td(on) tr td(off) tf Qg Qgs Qgd IS V SD trr Qrr
Notes: 1.
-30 40 2409 614 300 13 11 74 42 25 5 10 24 21 119 68 35
A S pF pF pF ns ns ns ns nC nC nC A V nS nC
Dynamic Characteristics
Switching Characteristics
Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge
V DD = -15 V, V GS = -10 V,
ID = -1 A, RGEN = 6
V DS = -15 V, V GS = -5 V
ID = -12.5 A,
Drain-Source Diode Characteristics and Maximum Ratings
Maximum Continuous Drain-Source Diode Forward Current Drain-Source Diode Forward V GS = 0 V, IS = -1.8 A Voltage Diode Reverse Recovery Time IF = 12.5 A, diF/dt = 100 A/s Diode Reverse Recovery Charge
(Note 2)
-0.7 29.5 30.2
-1.8 -1.2
RJA is determined with the device mounted on a 1 in 2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. The thermal resistance from the
junction to the circuit board side of the solder ball, RJB, is defined for reference. For RJC, the thermal reference point for the case is defined as the top surface of the copper chip carrier. RJC and RJB are guaranteed by design while RJA is determined by the user's board design.
a)
56C/W when mounted on a 1in2 pad of 2 oz copper
b)
119C/W when mounted on a minimum pad of 2 oz copper
Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0%
FDZ208P Rev. C (W)
FDZ208P
Dimensional Outline and Pad Layout
4.000.15 INDEX SLOT CL SOURCE
A
0.30 GATE CL
1 2 3 4 5 6
B
0.65 CL DRAIN 3.600.20
E C
D
2.60
0.65 2.60 TOP VIEW
LAND PATTERN RECOMMENDATION 0.25^0.15
0.76 MAX
SOLDER BALL, 0.300.03 SOLDER BALL CL 0.10 FRONT VIEW 0.30
E
2.60
D
0.51
BALL
C L
C
0.65
B
INDEX SLOT (HIDDEN)
A
1
2
3
4
5
6
SEATING PLANE 0.65 SIDE VIEW GATE 3.25
NOTES: UNLESS OTHERWISE SPECIFIED A) ALL DIMENSIONS ARE IN MILLIMETERS. B) NO JEDEC REGISTRATION REFERENCE AS OF JULY 1999. C) BALL CONFIGURATION TABLE
BOTTOM VIEW
BALL TERMINAL A1,B1,C1,D1,E1,E2,E3, E4,E5,E6,D6,C6,B6,A6 A2 A3,A4,A5,B2,B3,B4,B5,C2, C3,C4,C5,D2,D3,D4,D5,
DESIGNATION DRAIN GATE SOURCE
FDZ208P Rev. C (W)
FDZ208P
Typical Characteristics
60
V GS =-10V -6.0V
-4.5V RDS(ON) NORMALIZED , DRAIN-SOURCE ON-RESISTANCE -3.5V
2.6 2.4 2.2 2 1.8 -4.0V 1.6 1.4 1.2 -8.0V 1 0.8 -10V -4.5V -5.0V -6.0V V GS = -3.5V
-ID, DRAIN CURRENT (A)
45
30
-3.0V
15
0 0 0.5 1 1.5 2 2.5 3 -V DS, DRAIN-SOURCE VOLTAGE (V)
0
15
30 -ID , DRAIN CURRENT (A)
45
60
Figure 1. On-Region Characteristics.
Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.
0.04 RDS(ON) ON-RESISTANCE (OHM) ,
1.6 RDS(ON) NORMALIZED , DRAIN-SOURCE ON-RESISTANCE ID = -12.5A V GS = -10V 1.4
ID = -6.2 A 0.035 0.03 0.025 T A = 125o C 0.02 0.015 T A = 25o C 0.01 0.005
1.2
1
0.8
0.6 -50 -25 0 25 50 75 100 125 150 T J, JUNCTION TEMPERATURE ( oC)
2
4
6
8
10
-V GS, GATE TO SOURCE VOLTAGE (V)
Figure 3. On-Resistance Variation with Temperature.
60 -I S, REVERSE DRAIN CURRENT (A) V DS = -5V -I D, DRAIN CURRENT (A) 45 T A = -55oC 25oC 125o C
Figure 4. On-Resistance Variation with Gate-to-Source Voltage.
100 VGS = 0V 10 1 TA = 125 oC
30
0.1
25o C -55o C
0.01
15
0.001
0 1 1.5 2 2.5 3 3.5 4 -V GS, GATE TO SOURCE VOLTAGE (V)
0.0001 0 0.2 0.4 0.6 0.8 1 1.2 -V SD , BODY DIODE FORWARD VOLTAGE (V)
Figure 5. Transfer Characteristics.
Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.
FDZ208P Rev. C (W)
FDZ208P
Typical Characteristics
10 -V GS, GATE-SOURCE VOLTAGE (V) ID = -12.5A 8 -20V 6 CAPACITANCE (pF) V DS = -10V -15V
3500 3000 CISS 2500 2000 1500 1000 500 f = 1MHz V GS = 0 V
4
COSS
2 CRSS 0 0 10 20 30 40 50 0 5 10 15 20 25 30 Qg, GATE CHARGE (nC) -V DS, DRAIN TO SOURCE VOLTAGE (V)
0
Figure 7. Gate Charge Characteristics.
100 RDS(ON) LIMIT ID, DRAIN CURRENT (A) 10 100ms 1s 10s DC V GS = -10V SINGLE PULSE R JA = 119 oC/W TA = 25o C 0.01 0.01 P(pk), PEAK TRANSIENT POWER (W) 1ms 10ms 40
Figure 8. Capacitance Characteristics.
30
SINGLE PULSE RJA = 119C/W TA = 25C
1
20
0.1
10
0.1
1
10
100
0 0.01
0.1
1
10
100
1000
VDS , DRAIN-SOURCE VOLTAGE (V)
t 1, TIME (sec)
Figure 9. Maximum Safe Operating Area.
Figure 10. Single Pulse Maximum Power Dissipation.
r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE
1
D = 0.5 0.2
0.1
0.1 0.05
RJA(t) = r(t) * R JA RJA = 119 C/W
0.02 0.01
P(pk) t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2
0.01
0.001
SINGLE PULSE
0.0001 0.001
0.01
0.1
1
t1 , TIME (sec)
10
100
1000
Figure 11. Transient Thermal Response Curve.
Thermal characterization performed using the conditions described in Note 1b. Transient thermal response will change depending on the circuit board design.
FDZ208P Rev. C (W)
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACExTM BottomlessTM CoolFETTM CROSSVOLTTM DenseTrenchTM DOMETM EcoSPARKTM E2CMOSTM EnSignaTM FACTTM FACT Quiet SeriesTM
DISCLAIMER
FAST (R) FASTrTM FRFETTM GlobalOptoisolatorTM GTOTM HiSeCTM ISOPLANARTM LittleFETTM MicroFETTM MicroPakTM MICROWIRETM
OPTOLOGICTM OPTOPLANARTM PACMANTM POPTM Power247TM PowerTrench (R) QFETTM QSTM QT OptoelectronicsTM Quiet SeriesTM SILENT SWITCHER (R)
SMART STARTTM STAR*POWERTM StealthTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogicTM TruTranslationTM UHCTM UltraFET (R)
VCXTM
STAR*POWER is used under license
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life systems which, (a) are intended for surgical implant into support device or system whose failure to perform can the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life failure to perform when properly used in accordance support device or system, or to affect its safety or with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Preliminary
First Production
No Identification Needed
Full Production
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4


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