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19-3507; Rev 0; 11/04
KIT ATION EVALU LE B AVAILA
Low-Voltage, Internal Switch, Step-Down/DDR Regulator
General Description Features
Dual 40m Internal n-Channel MOSFETs Integrated Boost Switch +1.3V to +3.6V Input Voltage Range 1% VOUT Accuracy Over Line and Load 1MHz Maximum Switching Frequency DDR Termination Regulator (DDR Mode) Tracking Output Voltage Source/Sink Pulse Skipping 5mA Reference Buffer Output Voltage (Non-DDR Mode) +2.5V, +1.8V, or +1.5V Pin Selectable +0.5V to +2.7V Adjustable 1.1V 0.75% Reference Output Adjustable Soft-Start Inrush Current Limiting < 1A (typ) Shutdown Supply Current < 800A (max) Operating Supply Current Selectable Pulse-Skipping Operation at Light Loads Positive and Negative Current Limit Power-Good Window Comparator Output Short-Circuit Protection
MAX1515
The MAX1515 constant-off-time, pulse-width-modulated (PWM) source/sink step-down DC-DC converter is optimized for use in low-voltage active-termination power rails or chipset power supplies in notebook and subnotebook computers. This device features dual internal n-channel MOSFET power switches for high efficiency and reduced component count. External Schottky diodes are not required. An integrated boost switch eliminates the need for an external boost diode. The internal 40m NMOS power switches easily source and sink continuous load currents up to 3A. The MAX1515 produces an adjustable output from +0.5V to +2.7V and achieves efficiencies as high as 95%. The MAX1515 can be configured as a DDR regulator, producing an output that is exactly half the memory supply rail. The input of the power stage can be taken from the memory supply rail itself, resulting in an efficient power supply that returns the energy to the rail from which it was sourced. The MAX1515 includes a reference buffer that provides 5mA of drive current. The MAX1515 uses a unique current-mode, constantoff-time, PWM control scheme. A selectable pulse-skipping mode maintains high efficiency during light-load operation, yet still sources and sinks current on demand. The MAX1515 can also be operated in fixedPWM mode for low output ripple. The programmable constant-off-time architecture sets switching frequencies up to 1MHz, which allows the user to optimize performance trade-offs between efficiency, output switching noise, component size, and cost. The MAX1515 features an adjustable soft-start to limit surge currents during startup and a low-power shutdown mode to disconnect the input from the output and reduce supply current below 1A. The MAX1515 is available in a 24-pin thin QFN package with an exposed backside pad.

Ordering Information
PART MAX1515ETG MAX1515ETG+ TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 24 Thin QFN 4mm x 4mm 24 Thin QFN 4mm x 4mm
+Denotes lead-free package.
Minimal Operating Circuit
VBIAS (3.0V TO 3.6V) VIN (1.3V TO 3.6V) IN
VDD VCC
BST
Applications
Notebook DDR Memory Termination Active-Termination Buses Chipset/Graphics Processor Supplies
COMP PGOOD SHDN MODE SKIP REF VDDQ (2.5V OR 1.8V) REFIN
MAX1515
VOUT = VTT LX FB PGND GND
FBSEL0 FBSEL1 VREFOUT = VTTR REFOUT SS TOFF
Pin Configuration appears at end of data sheet. ________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
ABSOLUTE MAXIMUM RATINGS
VCC, VDD, LX, SHDN to GND ...................................-0.3V to +4V MODE, IC, PGOOD to GND .....................................-0.3V to +4V COMP, FB, REF, REFIN, REFOUT to GND ....-0.3V to (VCC + 0.3V) FBSEL0, FBSEL1, TOFF, SKIP, SS to GND....-0.3V to (VCC + 0.3V) VDD to VCC ...........................................................-0.3V to + 0.3V IN to VDD ....................................................-0.3V to (VDD + 0.3V) PGND to GND ...................................................... -0.3V to +0.3V LX to BST................................................................. -4V to +0.3V BST to GND .......................................................... -0.3V to +8.0V LX Current (Note 1).............................................................4.7A REF Short Circuit to GND ...........................................Continuous REFOUT Short Circuit to GND....................................Continuous Continuous Power Dissipation (TA = +70C) 24-Pin Thin QFN (derate 20.8mW/C above +70C; part mounted on 1in2 of 1oz copper)........................1667mW Operating Temperature Range ...........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Note 1: LX has clamp diodes to PGND and IN. If continuous current is applied through these diodes, thermal limits must be observed.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = +3.3V, VCC = VDD = SHDN = MODE = +3.3V, VREFIN = VREF, SKIP = GND, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER PWM CONTROLLER Input Voltage Range Output Adjust Range VFB VREFIN VIN VCC, VDD VOUT VIN VIN = +3.3V, ILOAD = 0, MODE = VCC TA = +25C to +85C TA = 0C to +85C 1.3 3.0 0.5 -3 -4 2.463 2.450 1.782 1.773 1.477 1.470 0.492 0.490 0 0 2.5 2.5 1.800 1.800 1.500 1.500 0.500 0.500 0.1 3.6 3.6 2.7 +3 mV +4 2.537 2.550 1.827 1.836 V 1.523 1.530 0.508 0.510 % V V SYMBOL CONDITIONS MIN TYP MAX UNIT
TA = +25C FBSEL0 = VCC, to +85C FBSEL1 = VCC, TA = 0C to REFIN = REF +85C TA = +25C FBSEL0 = VCC, to +85C FBSEL1 = GND, TA = 0C to REFIN = REF VIN = +3.3V, +85C ILOAD = 0, TA = +25C MODE = low FBSEL0=GND to +85C FBSEL1=VCC TA = 0C to REFIN=REF +85C FBSEL0=GND FBSEL1=GND REFIN=0.5V TA = +25C to +85C TA = 0C to +85C
Feedback Voltage Accuracy VFB
Feedback Load-Regulation Error
VIN = +1.3V to +3.6V, ILOAD = 0 to 3A, SKIP = VCC
2
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = +3.3V, VCC = VDD = SHDN = MODE = +3.3V, VREFIN = VREF, SKIP = GND, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Sink-Mode Detect Threshold Source-Mode Detect Threshold MOSFET On-Resistance Switching Frequency Maximum Output Current Current-Limit Threshold SYMBOL VFB VREFIN VFB VREFIN RNMOS fSW IOUT(RMS) ILIMIT_P ILIMIT_N Pulse-Skipping Current Threshold ISKIP_P IZX_P IZX_N FB Input Bias Current Off-Time tOFF CONDITIONS MODE = VCC, VREFIN = +0.5V to +1.5V MODE = VCC, VREFIN = +0.5V to +1.5V VCC = VDD = VIN = +3.3V, ILOAD = 0.5A (Note 2) (Note 3) VIN = +3.3V, MODE = GND or VCC, positive or sourcing mode MODE = VCC, negative or sinking mode VIN = +3.3V, MODE = GND or VCC, positive or sourcing mode VIN = +3.3V, MODE = GND or VCC, positive or sourcing mode MODE = VCC, negative or sinking mode FB = 1.01 x VTARGET (Note 4) VFB > 0.3 x VTARGET (Note 4) RTOFF = 33.2k RTOFF = 110k RTOFF = 499k Extended Off-Time Minimum On-Time Maximum On-Time SS Source Current SS Sink Current tOFF(EXT) tON(MIN) tON(MAX) ISS(SRC) ISS(SNK) MODE = GND, FBSEL0 = GND, FBSEL1 = GND, VFB = 1.01 x VTARGET MODE = VCC, VFB = VTARGET ICC + IDD + IIN IIN ILX SHDN = MODE = GND, LX = 0V or 3.3V SHDN = MODE = GND, LX = 0V SHDN = MODE = GND, LX = 3.3V VFB < 0.3 x VTARGET (Notes 2, 4) (Note 2) 5 3.50 100 -50 0.270 0.85 3.8 0.34 1.00 4.5 4x tOFF 180 11 5.25 6.75 0.5 3.3 3.60 4.2 -3.0 0.8 200 -350 +50 0.405 1.15 5.2 s ns s A A s nA 1.1 A 4.85 MIN +18 -32 0.04 TYP MAX +32 -18 0.10 1 UNIT mV mV MHz A A
MAX1515
Zero Cross Current Threshold
mA
450
800 A
No-Load Supply Current
ICC + IDD + IIN
VIN = 3.3V (not switching) (Note 4)
700 0.2 0.2 0.1
1200 20 20 20 A
Shutdown Supply Currents
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3
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = +3.3V, VCC = VDD = SHDN = MODE = +3.3V, VREFIN = VREF, SKIP = GND, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER REFERENCE TA = +25C to +85C Reference Voltage VREF VCC = +3.0V to +3.6V TA = 0C to +85C 1.0923 1.0907 1.100 1.100 1.1077 V 1.1094 10 0.5 IREFOUT = -1mA to +1mA IREFOUT = -5mA to +5mA -10 -20 -50 +165 2.5 -13 +7 2.7 -10 +10 10 0.1 1 2.0 0.8 -0.5 +0.5 2.9 -7 +13 1.5 +10 mV VREFIN = +0.5V to +1.5V VREFIN = 1.1V Rising, hysteresis = 15C No load, falling edge, hysteresis = 1% No load, rising edge, hysteresis = 1% tPGOOD FB forced 2% beyond PGOOD trip threshold ISINK = 1mA High state, forced to 3.6V SKIP, SHDN, MODE, FBSEL0, FBSEL1 SKIP, SHDN, MODE, FBSEL0, FBSEL1 SKIP, SHDN, MODE, FBSEL0, FBSEL1 +20 +50 nA C V % % s V A V V A mV V SYMBOL CONDITIONS MIN TYP MAX UNIT
Reference Load Regulation REFIN Input Voltage Range VREFIN VREFIN VREFOUT IREFIN TSHDN
IREF = -1A to +50A VCC = +3.0V to +3.6V VREFIN = +0.5V to +1.5V
REFOUT Output Accuracy
REFIN Input Bias Current FAULT DETECTION Thermal Shutdown Undervoltage-Lockout Threshold PGOOD Trip Threshold (Lower) PGOOD Trip Threshold (Upper) PGOOD Propagation Delay PGOOD Output Low Voltage PGOOD Leakage Current INPUTS AND OUTPUTS Logic Input High Voltage Logic Input Low Voltage Logic Input Current
VCC(UVLO) VCC rising, 2% falling-edge hysteresis
4
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
ELECTRICAL CHARACTERISTICS
(Circuit of Figure 1, VIN = +3.3V, VCC = VDD = SHDN = MODE = +3.3V, VREFIN = VREF, SKIP = GND, TA = -40C to +85C, unless otherwise noted. Note 5)
PARAMETER PWM CONTROLLER Input Voltage Range Output Adjust Range VFB VREFIN VIN VCC, VDD VOUT VIN VIN = +3.3V, ILOAD = 0, MODE = VCC FBSEL0 = VCC, FBSEL1 = VCC, REFIN = REF FBSEL0 = VCC, FBSEL1 = GND, REFIN = REF FBSEL0 = GND, FBSEL1 = VCC, REFIN = REF FBSEL0 = GND, FBSEL1 = GND, REFIN = 0.5V Sink-Mode Detect Threshold Source-Mode Detect Threshold nFET On-Resistance Switching Frequency Current-Limit Threshold Pulse-Skipping Current Threshold VFB VREFIN VFB VREFIN RNMOS fSW ILIMIT_P ISKIP_P MODE = VCC, VREFIN = +0.5V to +1.5V MODE = VCC, VREFIN = +0.5V to +1.5V VCC = VDD = VIN = +3.3V, ILOAD = 0.5A (Note 2) VIN = +3.3V, MODE = GND or VCC, positive or sourcing mode VIN = +3.3V, MODE = GND or VCC, positive or sourcing mode VFB > 0.3 x VTARGET (Note 4) RTOFF = 33.2k RTOFF = 110k RTOFF = 499k Maximum On-Time SS Source Current SS Sink Current tON(MAX) ISS(SRC) ISS(SNK) 3.35 0.4 0.250 0.8 3.8 5 3 100 7 1.3 3.0 0.5 -5 3.6 3.6 VCC +5 V V mV SYMBOL CONDITIONS MIN TYP MAX UNIT
MAX1515
2.438
2.562
Feedback Voltage Accuracy VFB VIN = +3.3V, ILOAD = 0, MODE = low
1.755
1.845 V
1.463
1.538
0.487
0.513
+15 -35
+35 -15 0.10 1 5.05 1.2 0.425 1.2 5.2
mV mV MHz A A
Off-Time
tOFF
s s A A
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5
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
ELECTRICAL CHARACTERISTICS (continued)
(Circuit of Figure 1, VIN = +3.3V, VCC = VDD = SHDN = MODE = +3.3V, VREFIN = VREF, SKIP = GND, TA = -40C to +85C, unless otherwise noted. Note 5)
PARAMETER SYMBOL CONDITIONS MODE = GND, FBSEL0 = FBSEL1 = GND, VFB = 1.01 x VTARGET MODE = VCC VFB = VTARGET ICC + IDD + IIN IIN ILX REFERENCE Reference Voltage Reference Load Regulation REFIN Input Voltage Range VREFIN VREFIN VREFOUT VREF VCC = +3.0V to +3.6V IREF = -1A to +50A VCC = +3.0V to +3.6V, VCC > VREFIN + 1.35V VREFIN = +0.5V to +1.5V VREFIN = +0.5V to +1.5V IREFOUT = -1mA to +1mA IREFOUT = -5mA to +5mA 0.5 -15 -25 1.086 1.114 12 1.5 +15 mV +25 V mV V SHDN = MODE = GND, LX = 0V or 3.3V SHDN = MODE = GND, LX = 0V SHDN = MODE = GND, LX = 3.3V MIN TYP MAX UNIT
900 A
No-Load Supply Current
ICC + IDD + IIN
VIN = 3.3V (Note 4)
1300 20 20 20 A
Shutdown Supply Currents
REFOUT Output Accuracy
FAULT DETECTION Undervoltage-Lockout Threshold PGOOD Trip Threshold (Lower) PGOOD Trip Threshold (Upper) INPUTS AND OUTPUTS Logic Input High Voltage Logic Input Low Voltage SKIP, SHDN, MODE, FBSEL0, FBSEL1 SKIP, SHDN, MODE, FBSEL0, FBSEL1 2.0 0.8 V V VCC(UVLO) VCC rising, 2% falling-edge hysteresis No load, falling edge, hysteresis = 1% No load, rising edge, hysteresis = 1% 2.40 -13 +7 2.95 -7 +13 V % %
Note 2: Note 3: Note 4: Note 5:
Guaranteed by design. Not production tested. Not tested; guaranteed by layout. Maximum output current may be limited by thermal capability to a lower value. VTARGET is the set output voltage determined by VREFIN, FBSEL0, and FBSEL1. Specifications to -40C are guaranteed by design, not production tested.
6
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
Typical Operating Characteristics
(MAX1515 Circuit of Figure 1, VIN = 2.5V, VDD = VCC = SHDN = MODE = 3.3V, TA = +25C, unless otherwise noted.)
MAX1515
1.25V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX1515 toc01
1.25V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX1515 toc02
1.25V OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1515 toc03
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10
SOURCE, SKIP
100 90 80 EFFICIENCY (%) 70 60 50 40 30 SOURCE, PWM SINK, PWM VIN = 2.5V VOUT = 1.25V RTOFF = 220k 0.01 0.1 LOAD CURRENT (A) 1 SOURCE, SKIP SINK, SKIP
1.258
SINK, SKIP
OUTPUT VOLTAGE (V)
1.254 SINK, PWM SOURCE, PWM 1.250 SINK, SKIP 1.246 SOURCE, SKIP VIN = 2.5V VOUT = 1.25V RTOFF = 110k -3 -2 -1 0 1 2 3 4
SOURCE, PWM
SINK, PWM VIN = 2.5V VOUT = 1.25V RTOFF = 110k
20 10 10 0 0.001
0 0.001
1.242 10 LOAD CURRENT (A)
0.01
0.1 LOAD CURRENT (A)
1
0.9V OUTPUT EFFICIENCY vs. LOAD CURRENT
MAX1515 toc04
0.9V OUTPUT EFFICIENCY vs. LOAD CURRENT
90 80 EFFICIENCY (%) 70 60 50 40 30 SOURCE, PWM SINK, PWM VIN = 1.8V VOUT = 0.9V RTOFF = 220k 0.01 0.1 LOAD CURRENT (A) 1 10 SOURCE, SKIP SINK, SKIP
MAX1515 toc05
100 90 80 EFFICIENCY (%) 70 60 50 40 30 20 10
SOURCE, SKIP
100
SINK, SKIP SOURCE, PWM SINK, PWM VIN = 1.8V VOUT = 0.9V RTOFF = 110k 0.01 0.1 LOAD CURRENT (A) 1 10
20 10 0 0.001
0 0.001
0.9V OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1515 toc06
SWITCHING FREQUENCY vs. LOAD CURRENT
PWM MODE SWITCHING FREQUENCY (kHz) 500 400 300 200 SKIP MODE 100 0 VIN = 2.5V VOUT = 1.25V -3 -2 -1 0 1 2 3 4
MAX1515 toc07
0.908
600
OUTPUT VOLTAGE (V)
0.904 SINK, PWM 0.900 SINK, SKIP 0.896 SOURCE, SKIP VIN = 1.8V VOUT = 0.9V RTOFF = 110k -3 -2 -1 0 1 2 3 4 SOURCE, PWM
0.892 LOAD CURRENT (A)
LOAD CURRENT (A)
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7
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
Typical Operating Characteristics (continued)
(MAX1515 Circuit of Figure 1, VIN = 2.5V, VDD = VCC = SHDN = MODE = 3.3V, TA = +25C, unless otherwise noted.)
REF VOLTAGE vs. REF LOAD CURRENT
MAX1515 toc08
REFOUT VOLTAGE REGULATION vs. LOAD CURRENT
MAX1515 toc09
TOFF TIME vs. TOFF RESISTOR
MAX1515 toc10
1.104
1.265 1.260 REFOUT VOLTAGE (V) 1.255 1.250 1.245 1.240
5
REF VOLTAGE ERROR (V)
1.102
4
1.100
TOFF (s) -15 -10 -5 0 5 10 15
3
2
1.098
1
1.096 0 20 40 60 80 100 REF LOAD CURRENT (A)
1.235 REFOUT LOAD CURRENT (mA)
0 0 100 200 300 400 500 TOFF RESISTOR (k)
PEAK CURRENT LIMIT vs. SS VOLTAGE
MAX1515 toc11
STARTUP AND SHUTDOWN WAVEFORM (HEAVY LOAD)
MAX1515 toc12
5
3.3V 0 0
A B C
PEAK CURRENT LIMIT (A)
4
3
0 1A
2
0 1.25V VIN = 2.5V VOUT = 1.25V RTOFF = 110k 1.0 1.2 1.4 SS VOLTAGE (V) 1.6 1.8 A: PGOOD, 5V/div B: SS, 2V/div C: SHDN, 5V/div
D
1
0
E SKIP = GND, RLOAD = 10 500s/div D: INDUCTOR CURRENT, 1A/div E: OUTPUT VOLTAGE, 1V/div
0
8
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
Typical Operating Characteristics (continued)
(MAX1515 Circuit of Figure 1, VIN = 2.5V, VDD = VCC = SHDN = MODE = 3.3V, TA = +25C, unless otherwise noted.)
STARTUP AND SHUTDOWN WAVEFORM (LIGHT LOAD)
MAX1515 toc13
MAX1515
DDR-MODE LOAD TRANSIENT
MAX1515 toc14
3.3V 0 0 0 1A 0 1.25V 0 SKIP = GND, RLOAD = 100 1ms/div A: PGOOD, 5V/div B: SS, 2V/div C: SHDN, 5V/div
A B C
2.5V A 0 0 2A B
D
0 2A
C
E
1.25V
D
20s/div A: LX, 2V/div B: LOAD CONTROL, 5V/div SKIP = GND C: INDUCTOR CURRENT, 2A/div D: OUTPUT VOLTAGE, 50mV/div
D: INDUCTOR CURRENT, 1A/div E: OUTPUT VOLTAGE, 1V/div
DDR-MODE LOAD TRANSIENT
MAX1515 toc15
DDR-MODE LOAD TRANSIENT
MAX1515 toc16
2.5V A 0 0 2A 0 -2A 1.25V D C B
2.5V A 0 0 2A 0 -2A 1.25V
20s/div
B
C
D
A: LX, 2V/div B: LOAD CONTROL, 5V/div SKIP = GND
C: INDUCTOR CURRENT, 2A/div D: OUTPUT VOLTAGE, 50mV/div
20s/div A: LX, 2V/div B: LOAD CONTROL, 5V/div SKIP = GND C: INDUCTOR CURRENT, 2A/div D: OUTPUT VOLTAGE, 50mV/div
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9
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
Typical Operating Characteristics (continued)
(MAX1515 Circuit of Figure 1, VIN = 2.5V, VDD = VCC = SHDN = MODE = 3.3V, TA = +25C, unless otherwise noted.)
DDR-MODE LOAD TRANSIENT
MAX1515 toc17
DDR-MODE LOAD TRANSIENT
MAX1515 toc18
2.5V A 0 0 2A 0 -2A 1.25V D C B
2.5V A 0 0 2A 0 -2A 1.25V D C B
20s/div A: LX, 2V/div B: LOAD CONTROL, 5V/div SKIP = GND C: INDUCTOR CURRENT, 2A/div D: OUTPUT VOLTAGE, 50mV/div A: LX, 2V/div B: LOAD CONTROL, 5V/div SKIP = GND
20s/div C: INDUCTOR CURRENT, 2A/div D: OUTPUT VOLTAGE, 50mV/div
REFIN TRANSITION
MAX1515 toc19
REFOUT LOAD TRANSIENT
MAX1515 toc20
3.3V 0 1.5V 1.0V 1.5V 1.0V 2A 0A -2A
A B C
+10mA A -10mA
1.26V D 1.25V 1.24V B
50s/div A: PGOOD, 5V/div B: REFIN, 0.5V/div SKIP = GND C: OUTPUT VOLTAGE, 0.5V/div D: INDUCTOR CURRENT, 2A/div
10s/div A: REFOUT LOAD, 20mA/div B: REFOUT VOLTAGE, 10mV/div
10
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
Pin Description
PIN 1, 2 3 4 NAME PGND IC VDD FUNCTION Power Ground. Internal connection to the source of the internal synchronous-rectifier switch. Connect both PGND pins together. Internally Connected Pin. Connect to PGND. Supply Input for the Low-Side Gate Drive and REFOUT Buffer. Connect to the system supply voltage, +3.0V to +3.6V. Bypass to PGND with a 1F (min) ceramic capacitor. VDD supplies power to the drivers and the REFOUT buffer. REFIN Buffered Output. REFOUT provides a buffered output voltage of REFIN when MODE = VCC. Bypass to GND with a 0.47F ceramic capacitor. REFOUT is disabled when MODE = GND. Soft-Start. Connect a capacitor from SS to GND to limit the inrush current during startup. Power-Good Open-Drain Output. PGOOD is low when the output voltage is more than 10% above or below the normal regulation point. PGOOD is high impedance when the output is in regulation. PGOOD is low in shutdown. Off-Time Select Input. Connect a resistor from TOFF to GND to adjust the off-time. Feedback Input. In DDR mode (MODE = VCC), FB regulates to the voltage at REFIN. In non-DDR mode (MODE = GND), connect directly to the output for preset voltage operation or to a resistive voltage-divider for adjustable-mode operation. Integrator Compensation. Connect a 470pF capacitor from COMP to VCC for integrator compensation. Analog Supply Input. Connect to the system supply voltage, +3.0V to +3.6V, with a series 10 resistor. Bypass to GND with a 1F (min) ceramic capacitor. Analog Ground. Connect exposed backside pad to GND. +1.1V Reference Voltage Output. Bypass to GND with a 1.0F bypass capacitor. Can supply 50A for external loads. Reference turns off in shutdown. External Reference Input. In DDR mode (MODE = VCC), REFIN sets the voltage that FB regulates to. In non-DDR mode (MODE = GND), connect REFIN to REF. Shutdown Control. Low disables the switching regulator. SHDN and MODE select the operational mode of the MAX1515. SHDN MODE Description Low Low Step-down regulator and REFOUT OFF Low High Step-down regulator OFF, REFOUT active High Low Step-down regulator ON, non-DDR mode, REFOUT OFF High High Step-down regulator ON, DDR mode, REFOUT active Mode-Select Pin. Mode sets the regulator into DDR mode or non-DDR operation mode, and controls the REFOUT buffer. When MODE = VCC, MAX1515 is set in DDR mode and REFOUT is active. When MODE = GND, MAX1515 is set in non-DDR mode and REFOUT is disabled. See the Modes of Operation (MODE) section. Used with FBSEL1 to set the output voltage of the step-down regulator when MODE = GND. Connect to GND if MODE = VCC.
MAX1515
5 6 7 8
REFOUT SS PGOOD TOFF
9
FB
10 11 12 13 14
COMP VCC GND REF REFIN
15
SHDN
16
MODE
17
FBSEL0
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11
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
Pin Description (continued)
PIN 18 19 20 21, 22 23, 24 NAME FBSEL1 SKIP BST LX IN FUNCTION Used with FBSEL0 to set the output voltage of the step-down regulator when MODE = GND. Connect to GND if MODE = VCC. Pulse-Skipping Control Input. Connect to VCC for low-noise, forced-PWM mode. Connect to GND to enable automatic pulse-skipping operation. Boost Flying-Capacitor Connection. Connect an external 0.01F capacitor as shown in the standard application circuit (Figure 1). Inductor Switched Node. LX is the connection for the source of the high-side NMOS power switch and drain of the low-side NMOS synchronous-rectifier switch. Connect both LX pins together. Power Input. Supply voltage input for the switching regulator. Connect to a +1.3V to +3.6V supply voltage. Connect both IN pins together.
Table 1. Component Selection for Standard Applications
COMPONENT Input Voltage (VIN) Output Voltage (VOUT) CIN, Input Capacitor Switching Frequency (fSW) L, Inductor 2A AT 1.25VOUT DDR MODE (MODE = VCC) 2.3V to 2.7V 1.25V 33F, 6.3V, ceramic TDK C3225XR0J336V 250kHz 2.5H, 4.5A, Sumida CDRH8D28-2R5 330F, 18m Sanyo 2R5TPE330MI POSCAP 221k, 1% 500kHz 1.2H, 6.8A, Sumida CDR7D28MN-1R2 220F, 18m Sanyo 2R5TPE220MI POSCAP 110k, 1% 2A AT 0.9VOUT DDR MODE (MODE = VCC) 1.6V to 2.0V 0.9V 33F, 6.3V, ceramic TDK C3225XR0J336V 250kHz 2.5H, 4.5A, Sumida CDRH8D28-2R5 330F, 18m Sanyo 2R5TPE330MI POSCAP 221k, 1% 500kHz 1.2H, 6.8A, Sumida CDR7D28MN-1R2 220F, 18m Sanyo 2R5TPE220MI POSCAP 110k, 1%
COUT, Output Capacitor RTOFF
Table 2. Component Suppliers
SUPPLIER Coilcraft Coiltronics Kemet Panasonic Sanyo Sumida Taiyo Yuden TDK TOKO WEBSITE www.coilcraft.com www.coiltronics.com www.kemet.com www.panasonic.com www.sanyo.com www.sumida.com www.t-yuden.com www.component.tdk.com www.tokoam.com
Standard Application Circuit
The MAX1515 standard application circuit (Figure 1) generates a tracking output voltage and a reference buffer output required for DDR termination regulators. See Table 1 for component selections. Table 2 lists the component manufacturers.
Detailed Description
The MAX1515 synchronous, current-mode, constant off-time, PWM DC-DC converter steps down an input voltage (VIN) from +1.3V to +3.6V to an output voltage from +0.5V to +2.7V. The MAX1515 output delivers up to 3A of continuous current. Internal 40m NMOS power switches improve efficiency, reduce component count, and eliminate the need for a boost diode or any external Schottky diodes (Figure 2).
12
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
VBIAS (3.0V TO 3.6V) R1 10 CVCC 1F CVDD 1F VCC COMP PGOOD PWM MODE SKIP MODE ON OFF VCC (DDR MODE) CREF 1F RTOFF 110k TOFF R3 10k VDDQ (2.5V OR 1.8V) 1% REFIN R4 10k 1% CREFIN 0.01F SS SKIP SHDN MODE REF REFOUT CREFOUT 0.47F VREFOUT = VTTR RSS (OPTIONAL) CSS 0.01F
MAX1515
CBST 0.01F VIN (1.3V TO 3.6V) IN L 1.2H LX FB PGND GND CIN 33F VOUT = VTT = VDDC / 2 COUT 220F
VDD
BST
R2 100k
CCOMP 470pF
FBSEL0 FBSEL1
SEE TABLE 1 FOR COMPONENT SPECIFICATIONS
Figure 1. Standard Application Circuit
VCC REF GND PGOOD PGOOD LOGIC REF 1.1V
FB
FBSEL1 FBSEL DECODE
FBSEL0
COMP
SKIP
SS
BST
FB GAIN
MODE SOFTSTART MAX1515
VDD
Gm
CURRENT SENSE (+/-) ZX(-) ERR PWM LOGIC H-SIDE DRIVER VDD L-SIDE DRIVER CURRENT SENSE ZX(+) SHDN
IN
REFOUT
REF BUF
LX
REFIN MODE TIMER
SNK/SRC THRESHOLD
SNK SINK/ SOURCE SRC LOGIC
PGND
TOFF
Figure 2. Functional Diagram ______________________________________________________________________________________ 13
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
+3.3V Bias Supply (VCC and VDD)
The MAX1515 requires a 3.3V bias supply for its internal circuitry. Typically, this 3.3V bias supply is the notebook's 95%-efficient, 3.3V system supply. The 3.3V bias supply must provide VCC (PWM controller) and VDD (gate-drive and reference buffer power), so the maximum current drawn is: IBIAS = ICC + IREFOUT + fSW (QG(LOW) + QG(HIGH)) where ICC is 450A (typ), fSW is the switching frequency, and QG(LOW) and QG(HIGH) are the internal MOSFET total gate charge of approximately 1nC. The input supply (VIN) and 3.3V bias inputs (VCC and VDD) can be connected together if the input source is a fixed 3.0V to 3.6V supply. If the 3.3V bias supply powers up prior to the input supply, the enable signal (SHDN going from low to high) must be delayed until the input voltage is present to ensure startup. Soft-Start Current Limit Soft-start allows a gradual increase of the internal current limit to reduce input surge currents at startup and at exit from shutdown. A timing capacitor, CSS, placed from SS to GND sets the rate at which the internal current limit is changed. Upon power-up, when the device comes out of undervoltage lockout (2.6V typ) or after the SHDN pin is pulled high, a 5A (typ) constant-current source charges the soft-start capacitor and the voltage on SS increases. When the voltage on SS is less than approximately 0.7V, the current limit is set to zero. As the voltage increases from 0.7V to approximately 1.8V, the current limit is adjusted from 0 to the current-limit threshold (see the Electrical Characteristics). The voltage across the soft-start capacitor changes with time according to the equation: VSS = ISS(SRC) x t CSS
Current Limit
The MAX1515 provides peak current limiting to protect the MOSFETs during source/sink overload and short circuit. During source mode the controller switches the high-side MOSFET off when the inductor current exceeds 4.2A. Use the following equation to calculate the maximum source current: ISOURCE _ MAX = ILIMIT _ P - VOUT x t OFF 2xL
where ISS(SRC) is the soft-start source current from the Electrical Characteristics. The time when full current limit is available is given by: t= CSS x 1.8V ISS(SRC)
The soft-start current limit varies with the voltage on the soft-start pin, SS, according to the equation: V - 0.7V SSILIMIT = SS x ILIMIT _ P VREF where ILIMIT_P is the positive current threshold from the Electrical Characteristics. The constant-current source stops charging once the voltage across the soft-start capacitor reaches 1.8V (Figure 3). Adjustable Positive Current Limit The MAX1515 has internal current-limit circuitry that limits the maximum current through the NMOS to 4.2A. For applications that require a lower current limit, the maximum current limit can be reduced by placing a resistor (RSS) from SS to GND. The time constant for the soft-start current limit is RSS x CSS. V x ILIMIT RSS = REF + 0.7V / ISS(SRC) ILIMIT _ P where ILIMIT is the desired reduced current limit, and I LIMIT_P and I SS(SRC) are taken from the Electrical Characteristics.
where ISOURCE_MAX is the maximum source current, ILIMIT_P is the source inductor current limit (4.2A typ), and tOFF is the fixed off-time. For typical operating conditions and component selection, this results in a maximum source current of 3.7A. In sink mode, the MAX1515 does not issue an off-time until the inductor current is above -3.2A. Use the following equation to calculate the maximum sink current:
ISINK _ MAX = ILIMIT _ N + VOUT t OFF
-
2( VIN - VOUT ) t DLY 2L
where ISINK_MAX is the maximum sink current, ILIMIT_N is the sink inductor current limit (-3.0A typ), tDLY is the current-limit propagation delay of approximately 500ns, and tOFF is the fixed off-time. For typical operating conditions and component selection, this results in a maximum sink current of -2.5A.
14
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
SHDN 1.8V 0.7V VSS (V) ILIMIT_P
A capacitor, CCOMP, from COMP to VCC compensates the transconductance amplifier. For stability, choose CCOMP = 470pF.
MAX1515
Modes of Operation (MODE)
Use MODE to configure the MAX1515 for DDR mode (MODE = VCC) or non-DDR mode (MODE = GND). In DDR mode, the MAX1515 can sink current even while SKIP is low (see the Pulse Skipping (Source Mode) and Pulse Skipping (Sink Mode) sections). Also, DDR mode enables the REFOUT buffer, providing a buffered output of the REFIN voltage. In non-DDR mode, the MAX1515 can only source current when SKIP is low. The REFOUT buffer is also disabled in non-DDR mode.
ILIMIT (A)
Figure 3. Soft-Start Current Limit
Short-Circuit/Overload Protection
The MAX1515 can sustain a constant short circuit or overload. Under a source-mode short-circuit or overload condition, when V FB < 0.3 x V TARGET , the MAX1515 uses an extended off-time to control the current. Operation during a short circuit or overload is similar to forced-PWM mode except the off-time is 4 x tOFF. At the end of each off-time, the high-side NMOS switch turns on and remains on until the output is in regulation or the current through the switch increases to the maximum current limit. When the high-side NMOS switch turns off, it remains off for four times the programmed off-time (tOFF), and the low-side NMOS synchronous switch turns on. Since either NMOS switch is always on, the inductor current is continuous. The RMS inductor current during a short circuit remains below the maximum current-limit threshold. The MAX1515 operates using the extended off-time until the short circuit or overload is removed and V FB > 0.3 x V TARGET . Prolonged short circuit or overload can result in thermal shutdown.
Light-Load Operation (SKIP)
The MAX1515 includes a pulse-skipping mode that reduces current consumption during light loads. To configure the MAX1515 for pulse-skipping mode, connect SKIP to GND. Forced-PWM mode keeps the switching frequency relatively constant and is desirable in applications that must always keep the frequency of conducted and radiated emissions in a narrow band. Visit Maxim's website (www.maxim-ic.com) for more information on how to control electromagnetic interference (EMI). Pulse-skipping mode has a dynamic switching frequency under light loads and is desirable in applications that require high efficiency at light loads. Forced-PWM Mode Connect SKIP to VCC to force the MAX1515 to operate in low-noise, constant-off-time PWM mode. Constant off-time PWM architecture provides a relatively constant switching frequency (see the Frequency Variation with Output Current section). A single resistor (RTOFF) sets the high-side NMOS power-switch off-time that results in a switching frequency up to 1MHz, allowing performance trade-offs in efficiency, switching noise, component size, and cost. Forced-PWM mode regulates the output voltage by increasing the high-side NMOS switch on-time to increase the amount of energy transferred to the load per cycle. At the end of each off-time, the high-side NMOS switch turns on and remains on until the output is in regulation or the current through the switch reaches the 4.2A current limit. When the high-side NMOS switch turns off, it remains off for the programmed off-time (t OFF), and the low-side NMOS synchronous switch turns on. The low-side NMOS switch remains on until the end of tOFF. Since either NMOS switch is always on in PWM mode, the inductor current is continuous.
Summing Comparator
Three signals are added together at the input of the summing comparator (Figure 2): an output-voltage error signal relative to the reference voltage, an integrated output-voltage error-correction signal, and the sensed high-side NMOS switch current. The integrated error signal is provided by a transconductance amplifier with an external capacitor at COMP. This integrator provides high DC accuracy without the need for a highgain amplifier. Connecting a capacitor at COMP modifies the overall loop response (see the Integrator Amplifier section).
Integrator Amplifier
The MAX1515 includes an internal transconductance amplifier that improves the output DC accuracy.
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15
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
Table 3. Modes of Operation
SHDN Low Low High High High High MODE PIN Low High Low Low High High SKIP X X Low High Low High REFOUT BUFFER Off, High-Z On Off, High-Z Off, High-Z On On STEP-DOWN REGULATOR MODE Off Off On, non-DDR mode. FB regulates to preset voltage or 0.5V. On, non-DDR mode. FB regulates to preset voltage or 0.5V. On, DDR mode. FB regulates to REFIN. On, DDR mode. FB regulates to REFIN. STEP-DOWN REGULATOR CURRENT Off Off Source only. Pulse-skipping mode. Source/sink. Forced-PWM mode. Source/sink. Pulse-skipping mode. Source/sink. Forced-PWM mode.
X = Don't care.
Pulse Skipping (Source Mode) Connect SKIP to GND to allow the MAX1515 to automatically switch between high-efficiency pulse-skipping mode under light loads and PWM mode under heavy loads. The transition from PWM mode to pulse-skipping mode occurs when the load current is half the pulseskipping mode current threshold (800mA typ). In pulse-skipping mode, the switching frequency is reduced to increase efficiency. The inductor current is discontinuous in this mode, and the MAX1515 only initiates an LX switching cycle when VFB < VREFIN. When V FB falls below V REFIN, the high-side NMOS switch turns on and remains on until output is in regulation and the current through the switch increases to the positive pulse-skipping-mode current threshold (I SKIP_P ) of 800mA. When the high-side NMOS switch turns off, the low-side NMOS synchronous switch turns on and remains on until the current through the switch decreases to the zero-cross-current threshold of 200mA. Pulse Skipping (Sink Mode) When pulse-skipping operation is selected (SKIP = GND) while in DDR mode (MODE = V CC ), the MAX1515's source/sink controller switches operating modes when the output voltage crosses either hysteretic sink/source thresholds (V REFIN 25mV). In pulse-skipping source mode, the MAX1515 regulates the valley of the output ripple voltage (see the Pulse Skipping (Source Mode) section). When the output voltage rises above the sink-mode threshold, the MAX1515 enters sink mode. The MAX1515 begins each sinkmode cycle by turning on the low-side NMOS. The lowside NMOS remains on until the off-time (tOFF). After the low-side NMOS turns off, the high-side NMOS turns on
Table 4. Output-Voltage Programming
FBSEL0 GND GND VCC VCC FBSEL1 GND VCC GND VCC OUTPUT VOLTAGE Adjustable VFB = VREFIN 1.5V 1.8V 2.5V
and remains on until the current through the switch reaches the zero-cross-current threshold of -350mA. As long as the output voltage remains below the feedback threshold, the controller remains in the high-impedance state. Under light-load conditions, this allows the sinkmode controller to automatically skip pulses. Under heavy-load conditions, the output voltage remains above the feedback threshold, forcing the sink-mode controller to emulate typical forced-PWM operation. The pulse-skipping current threshold allows the sinkmode control scheme to automatically switch between pulse-skipping PFM and nonskipping PWM operation. This mechanism forces the boundary between continuous and discontinuous inductor-current operation to be half the negative pulse-skipping current threshold.
Output Voltage in Non-DDR Mode
In non-DDR mode (MODE = GND and VREFIN = VREF), the output of the MAX1515 is selectable between one of three preset output voltages: 2.5V, 1.8V, and 1.5V. For a preset output voltage, connect FB to the output voltage and connect FBSEL0 and FBSEL1 as indicated in Table 4. For an adjustable output voltage, connect FBSEL0 and FBSEL1 to GND and connect REFIN to a
16
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
resistive divider between REF and ground (Figure 5). Regulation is maintained for adjustable output voltages when VFB = VREFIN. Use 100k for RB. RA is given by the equation: RB VFB = VREF RA + RB where VREF = 1.1V. The preset output voltages use an internally trimmed resistor-divider network that sets the output voltage to the correct level when REFIN is connected to REF. Connecting REFIN to other voltage levels while using the preset voltage modes results in a ratiometrically scaled output voltage. Output Voltage in DDR Mode In DDR mode (MODE = VCC), the MAX1515 regulates FB to the voltage set at REFIN. For DDR applications, the termination supply must track to exactly half the memory supply voltage. Figure 1 shows the MAX1515 configured for DDR applications.
MAX1515
LOAD CURRENT
0 -2A 0
INDUCTOR CURRENT
-2A
OUTPUT VOLTAGE
VREFIN
VIN LX VOLTAGE tOFF VOUT GND
Figure 4. Sink-Mode Waveforms
L REF RA REFIN RB MODE FBSEL0 FBSEL1
MAX1515
LX
VOUT COUT
PGND GND FB
Reference Buffer (REFOUT)
A unity-gain amplifier provides a buffered output for the reference input (V REFIN ) when MODE = V CC . This transconductance amplifier must be compensated with a 0.47F or greater ceramic capacitor. Larger capacitor values decrease the amplifier's bandwidth, thereby increasing the response time to dynamic input-voltage changes. The buffer allows this dynamic reference to remain within 20mV of the input voltage (VREFIN) even when loaded with 5mA. The input voltage range of the amplifier is 0.5V to 1.5V. The reference buffer shuts down when MODE = GND.
Figure 5. Setting VOUT with a Resistive Voltage-Divider at REFIN
VSHDN. The MAX1515 is reactivated after the junction temperature cools to +150C. Junction-to-ambient thermal resistance, JA, is highly dependent on the amount of copper area connected to the exposed backside pad. Airflow over the board significantly reduces JA. For heatsinking purposes, evenly distribute the copper area connected at the IC among the high-current pins. Refer to the Maxim website (www.maxim-ic.com) for QFN thermal considerations.
Power-Good Output (PGOOD)
PGOOD is the open-drain output for a window comparator that continuously monitors the output. PGOOD is actively held low in shutdown and during soft-start. After soft-start terminates, PGOOD becomes high impedance as long as the respective output voltage is within 10% of the nominal regulation voltage. When the output voltage drops 10% below or rises 10% above the nominal regulation voltage, the MAX1515 pulls the power-good output (PGOOD) low by turning on the MOSFET (Figure 2). For logic-level output voltages, connect an external pullup resistor between PGOOD and VCC. A 100k resistor works well in most applications.
Thermal Resistance
Power Dissipation
Power dissipation in the MAX1515 is dominated by conduction losses in the two internal power switches. Power dissipation due to supply current in the control section and average current used to charge and discharge the gate capacitance of the internal switches (i.e., switching losses--PSL) is approximately: PSL = C x VIN2 x fSW
17
Thermal Shutdown
The MAX1515 features a thermal fault-protection circuit. When the junction temperature rises above +165C, a thermal sensor shuts down the MAX1515 regardless of
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
MAXIMUM RECOMMENDED OPERATING FREQUENCY vs. INPUT VOLTAGE
1000 VOUT = 1.8V
Table 5. Recommended Component Values (IOUT = 3A)
VIN (V) 3.3 3.3 3.3 3.3 2.5 VOUT (V) 2.5 1.8 1.5 1.2 1.8 1.5 1.2 fPWM (kHz) 400 400 480 420 430 320 440 L (H) 1.5 2.2 2.2 2.2 1.2 1.8 1.5 COUT (F) 100 150 180 220 100 150 180 RTOFF (k) 49.9 110 110 150 49.9 110 110
800 FREQUENCY (kHz)
600
400
VOUT = 1.5V VOUT = 1.25V VOUT = 0.9V VOUT = 2.5V NO LOAD 1.5 2.0 2.5 VIN (V) 3.0 3.5
200
2.5 2.5
0
Figure 6. Maximum Operating Frequency vs. Input Voltage
Use the following equation to select the off-time according to the desired no-load switching frequency in PWM mode: t OFF = VIN - VOUT fPWM x VIN
where: C = 5nF fSW = switching frequency The combined conduction losses (PCL) in the two power switches are approximated by: PCL = IOUT2 x RNMOS where: IOUT = load current RNMOS = NMOS switch on-resistance
where: tOFF = the programmed off-time VIN = the input voltage VOUT = the output voltage fPWM = no-load switching frequency, PWM mode Select RTOFF according to the formula: RTOFF = (t OFF - 0.035s) 110k 1.00s
Design Procedure
For typical DDR applications, use the recommended component values in Table 1. For other applications, use the recommended component values in Table 5, or take the following steps: 1) Select the desired PWM-mode switching frequency. See Figure 6 for maximum operating frequency. 2) Select the constant off-time as a function of input voltage, output voltage, and switching frequency. 3) Select RTOFF as a function of off-time. 4) Select the inductor as a function of output voltage, off-time, and peak-to-peak inductor current.
VRTOFF is typically 1.1V and the recommended values for RTOFF range from 33.2k to 499k for off-times of 0.35s to 4.5s.
Frequency Variation with Output Current
The operating frequency of the MAX1515 in PWM mode is determined primarily by tOFF (set by RTOFF), VIN, and VOUT as shown in the following formula: fPWM = t OFF ( VIN - VCHG + VDISCHG ) VIN - VOUT - VCHG
Programming the No-Load Switching Frequency and Off-Time
The MAX1515 features a programmable PWM mode switching frequency, which is set by the input and output voltage and the value of RTOFF. RTOFF sets the high-side NMOS power switch off-time in PWM mode.
18
where: VCHG = the voltage drop in the inductor charge path due to high-side FET RNMOS and inductor DCR VDISCHG = the voltage drop in the inductor discharge path due to low-side FET RNMOS and inductor DCR
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
While sourcing current, VCHG and VDISCHG increase with source load current and the voltage across the inductor decreases. This causes the frequency to drop. Conversely, while sinking current, VCHG and VDISCHG decrease with sink load current and the voltage across the inductor increases. Approximate the change in frequency with the following formula: fPWM = - IOUT x RDROP VIN x t OFF 5mm from IN. Select the bulk input capacitor according to the RMS input ripple-current requirements and voltage rating: V OUT (VIN - VOUT ) IRMS = IOUT(MAX) VIN
MAX1515
Output Capacitor Selection
The output filter capacitor affects the output-voltage ripple, output load-transient response, and feedbackloop stability. For stable operation, the MAX1515 requires a minimum output ripple voltage of VRIPPLE 1% x VOUT. The minimum ESR of the output capacitor is calculated by: ESR 1% x L t OFF
where RDROP is the resistance of the internal MOSFETs (40m typ) and the inductor.
Inductor Selection
The key inductor parameters must be specified: inductor value (L) and peak current (IPEAK). The following equation includes a constant, denoted as LIR, which is the ratio of peak-to-peak inductor AC ripple current to maximum DC load current. A higher value of LIR allows smaller inductance but results in higher losses and ripple. A good compromise between size and losses is found at approximately a 25% ripple-current to loadcurrent ratio (LIR = 0.25), which corresponds to a peak inductor current 1.125 times the DC load current: L= VOUT x t OFF IOUT(MAX) x LIR
Stable operation for source-only applications requires the correct output filter capacitor. When choosing the output capacitor, ensure that: COUT VREFIN x t OFF x 105F / s VOUT
Additionally, the minimum inductance chosen must be high enough to limit the inductor current during the high-side switch on-time to less than 1A/s. LMIN
(VIN(MAX)
- VOUT
)x
1s 1A
The peak-inductor current at full load is 1.125 x IOUT(MAX) if the above equation is used; otherwise, the peak current is calculated by: IPEAK = IOUT(MAX) + VOUT x t OFF 2xL
For DDR applications, the output capacitance requirement needs to be two times the above requirement. The output filter capacitor must have low enough equivalent series resistance (ESR) to meet output ripple and load-transient requirements, yet have high enough ESR to satisfy stability requirements. For applications where the output is subject to violent load transients, the output capacitor's size depends on how much ESR is needed to prevent the output from dipping too low under a load transient. Ignoring the sag due to finite capacitance: RESR VSTEP IOUT(MAX)
Choose an inductor with a saturation current at least as high as the peak-inductor current. The inductor selected should exhibit low losses at the chosen operating frequency.
Input Capacitor Selection
The input-filter capacitors reduce peak currents and noise at the voltage source. Place a low-ESR and lowESL 0.1F capacitor for noise filtering no further than
In applications without large and fast load transients, the output capacitor's size often depends on how much ESR is needed to maintain an acceptable level of output voltage ripple. The output ripple voltage of a stepdown controller equals the total inductor ripple current multiplied by the output capacitor's ESR. Therefore, the maximum ESR required to meet ripple specifications is: RESR VRIPPLE IOUT(MAX) LIR
19
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
The actual capacitance value required relates to the physical size needed to achieve low ESR, as well as to the chemistry of the capacitor technology. Thus, the capacitor is usually selected by ESR and voltage rating rather than by capacitance value (this is true of tantalums, OS-CONs, polymers, and other electrolytics). bulk output capacitance must often be added (see the VSAG equation in the Design Procedure section). The absolute point of dropout is when the inductor current ramps down during the off-time (IDOWN) as much as it ramps up during the on-time (IUP). The ratio h = IUP/IDOWN indicates the controller's ability to slew the inductor current higher in response to increased load, and must always be greater than 1. As h approaches 1, the absolute minimum dropout point, the inductor current cannot increase as much during each switching cycle and V SAG greatly increases unless additional output capacitance is used. A reasonable minimum value for h is 1.5, but adjusting this up or down allows trade-offs between VSAG, output capacitance, and minimum operating voltage. For a given value of h, the minimum operating voltage can be calculated as:
VIN(MIN) = VOUT + VCHG + h x t OFF x (VOUT + VDISCHG ) t ON(MAX)
Transient Response
The inductor ripple current also impacts transientresponse performance, especially at low VIN - VOUT differentials. Low inductor values allow the inductor current to slew faster, replenishing charge removed from the output filter capacitors by a sudden load step. The worst-case output sag can be calculated from: VSAG 2L x COUT ( VIN - VOUT ) I t + OUT OFF COUT (IOUTL + VOUT t OFF )2 + VOUT t OFF2 2L x COUT
where IOUT is the maximum load transient. Typically, the maximum load transient is equal to the maximum load current (IOUT = ILOAD(MAX)). For DDRtermination applications, the output must source and sink current. In these applications, the actual peak-topeak transient current (IOUT) is defined as the sum of both the maximum source and sink load currents: IOUT = ISOURCE(MAX) + ISINK (MAX) The amount of overshoot during a full-load to no-load transient due to stored inductor energy can be calculated as: VSOAR (IOUT )2 L 2COUT VOUT
When using the pulse-skipping source/sink feature (MODE = VCC and SKIP = GND), the output transient voltage should not exceed or drop below the sink and source (respectively) detection thresholds (VREFIN 20mV).
where VCHG and VDISCHG are the parasitic voltage drops in the charge and discharge paths (see the Frequency Variation with Output Current section), tON(MAX) is from the Electrical Characteristics, and tOFF is the programmed off-time. The absolute minimum input voltage is calculated with h = 1. If the calculated VIN(MIN) is greater than the required minimum input voltage, then tOFF must be reduced or output capacitance added to obtain an acceptable VSAG. If operation near dropout is anticipated, calculate VSAG to be sure of adequate transient response. Dropout Design Example: VOUT = 2.5V tOFF = 1s VCHG = VDISCHG = 100mV h = 1.5 VIN(MIN) = 2.5V + 0.1V + = 2.99V 1.5 x 1s x (2.5V + 0.1V) 10s
Applications Information
Dropout Operation
The MAX1515 improves dropout performance by having a maximum on-time of 10s. When working with low input voltages, the duty-factor limit must be calculated using worst-case values for on- and off-times. Keep in mind that transient-response performance of step-down regulators operated too close to dropout is poor, and
20
Dynamic Output-Voltage Transitions
By changing the voltage at REFIN, the MAX1515 can be used in applications that require dynamic outputvoltage changes between two set points. An n-channel MOSFET can be used to dynamically adjust the second controller's output voltage by changing the resistive
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Low-Voltage, Internal Switch, Step-Down/DDR Regulator
VCC SKIP REF R1 REFIN R2
MAX1515
L LX FB PGND GND
VOUT COUT
CREFIN
With the additional capacitance, the REFIN voltage slews between the two set points with a time constant given by REQ x CREFIN, where REQ is the equivalent parallel resistance seen by the slew capacitor. Referring to Figure 7, the time constant for a positive REFIN voltage transition is: R1 x (R2 + R3) POS = CREFIN R1 + R2 + R3 and the time constant for a negative REFIN voltage transition is: R1 x R2 POS = CREFIN R1 + R2
MAX1515
MODE FBSEL0
VOUT(LOW) VOUT(HIGH)
FBSEL1 R3
Figure 7. Dynamic Output Voltages
voltage-divider network at REFIN. The resulting output voltages are determined by the following equations: R2 VOUT(LOW) = VREF R1 + R2 R2 + R3 VOUT(HIGH) = VREF R1 + R2 + R3 Forced-PWM operation is required to ensure fast, accurate negative voltage transitions when REFIN is lowered. Since forced-PWM operation disables the zero-crossing comparator, the inductor current can reverse under light loads, quickly discharging the output capacitors. For a step voltage change at REFIN, the rate-of-change of the output voltage is limited by the inductor current ramp, the total output capacitance, the current limit, and the load during the transition. The inductor current ramp is limited by the voltage across the inductor and the inductance. The total output capacitance determines how much current is needed to change the output voltage. Additional load current slows down the output-voltage change during a positive REFIN voltage change, and speeds up the output-voltage change during a negative REFIN voltage change. Increasing the current-limit setting speeds up a positive output-voltage change. To avoid tripping the power-good comparators, the reference-voltage slew rate must be slow enough that the output voltage (VOUT) can accurately track the reference voltage (VREFIN). Add a capacitor across REFIN and GND to control the rate-of-change of the REFIN voltage during dynamic transitions and filter noise.
PC Board Layout Guidelines
Good layout is necessary to achieve the intended output power level, high efficiency, and low noise. Good layout includes the use of a ground plane, careful component placement, and correct routing of traces using appropriate trace widths. Refer to the MAX1515 EV kit for a reference of a good layout. The following points are in order of decreasing importance: 1) Minimize switched-current and high-current ground loops. Connect the input capacitor's ground, the output capacitor's ground, and PGND at a single point. Connect the resulting island to GND at only one point. 2) Connect the input filter capacitor less than 5mm away from IN. The connecting copper trace carries large currents and must be at least 1mm wide, preferably 2.5mm. 3) Place the LX node components as close together and as near to the device as possible. This reduces noise, resistive losses, and switching losses. 4) A ground plane is essential for optimal performance. In most applications, the circuit is located on a multilayer board, and full use of the four or more layers is recommended. Use the top and bottom layers for interconnections and the inner layers for an uninterrupted ground plane. Avoid large AC currents through the ground plane.
Chip Information
TRANSISTOR COUNT: 8258 PROCESS: BiCMOS
______________________________________________________________________________________
21
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
Pin Configuration
BST LX LX IN IN SKIP
TOP VIEW
24 23 22 21
20
PGND PGND IC VDD REFOUT SS
1 2 3 4 5 6 10 11 12 7 8 9
19 18 17 16
FBSEL1 FBSEL0 MODE SHDN REFIN REF
MAX1515
15 14 13
PGOOD
TOFF
FB
COMP
THIN QFN (4mm x 4mm)
22
______________________________________________________________________________________
GND
VCC
Low-Voltage, Internal Switch, Step-Down/DDR Regulator
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
MAX1515
PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.8mm
21-0139
C
1
2
______________________________________________________________________________________
23
24L QFN THIN.EPS
Low-Voltage, Internal Switch, Step-Down/DDR Regulator MAX1515
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE 12, 16, 20, 24L THIN QFN, 4x4x0.8mm
21-0139
C
2
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
24 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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