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FDS4895C June 2005 FDS4895C Dual N & P-Channel PowerTrench(R) MOSFET General Description These dual N- and P-Channel enhancement mode power field effect transistors are produced using Fairchild Semiconductor's advanced PowerTrench process that has been especially tailored to minimize on-state resistance and yet maintain superior switching performance. Features * Q1: N-Channel RDS(on) = 39m @ VGS = 10V RDS(on) = 57m @ VGS = 7V * Q2: P-Channel 5.5A, 40V Application * * Motor Control DC/DC conversion * -4.4A, -40V RDS(on) = 46m @ VGS = -10V RDS(on) = 63m @ VGS = -4.5V High power and handling capability in a widely used surface mount package D1 D D1 D DD2 D2 D 5 6 G2 S2 G G1 S S1 S Q2 4 3 SO-8 Pin 1 SO-8 7 8 Q1 2 1 S Absolute Maximum Ratings Symbol VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage TA = 25C unless otherwise noted Parameter Q1 40 (Note 1a) Q2 40 20 -4.4 -20 2 1.6 1 0.9 -55 to +150 Units V V A W - Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation Drain Current 20 5.5 20 (Note 1a) (Note 1b) (Note 1c) TJ, TSTG Operating and Storage Junction Temperature Range C Thermal Characteristics RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case (Note 1a) (Note 1) 78 40 C/W Package Marking and Ordering Information Device Marking FDS4895C Device FDS4895C Reel Size 13" Tape width 12mm Quantity 2500 units (c)2005 Fairchild Semiconductor Corporation FDS4895C Rev C(W) FDS4895C Electrical Characteristics Symbol BVDSS BVDSS TJ IDSS IGSSF IGSSR TA = 25C unless otherwise noted Parameter Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward Test Conditions VGS = 0 V, ID = 250 A VGS = 0 V, ID = -250 A ID = 250 A, Referenced to 25C ID = -250 A, Referenced to 25C VDS = 32 V, VGS = 0 V VDS = -32 V, VGS = 0 V VGS = 20 V, VDS = 0 V VDS = 0 V Type Min Typ Max Units Q1 Q2 Q1 Q2 Q1 Q2 All All 40 -40 42 -40 1 -1 100 -100 V mV/C A nA nA Off Characteristics Gate-Body Leakage, Reverse VGS = -20 V, (Note 2) On Characteristics VGS(th) VGS(th) TJ RDS(on) Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance gFS Forward Transconductance VDS = VGS, ID = 250 A VDS = VGS, ID = -250 A ID = 250 A, Referenced to 25C ID = -250 A, Referenced to 25C VGS = 10 V, ID = 5.5 A VGS = 7 V, ID = 4.8 A VGS = 10 V, ID = 5.5 A, TJ = 125C VGS = -10 V, ID = -4.4 A VGS = -4.5 V, ID = -3.8 A VGS = -10 V, I D = -4.4 A, TJ = 125C VDS = 10 V, ID = 5.5 A VDS = -10 V, ID =-4.4 A Q1 VDS = 20 V, VGS = 0 V, f = 1.0 MHz Q1 Q2 Q1 Q2 Q1 2 -1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 3.7 -1.7 -8 4 32 42 49 37 50 55 10 12 410 1050 97 140 47 70 2 9 5 -3 V mV/C 39 57 64 46 63 73 m S Dynamic Characteristics Ciss Coss Crss RG Input Capacitance Output Capacitance Q2 Reverse Transfer Capacitance VDS = -20 V, VGS = 0 V, f = 1.0 MHz Gate Resistance VGS = 15 mV, f = 1.0 MHz pF pF pF FDS4895C Rev C(W) FDS4895C Electrical Characteristics Symbol Parameter (continued) TA = 25C unless otherwise noted Test Conditions (Note 2) Type Min Typ Max Units Switching Characteristics td(on) tr td(off) tf Qg Qg s Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Q1 VDD = 20 V, ID = 1 A, VGS = 10V, RG E N = 6 Q2 VDD = -20 V, ID = -1 A, VGS = -10V, RG E N = 6 Q1 VDS = 20 V, ID = 5.5 A, VGS = 10 V Q2 VDS = -20 V, ID = -4.4 A,VGS =-10 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 9 12 4 15 18 45 3 18 7 20 2.4 3 2 4 0.7 -0.7 21 24 12 12 18 22 8 27 32 72 6 32 10 28 ns ns ns ns nC nC nC Drain-Source Diode Characteristics VSD trr Qrr Drain-Source Diode Forward Voltage Diode Reverse Recovery Time Diode Reverse Recovery Charge VGS = 0 V, IS = 1.3 A (Note 2) VGS = 0 V, IS = -1.3 A (Note 2) Q1 IF = 5.5 A, diF/dt = 100 A/s Q2 IF = -4.4 A, diF/dt = 100 A/s 1.2 -1.2 V nS nC Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design. a) 78/W when mounted on a 0.5 in2 pad of 2 oz copper b) 125/W when mounted on a .02 in2 pad of 2 oz copper c) 135/W when mounted on a minimum pad. Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% FDS4895C Rev C(W) FDS4895C Typical Characteristics: Q1 (N-Channel) 20 2.6 6.5V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V 7.0V 2.4 2.2 VGS = 6.0V 2 1.8 1.6 1.4 1.2 1 0.8 0 0.5 1 1.5 2 V DS, DRAIN TO SOURCE VOLTAGE (V) 2.5 ID, DRAIN CURRENT (A) 16 12 6.0V 8 6.5V 7.0V 8.0V 10V 5.5V 4 0 0 4 8 12 ID, DRAIN CURRENT (A) 16 20 Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Drain Current and Gate Voltage. 0.105 1.8 R DS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE ID = 5.5A VGS = 10V I D = 2.8A RDS(ON), ON-RESISTANCE (OHM) 0.095 0.085 0.075 1.6 1.4 1.2 1 0.8 0.6 -50 -25 0 25 50 75 100 o T J, JUNCTION TEMPERATURE ( C) 125 150 TA = 125 C 0.065 0.055 0.045 0.035 0.025 5 6 7 8 9 VGS, GATE TO SOURCE VOLTAGE (V) 10 o TA = 25 C o Figure 3. On-Resistance Variation with Temperature. 30 VDS = 10V 25 ID , DRAIN CURRENT (A) T A = -55 C 125 C 20 o o Figure 4. On-Resistance Variation with Gate-to-Source Voltage. 100 I S, REVERSE DRAIN CURRENT (A) 25 C o VGS = 0V 10 TA = 125 C 1 25 C o o o 15 0.1 -55 C 0.01 10 5 0.001 0 3 4 5 6 7 VGS, GATE TO SOURCE VOLTAGE (V) 8 0.0001 0 0.2 0.4 0.6 0.8 1 VSD, BODY DIODE FORWARD VOLTAGE (V) 1.2 Figure 5. Transfer Characteristics. Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS4895C Rev C(W) FDS4895C Typical Characteristics: Q1 (N-Channel) 14 VGS, GATE-SOURCE VOLTAGE (V) ID = 5.5A 12 CAPACITANCE (pF) 600 VDS = 10V 20V 500 f = 1 MHz VGS = 0 V C iss 400 10 30V 8 6 4 2 0 0 2 4 6 8 10 12 Qg, GATE CHARGE (nC) 300 200 C oss 100 Crss 0 0 5 10 15 20 25 30 V DS, DRAIN TO SOURCE VOLTAGE (V) 35 40 Figure 7. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) 50 Figure 8. Capacitance Characteristics. R DS(ON) LIMIT 100s 1ms 10ms 100ms 40 I D, DRAIN CURRENT (A) 10 SINGLE PULSE RJA = 135C/W TA = 25C 30 1 10s DC VGS = 10.0V SINGLE PULSE o RJA = 135 C/W TA = 25 C o 1s 20 0.1 10 0.01 0.1 1 10 VDS, DRAIN-SOURCE VOLTAGE (V) 100 0 0.001 0.01 0.1 1 t1 , TIME (sec) 10 100 1000 Figure 9. Maximum Safe Operating Area. Figure 10. Single Pulse Maximum Power Dissipation. FDS4895C Rev C(W) FDS4895C Typical Characteristics: Q2 (P-Channel) 30 VGS = -10V 25 -ID, DRAIN CURRENT (A) 20 15 10 -6.0V 2.6 R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE -4.5V -4.0V 2.4 2.2 2 1.8 1.6 1.4 -6.0V 1.2 -10V 1 0.8 -4.0V -4.5V VGS = - 3.5V -3.5V -3.0V 5 0 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 -VDS, DRAIN TO SOURCE VOLTAGE (V) 0 5 10 15 20 25 30 -ID , DRAIN CURRENT (A) Figure 11. On-Region Characteristics. Figure 12. On-Resistance Variation with Drain Current and Gate Voltage. 0.14 RDS(ON), ON-RESISTANCE (OHM) 1.6 R DS(ON) , NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.5 1.4 1.3 1.2 1.1 1 0.9 0.8 0.7 0.6 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) ID = -4.4A VGS = - 10V ID = -2.2A 0.12 0.1 T A = 125 C 0.08 0.06 o TA = 25 C 0.04 0.02 2 4 6 8 10 -VGS, GATE TO SOURCE VOLTAGE (V) o Figure 13. On-Resistance Variation with Temperature. 25 TA = -55 C o Figure 14. On-Resistance Variation with Gate-to-Source Voltage. 100 -IS, REVERSE DRAIN CURRENT (A) VDS = -10V -ID , DRAIN CURRENT (A) 20 25 C o VGS = 0V 10 TA = 125 C 1 0.1 0.01 0.001 0.0001 25 C -55 C o o o 125 C 15 o 10 5 0 1.5 2 2.5 3 3.5 4 4.5 -VGS, GATE TO SOURCE VOLTAGE (V) 0 0.2 0.4 0.6 0.8 1 1.2 -VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 15. Transfer Characteristics. Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature. FDS4895C Rev C(W) FDS4895C Typical Characteristics: Q2 (P-Channel) 10 -VGS , GATE-SOURCE VOLTAGE (V) 1400 ID = -4.4A 8 VDS = -10V -20V CAPACITANCE (pF) 1200 1000 800 600 400 CISS f = 1 MHz VGS = 0 V -30V 6 4 2 200 0 0 5 10 15 20 25 Qg, GATE CHARGE (nC) COSS CRSS 0 0 5 10 15 20 25 30 35 40 -VDS , DRAIN TO SOURCE VOLTAGE (V) Figure 17. Gate Charge Characteristics. 100 P(pk), PEAK TRANSIENT POWER (W) Figure 18. Capacitance Characteristics. 50 -ID , DRAIN CURRENT (A) RDS(ON) LIMIT 10 1ms 10ms 100ms 100 40 SINGLE PULSE RJA = 135C/W TA = 25C 30 1 DC 0.1 VGS = -10V SINGLE PULSE o RJA = 135 C/W TA = 25 C 0.01 0.1 1 o 1s 10s 20 10 10 100 0 0.001 0.01 0.1 1 t1, TIME (sec) 10 100 1000 -VDS, DRAIN-SOURCE VOLTAGE (V) Figure 19. Maximum Safe Operating Area. Figure 20. Single Pulse Maximum Power Dissipation. r(t), NORMALIZED EFFECTIVE TRANSIENT THERMAL RESISTANCE 1 D = 0.5 0.2 RJA(t) = r(t) * RJA RJA = 135 C/W P(pk) 0.02 0.01 o 0.1 0.1 0.05 t1 t2 TJ - TA = P * RJA(t) Duty Cycle, D = t1 / t2 0.01 SINGLE PULSE 0.001 0.0001 0.001 0.01 0.1 t1, TIME (sec) 1 10 100 1000 Figure 21. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. FDS4895C Rev C(W) TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks. ACExTM FAST(R) ActiveArrayTM FASTrTM BottomlessTM FPSTM Build it NowTM FRFETTM CoolFETTM GlobalOptoisolatorTM CROSSVOLTTM GTOTM DOMETM HiSeCTM EcoSPARKTM I2CTM E2CMOSTM i-LoTM EnSignaTM ImpliedDisconnectTM FACTTM IntelliMAXTM FACT Quiet SeriesTM Across the board. Around the world.TM The Power Franchise(R) Programmable Active DroopTM DISCLAIMER ISOPLANARTM LittleFETTM MICROCOUPLERTM MicroFETTM MicroPakTM MICROWIRETM MSXTM MSXProTM OCXTM OCXProTM OPTOLOGIC(R) OPTOPLANARTM PACMANTM POPTM Power247TM PowerEdgeTM PowerSaverTM PowerTrench(R) QFET(R) QSTM QT OptoelectronicsTM Quiet SeriesTM RapidConfigureTM RapidConnectTM SerDesTM SILENT SWITCHER(R) SMART STARTTM SPMTM StealthTM SuperFETTM SuperSOTTM-3 SuperSOTTM-6 SuperSOTTM-8 SyncFETTM TinyLogic(R) TINYOPTOTM TruTranslationTM UHCTM UltraFET(R) UniFETTM VCXTM WireTM FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 2. A critical component is any component of a life 1. Life support devices or systems are devices or support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. Preliminary First Production No Identification Needed Full Production Obsolete Not In Production This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only. Rev. I16 |
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