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PRELIMINARY PRODUCT INFORMATION
MOS INTEGRATED CIRCUIT
PD161644
241 OUTPUT GATE DRIVER WITH POWER SUPPLY FOR TFT-LCD GATE DRIVER
DESCRIPTION
The PD161644 is a TFT-LCD gate driver with power supply for TFT-LCD driver. Because this gate driver has a level shift circuit for logic input, it can output a high gate scanning voltage in response to a CMOS-level input. This ICs can generate the levels which TFT-LCD driver need, from 2.7 V.
FEATURES
* High breakdown voltage output (VDD1-VSS3 = 40 V MAX.) * 2.7 V CMOS level input * Number of output: 241 output selectable * To generate 4 levels from single voltage input * To integrate regulator circuit for source driver * Mode setting from source driver: Serial I/F or pin control * On-chip VCOM driver * On-chip gate output low-level selector
ORDERING INFORMATION
Part number Package Chip
PD161644P
Remark
Purchasing the above chip entails the exchange of documents such as a separate memorandum or product quality, so please contact one of our sales representatives.
The information contained in this document is being issued in advance of the production cycle for the device. The parameters for the device may change before final production or NEC Corporation, at its own discretion, may withdraw the device prior to its production. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information.
Document No. S15797EJ1V4PM00 (1st edition) Date Published October 2002 NS CP(K) Printed in Japan
The mark ! shows major revised points.
(c)
2001
PD161644
1. BLOCK DIAGRAM/SYSTEM DIAGRAM
C1+ C1C2 C2+
C1 C1 C2 C2 C2 C2
DC/DC converter
VDC
VDD2 C2 VDD1 C2 VSS2 C2 VSS3 C2 VSS4 C2 VGD VR C2 VS MVS Source driver C3 5 V 4V
C3 C3+ C4 C4C5 + C5 C6 C6 DCCLK
+
+
DC/DC converter
DC/DC converter
OSC
VDC Regurator VR
GCS GCL GDA
Serial interface register
VREF
Regurator VS
DCON RGONR VCD2 VMS FS0 FS2 CLS0 RGON VSEL EXRV ACS0 SCN0 SCN1 SCN2 PUPT0 DUPF0 R,/L CLK FRM STVR SR1 SR2
SR119 SR120 SR121 SR122 SR240 SR241
D/A Common driver circuit
VCIN VCOM COMH C2 COML C2 VCOMIN
Source driver Common
D/A
Switch
Gate output low level select circuit
VM IFSEL /GRESET
STVL
MPX
OE1 OE2
VMON TESTIN1 TESTIN2 TESTOUT1 TESTOUT2
VDC VCC1 VSS1 PVCC1 PVSS1 PVSS3 O1 O2 O119 O120 O122 O122 O240 O241
Level Shifter
VB
Remarks 1./xxx indicates active low signal. 2.Level Shifter (LS): Interfaces between 2.7 V CMOS level and VDD1 to VB level.
2
Preliminary Product Information S15797EJ1V4PM
PD161644
1.1 Boost Voltage Construction The boost voltage generated in PD161644 is shown below.
VGD = VR VDD2: 5.4 V VR: 5 V VDC: 2.7 V VSS1: 0 V VSS4 = VDC x -1 = -2.7 V VSS2 = VR x -2 = -10 V VSS3 = VR x -3 = -15 V VDC: 2.7 V VSS1: 0 V VSS4 = VDC x -1 = -2.7 V VSS2 = VDD2 x -2 = -10.8 V VSS3 = VDD2 x -3 = -16.2 V VDD1 = VR x 3 = 15 V VGD = VDD2 VDD2: 5.4 V VR: 5 V VDD1 = VDD2 x 3 = 16.2 V
1.2 Boost Voltage Auto Start and Rising Order
VDD1 = 3 x VR
VGD = VR, VCD2 = H
VDD2 = 3 x VDC VR DCON VSS1 VSS4 = -VDC
T1 T2 T3 T4
VSS2 = -2 x VR VSS3 = -3 x VR
T1, T2, T3, T4: changeable by PUPT0, PUPT01, DUPF0, DUPF1
1.3 VS_AMP Circuit VS_AMP circuits are shown below.
VDD2 VDD2
TESTOUT1
TESTOUT1
VREF
MVS RbS
-
C3
VREF
VS 5V 4V C3 RbS MVS
-
C3 5V 4V C3
+
+
VS
RaS
RcS RaS
Internal Resistor Mode EXRV = L
External Resistor Mode EXRV = H RbS )VREF VS = (1+ RaS
Preliminary Product Information S15797EJ1V4PM
3
PD161644
1.4 Common Drive Circuit The common drive circuit is shown below.
VS
CDA0 CDA1 CDA2 CDA3 CDA4 CDA5 CDA6 CDA7
VDD2
+
VS D/A
COMH C3
+ -
-
VCOM
LS VCC1
VCOMIN VS
DA0 DA1 DA2 DA3 DA4 DA5 DA6 DA7
+ -
VS VSS4
COML C3 VCIN
D/A
+ -
4
Preliminary Product Information S15797EJ1V4PM
PD161644
1.5 Variable Boost Steps The boost steps of VDD1, VSS2, VSS3 are selected according to how the external capacitor is connected. The examples of connection are shown below. VS is selected as a boost reference voltage in these examples (short between the VS and VGD pins).
VDD2 = VDC x 2 (dual mode) C1+ C1- C2+ C2- VDD2 VDD2 = VDC x 2 (single mode) C1+ C1- C2+ C2- VDD2
VDD2 = VDC x 3
C1+ C1- C2+ C2-
VDD2
VDD1 = VGD x 3 VSS2 = VGD x -2 VSS3 = VGD x -3 C3+ C3- C4+ C4- C5+ C5- VSS3 VSS2
VDD1 = VGD x 3 VSS2 = - VSS3 = VGD x -2 C3+ C3- C4+ C4- C5+ C5- VSS3 VSS2
VDD1 = VGD x 2 VSS2 = VGD x -1 VSS3 = VGD x -2 C3+ C3- C4+ C4- C5+ C5- VSS3 VSS2
VDD1 = VGD x 2 VSS2 = - VSS3 = VGD x -1 C3+ C3- C4+ C4- C5+ C5- VSS3 VSS2
VDD1
VDD1
VDD1
VDD1
VSS4 = VDC x -1 C6 + C6-
VSS4 = - C6+ C6-
VSS4
VSS4
Preliminary Product Information S15797EJ1V4PM
5
PD161644
2. PIN CONFIGURATION (Pad Layout)
Chip size: 2.8 x 9.4 mm Bump size Input/Left/Right (includes DUMMY of input side) Output (includes DUMMY output side) : 100 x 40 m : 86 x 35 m
2 2 2
Figure 2-1. Chip Schematic
No.145 + Bump side up X Y (0,0) No.391 +
+ No.144 A B Opening in protective film No.1
Note
C
D
Note A part of the protective film on the chip surface is absent to enable a transistor check at shipment. The position of this opening is indicated by the shaded section in the above chip schematic. The specific coordinates of this opening are as follows.
X (m) A B C D -847.74 -687.75 -687.75 -847.74 Y (m) -3143.37 -3143.37 -3438.78 -3438.78
Alignment Mark Coordinate (mark center, unit: mm)
X -1.125 0.9705 0.9705 Y -4.5705 4.5495 -4.5495 Shape of Alignment Mark Type A Type B Type B
Alignment Mark Type A
10 m 10 m 10 m 10 m 10 m 10 m
Type B
30 m 30 m 30 m 30 m 30 m 30 m
6
Preliminary Product Information S15797EJ1V4PM
PD161644
Table 2-1. Pad Layout (1/3)
PADTYPE : BUMP SIZE 100 m x 40 m GATE INPUTS PAD No. PAD NAME X [mm] 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 DUMMY TESTOUT2 TESTIN2 TESTIN1 TESTOUT1 PVCC1 DUPF0 PUPT0 SCN2 SCN1 SCN0 ACS0 EXRV VSEL CLS0 FS2 FS0 VMS RGONR PVSS1 PVSS3 VMON DUMMY PVCC1 R,/L IFSEL PVSS1 VCOMIN VCOM VCOM VCOM COML COML COMH COMH VM VM VB VB VSS3 VSS3 VSS3 VSS4 VSS4 VSS4 VSS2 VSS2 VSS2 C6C6C6+ C6+ C5C5C5+ C5+ C4C4C4+ C4+ C3C3C3+ C3+ VDD1 VDD1 VDD1 C2C2C2C2C2+ -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 PADTYPE : BUMP SIZE 100 m x 40 m GATE INPUTS PAD No. PAD NAME X [mm] 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 C2+ C2+ C2+ C1C1C1C1C1+ C1+ C1+ C1+ VDD2 VDD2 VDD2 VDD2 VSS1 VSS1 VSS1 VSS1 DUMMY VDC VDC VDC VDC VDC VDC VDC VDC VCC1 VCC1 VCC1 VCC1 VSS1 VSS1 VSS1 VSS1 VSS1 VSS1 VR VR VR VGD VGD VGD MVS VS VS VS VS VS VS DUMMY PVCC1 VCD2 RGON DCON FRM VCIN PVSS1 /GRESET GCS GCL GDA STVR STVL DCCLK CLK OE1 OE2 DUMMY VSS3 DUMMY -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242 -1.242
Y [mm] -4.5500 -4.4900 -4.4300 -4.3700 -4.3100 -4.2500 -4.1900 -4.1300 -4.0700 -4.0100 -3.9500 -3.8900 -3.8300 -3.7700 -3.7100 -3.6500 -3.5900 -3.5300 -3.4700 -3.4100 -3.3500 -3.2900 -3.2300 -3.1700 -3.1100 -3.0500 -2.9900 -2.9200 -2.8500 -2.7900 -2.7300 -2.6600 -2.6000 -2.5300 -2.4700 -2.4000 -2.3400 -2.2700 -2.2100 -2.1400 -2.0800 -2.0200 -1.9500 -1.8900 -1.8300 -1.7600 -1.7000 -1.6400 -1.5700 -1.5100 -1.4400 -1.3800 -1.3100 -1.2500 -1.1800 -1.1200 -1.0500 -0.9900 -0.9200 -0.8600 -0.7900 -0.7300 -0.6600 -0.6000 -0.5300 -0.4700 -0.4100 -0.3400 -0.2800 -0.2200 -0.1600 -0.0900
Y [mm] -0.0300 0.0300 0.0900 0.1600 0.2200 0.2800 0.3400 0.4100 0.4700 0.5300 0.5900 0.6600 0.7200 0.7800 0.8400 0.9100 0.9700 1.0300 1.0900 1.1600 1.2300 1.2900 1.3500 1.4100 1.4700 1.5300 1.5900 1.6500 1.7200 1.7800 1.8400 1.9000 1.9700 2.0300 2.0900 2.1500 2.2100 2.2700 2.3400 2.4000 2.4600 2.5300 2.5900 2.6500 2.7200 2.7900 2.8500 2.9100 2.9700 3.0300 3.0900 3.1600 3.2300 3.3000 3.3700 3.4400 3.5100 3.5800 3.6500 3.7200 3.7900 3.8600 3.9300 4.0000 4.0700 4.1400 4.2100 4.2800 4.3500 4.4200 4.4900 4.5600
Preliminary Product Information S15797EJ1V4PM
7
PD161644
Table 2-1. Pad Layout (2/3)
PADTYPE : BUMP SIZE 86 m x 35 m GATE OUTPUTS 35 m pitch PAD No. PAD NAME X [mm] 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 DUMMY DUMMY DUMMY O241 O240 O239 O238 O237 O236 O235 O234 O233 O232 O231 O230 O229 O228 O227 O226 O225 O224 O223 O222 O221 O220 O219 O218 O217 O216 O215 O214 O213 O212 O211 O210 O209 O208 O207 O206 O205 O204 O203 O202 O201 O200 O199 O198 O197 O196 O195 O194 O193 O192 O191 O190 O189 O182 O187 O186 O185 O184 O183 O182 O181 O180 O179 O178 O177 O176 O175 O174 O173 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 PADTYPE : BUMP SIZE 86 m x 35 m GATE OUTPUTS 35 m pitch PAD No. PAD NAME X [mm] 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 283 284 285 286 287 288 O172 O171 O170 O169 O168 O167 O166 O165 O164 O163 O162 O161 O160 O159 O158 O157 O156 O155 O154 O153 O152 O151 O150 O149 O148 O147 O146 O145 O144 O143 O142 O141 O140 O139 O138 O137 O136 O135 O134 O133 O132 O131 O130 O129 O128 O127 O126 O125 O124 O123 O122 O121 O120 O119 O118 O117 O116 O115 O114 O113 O112 O111 O110 O109 O108 O107 O106 O105 O104 O103 O102 O101 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127
Y [mm] 4.3050 4.2700 4.2350 4.2000 4.1650 4.1300 4.0950 4.0600 4.0250 3.9900 3.9550 3.9200 3.8850 3.8500 3.8150 3.7800 3.7450 3.7100 3.6750 3.6400 3.6050 3.5700 3.5350 3.5000 3.4650 3.4300 3.3950 3.3600 3.3250 3.2900 3.2550 3.2200 3.1850 3.1500 3.1150 3.0800 3.0450 3.0100 2.9750 2.9400 2.9050 2.8700 2.8350 2.8000 2.7650 2.7300 2.6950 2.6600 2.6250 2.5900 2.5550 2.5200 2.4850 2.4500 2.4150 2.3800 2.3450 2.3100 2.2750 2.2400 2.2050 2.1700 2.1350 2.1000 2.0650 2.0300 1.9950 1.9600 1.9250 1.8900 1.8550 1.8200
Y [mm] 1.7850 1.7500 1.7150 1.6800 1.6450 1.6100 1.5750 1.5400 1.5050 1.4700 1.4350 1.4000 1.3650 1.3300 1.2950 1.2600 1.2250 1.1900 1.1550 1.1200 1.0850 1.0500 1.0150 0.9800 0.9450 0.9100 0.8750 0.8400 0.8050 0.7700 0.7350 0.7000 0.6650 0.6300 0.5950 0.5600 0.5250 0.4900 0.4550 0.4200 0.3850 0.3500 0.3150 0.2800 0.2450 0.2100 0.1750 0.1400 0.1050 0.0700 0.0350 0.0000 -0.0350 -0.0700 -0.1050 -0.1400 -0.1750 -0.2100 -0.2450 -0.2800 -0.3150 -0.3500 -0.3850 -0.4200 -0.4550 -0.4900 -0.5250 -0.5600 -0.5950 -0.6300 -0.6650 -0.7000
8
Preliminary Product Information S15797EJ1V4PM
PD161644
Table 2-1. Pad Layout (3/3)
PADTYPE : BUMP SIZE 86 m x 35 m GATE OUTPUTS 35 m pitch PAD No. PAD NAME X [mm] 289 290 291 292 293 294 295 296 297 298 299 300 301 302 303 304 305 306 307 308 309 310 311 312 313 314 315 316 317 318 319 320 321 322 323 324 325 326 327 328 329 330 331 332 333 334 335 336 337 338 339 340 341 342 343 344 345 346 347 348 349 350 351 352 353 354 355 356 357 358 359 360 O100 O99 O98 O97 O96 O95 O94 O93 O92 O91 O90 O89 O88 O87 O86 O85 O84 O83 O82 O81 O80 O79 O78 O77 O76 O75 O74 O73 O72 O71 O70 O69 O68 O67 O66 O65 O64 O63 O62 O61 O60 O59 O58 O57 O56 O55 O54 O53 O52 O51 O50 O49 O48 O47 O46 O45 O44 O43 O42 O41 O40 O39 O38 O37 O36 O35 O34 O33 O32 O31 O30 O29 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 PADTYPE : BUMP SIZE 86 m x 35 m GATE OUTPUTS 35 m pitch PAD No. PAD NAME X [mm] 361 362 363 364 365 366 367 368 369 370 371 372 373 374 375 376 377 378 379 380 381 382 383 384 385 386 387 388 389 390 391 O28 O27 O26 O25 O24 O23 O22 O21 O20 O19 O18 O17 O16 O15 O14 O13 O12 O11 O10 O9 O8 O7 O6 O5 O4 O3 O2 O1 DUMMY DUMMY DUMMY 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249 1.127 1.249
Y [mm] -0.7350 -0.7700 -0.8050 -0.8400 -0.8750 -0.9100 -0.9450 -0.9800 -1.0150 -1.0500 -1.0850 -1.1200 -1.1550 -1.1900 -1.2250 -1.2600 -1.2950 -1.3300 -1.3650 -1.4000 -1.4350 -1.4700 -1.5050 -1.5400 -1.5750 -1.6100 -1.6450 -1.6800 -1.7150 -1.7500 -1.7850 -1.8200 -1.8550 -1.8900 -1.9250 -1.9600 -1.9950 -2.0300 -2.0650 -2.1000 -2.1350 -2.1700 -2.2050 -2.2400 -2.2750 -2.3100 -2.3450 -2.3800 -2.4150 -2.4500 -2.4850 -2.5200 -2.5550 -2.5900 -2.6250 -2.6600 -2.6950 -2.7300 -2.7650 -2.8000 -2.8350 -2.8700 -2.9050 -2.9400 -2.9750 -3.0100 -3.0450 -3.0800 -3.1150 -3.1500 -3.1850 -3.2200
Y [mm] -3.2550 -3.2900 -3.3250 -3.3600 -3.3950 -3.4300 -3.4650 -3.5000 -3.5350 -3.5700 -3.6050 -3.6400 -3.6750 -3.7100 -3.7450 -3.7800 -3.8150 -3.8500 -3.8850 -3.9200 -3.9550 -3.9900 -4.0250 -4.0600 -4.0950 -4.1300 -4.1650 -4.2000 -4.2350 -4.2700 -4.3050
Preliminary Product Information S15797EJ1V4PM
9
PD161644
3. PIN FUNCTIONS
(1/5)
Symbol VDC Pin Name DC/DC converter reference voltage VCC1 Logic reference voltage VSS1 Ground 88 to 91, 105 to 110 VGD Power supply input for DC/DC converter VDD1 DC/DC converter output 65 to 67 Output 114 to 116 Input Reference voltage input pin for VDD1, VSS1 to VSS4 boost. Connect to any of VDD2, VR or VS. Boost output voltage of DC/DC converter (VGD x 2 or x 3). The boost step number of VDD1 is selected according to how the external capacitor is connected. The boost reference voltage can be set using VGD. Refer to the function of VGD pin. VDD2 DC/DC converter output VSS2 DC/DC converter output 46 to 48 Output 84 to 87 Output Boost output voltage of DC/DC converter (VDC x 2 or x 3). The boost step number of VDD2 can be set using VCD2. Boost output voltage of DC/DC converter (VGD x -1 or x -2). The boost step number of VSS2 is selected according to how the external capacitor is connected. The boost reference voltage can be set using VGD. Refer to the function of VGD pin. VSS3 DC/DC converter output 40 to 42, 143 Output Boost output voltage of DC/DC converter (VGD x -2 or x -3). The boost step number of VSS3 is selected according to how the external capacitor is connected. The boost reference voltage can be set using VGD. Refer to VGD pin function. VSS4 DC/DC converter output VM Gate output low level select voltage 36, 37 Output The voltage level of VSS2 or VSS3 is output synchronized with the VCIN input. VCIN = 0: Output the voltage level of VSS3 VCIN = 1: Output the voltage level of VSS2 The timing chart is shown in Figure 3-1. VB Driver negative voltage 38, 39 Input Negative voltage of output buffer. This is the input pin of the liquid crystal driver negative voltage. Input the negative power supply of the gate output. VB pin connection examples are shown in Figure 3-2. C1 , C1
+ + + + + + -
Pad No. 93 to 100
I/O - - -
Function Reference voltage input pin for DC/DC converter.
101 to 104
2.5 to 3.3 V LS (level shifter) reference voltage input pin.
Connect to the system ground.
43 to 45
Output
Boost output voltage of DC/DC converter (VDC x -1).
Capacitor connect pin for boost
80 to 83, 76 to 79, 72 to 75, 68 to 71, 63, 64, 61, 62, 59, 60, 57, 58, 55, 56, 53, 54, 51, 52, 49, 50
Output
To connect booster for DC/DC converter. For the recommended values of the capacitance and withstanding voltage of each capacitor, refer to 9. RECOMMENDED CAPACITANCE VALUES OF EXTERNAL CAPACITOR.
C2 , C2 - C3 , C3
-
C4 , C4 - C5 , C5
-
C6 , C6 - VR Power supply output for DC/DC converter
111 to 113
Output
Positive power supply voltage output for the DC/DC converter. The VR output voltage can be changed by setting VRSEL0 to VRSEL2.
10
Preliminary Product Information S15797EJ1V4PM
PD161644
(2/5)
Symbol VS Pin Name Positive power output supply for driver MVS External resistor input - - - Input 117 Input Any output voltage can be set by connecting an external resistor. Leave open. Connect to external resistor. PVCC1 PVSS1 PVSS3 CLK Pull-up voltage Pull-down voltage Pull-down voltage Shift clock input 6, 24, 125 20, 27, 131 21 139 Pull-up voltage for mode setting pin. Pull-down voltage for mode setting pin. Pull-down voltage for mode setting pin. Shift clock input pin of the internal shift resistor. The contents of internal shift resistor are shifted at the rising edge of CLK. Connect to GCLK pin of source driver. STVR, STVL Start pulse input/output pin 136, 137 I/O Input/output pin of the internal shift resistor. Start pulse signal is read at the rising edge of shift clock CLK and a scan signal is output from the driver output pin. The valid level of the STVR/STVL pin is determined by the setting of STVSEL. When STVSEL = L, the pulse becomes low level at the falling edge of the 240th shift clock CLK and high level at falling edge of the 241st clock. OE1 Enable input 140 Input If the level selected by OE1SEL is input, the driver output is fixed to low level (When OE1SEL = L the driver output is fixed to low level if a low level is input). However, the shift resistor is not cleared. And, output enable actuation is asynchronous in the clock. Connect to GOE1 pin of source driver. OE2 Enable input 141 Input If the level selected by OE2SEL is input, the driver output is fixed to high level (When OE2SEL = L the driver output is fixed to low level if a high level is input). However, the shift resistor is not cleared. And, output enable actuation is asynchronous in the clock. Connect to GOE2 pin of source driver. R,/L Shift direction control 25 Input The shift direction control pin of shift register. The shift directions of the shift registers are as follows. R,/L = H (right shift): STVR input, O1 O241, STVL output R,/L = L (left shift) : STVL input, O241 O1, STVR output FRM Frame signal input 129 Input Input frame reverse signals. Connect to GFRAME pin of source driver. DCCLK Clock input for DC/DC converter 138 Input To input the external clock for the DC/DC converter. This pin is valid only when CLS0 = 1 and CLS1 = 1. In other settings, leave open. Pad No. 118 to 123 I/O Output Function Positive power supply voltage output for source driver. The VS output voltage can be changed by setting VSEL0 to VSEL2.
Preliminary Product Information S15797EJ1V4PM
11
PD161644
(3/5)
Symbol O1 to O241 Pin Name Driver output pins Pad No. 388 to 148 I/O Output Function Scan signal output pins that drive the gate electrode of a TFTLCD. The status of each output pin changes in synchronization with the rising edge of shift clock CLK. The output voltage of the driver is VDD1 to VB. COMH Common high level output 34, 35 Output High level of common voltage is output. The voltage level changes accordance with DA0 to DA7 and CDA0 to CDA7. Leave open when not using it. COML Common low level output 32, 33 Output Low level of common voltage is output. The voltage level changes accordance with DA0 to DA7 and CDA0 to CDA7. Leave open when not using it. VCOM Common output 29 to 31 Output The common voltage synchronized with the VCIN input is output. Connect to common pin of panel. Leave open when not using it. VCOMIN VCOM center voltage input 28 Input VCOM center voltage input pin. Leave open when COMSEL = 0. Internal D/A is valid. VCOMIN input voltage is valid. VCIN Common pulse input /GRESET Reset input 132 Input 130 Input To input common pulse. Connect to VCOUT3 pin of source driver. Fix this pin to low when not using it. Reset input pin. Connect to /GRESET pin of source driver. If /GRESET is made low, the serial interface is initialized (the register values are not initialized). A reset operation is executed according to the level of the /GRESET signal. Be sure to execute a reset using this pin at power application. IFSEL Interface selection 26 Input The serial interface input switching pin. Serial interface input. The DCON, RGONR, VCD2, VMS, FS0, FS2, CLS0, RGON, VSEL, EXRV, ACS0, SCN0 to SCN2, PUPT0, DUPF0 pins should be left open. Control pin input. The GCS, GCL, GDA pins should be left open. GCS Chip select input 133 Input To input chip select signals. Connect to GCS pin of source driver. Leave open. GCL Serial clock input 134 Input To input serial clock signals. Connect to GCL pin of source driver. Leave open. GDA Serial data input 135 Input To input serial data signals. Connect to GDA pin of source driver. Leave open.
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Preliminary Product Information S15797EJ1V4PM
PD161644
(4/5)
Symbol DCON Pin Name DC/DC converter control Pad No. 128 I/O Input Function Leave open (Internal resistors are valid). The DC/DC converter ON/OFF control signal is input. Connect to the DCON pin of the source driver. DC/DC converter OFF DC/DC converter ON RGONR VR regulator control 19 Input Leave open (Internal resistors are valid). The VR regulator ON/OFF control signal is input. VR regulator OFF VR regulator ON VCD2 VDD2 boost selection 126 Input Leave open (Internal resistors are valid). The VDD2 boost step number select pin. VDD2 = VDC x 2 VDD2 = VDC x 3 VMS VDD2 boost selection 18 Input Leave open (Internal resistors are valid). VDD2 boost mode select pin. VDD2: single boost mode VDD2: dual boost mode FS0 VDD2, VSS4 boost frequency selection in scan mode FS2 VDD1, VSS2, VSS3 boost frequency selection in scan mode CLS0 DC/DC OSC frequency selection 15 Input 16 Input 17 Input Leave open (Internal resistors are valid). VDD2, VSS4 boost frequency select pin in scan mode. fOSC/2 fOSC/4 Leave open (Internal resistors are valid). VDD1, VSS2, VSS3 boost frequency select pin in scan mode. fOSC/2 fOSC/4 Leave open (Internal resistors are valid). Select pin of the OSC oscillation frequency for DC/DC converter. fOSC = 25 kHz, DCCLK: Open External CK input mode RGON VS regulator control 127 Input Leave open (Internal resistors are valid). The VS regulator ON/OFF control signal is input. Connect this pin to the RGON pin of the source driver. VS regulator OFF VS regulator ON VSEL VS regulator voltage selection 14 Input Leave open (Internal resistors are valid). Select pin of output voltage for VS regulator. VS = 4 V VS = 5 V EXRV VS regulating resistor 13 selection Input Leave open (Internal resistors are valid). Select pin of external resistor for VS regulator. Internal resistor setting mode. Any output voltage can be set by connecting MVS to an external resistor.
Preliminary Product Information S15797EJ1V4PM
13
PD161644
(5/5)
Symbol ACS0 Pin Name Amp. current selection in scan mode 12 Pad No. I/O Input Function Leave open (Internal resistors are valid). Amp. current select pin in scan mode. Amp. current = 5 A Amp. current = 15 A SCN0, SCN1, SCN2 Gate scan selection 11, 10, 9 Input Leave open (Internal resistors are valid). Select pin of gate scan order. MODE1 MODE2 MODE3 MODE4 MODE5 PUPT0 Setting pin of DC/DC converter power on time DUPF0 Operating frequency setting pin at DC/DC converter power on 7 Input 8 Input Leave open (Internal resistors are valid). This pin sets the rising time of VDD1, VDD2, VSS2 to VSS4 at DC/DC converter power on time. Leave open (Internal resistors are valid). This pin sets the operating frequency at DC/DC converter power on time. fOSC/8 fOSC/16 VMON Stand-by current reduction control pin 22 Input The standby current reduction control pin. Normal mode. A quiescent current of about 0.5 A is consumed in standby mode. When the VCC1 voltage drops, the driver output pins are fixed to ALL-High. Standby current reduction mode. Makes the quiescent current consumed in standby mode 0. When the VCC1 voltage drops, the driver output pins are undefined. TESTOUT1 VREF reference voltage output TESTIN1, TESTIN2 TESTOUT2 DUMMY TEST output pin Dummy TEST input pin 4, 3 2 1, 23, 92, 124, 142, 144 to 147, 389 to 391 Output - Test output pin. Leave open. Dummy data Input Test input pins. Leave open. 5 Output The VREF voltage measurement pin. Leave open.
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Preliminary Product Information S15797EJ1V4PM
PD161644
Figure 3-1. VM signal Timing Chart
VCC1 VSS VCC1 VSS VCC1 VSS VCC1 VSS
VCC1 VSS DC/DC converter ON GOE1ON(R59) = "1" CLK = "H" + OE1 = "L" : Hi-Z
CLK = "H": Hi-Z Output Hi-Z term
Remark Hi-Z (High impedance) Figure 3-2. Examples of VB pin connection
(a) When the negative voltage level of the gate output is set to VSS3
PD161644
VGD VS or VR VDD1
(b) When the negative voltage level of the gate output is switched between VSS2 and VSS3
PD161644
VGD VS or VR VDD1
DC/DC converter
VSS3 VSS2 open
DC/DC converter
VSS3 VSS2
VCIN VSS2 VSS3 VM open VSS2
VCIN
VCOUT3 from PD161621
VM VSS3
common driving signal
VDD1
VB
VDD1
VB
O1
O1
O2 to Panel gate line
O2 to Panel gate line
Level shifter
Level shifter
O241
O241
Preliminary Product Information S15797EJ1V4PM
15
PD161644
4. COMMAND
4.1 Command List
Data bit 7 0 0 0 0 0 0 0 0 0 0 0 6 0 0 0 0 0 0 0 0 0 0 0 5 0 0 0 0 0 0 0 0 1 1 1 4 1 1 1 1 1 1 1 1 0 0 0 3 1 1 1 1 1 1 1 1 0 0 0 2 0 0 0 0 1 1 1 1 0 0 0 1 0 0 1 1 0 0 1 1 0 0 1 0 Rn Register D7 D6 D5 D4 D3 D2 D1 D0
0 R24 DC/DC operation setting 1 R25 DC/DC step setting 0 R26 DC/DC oscillation setting 1 R27 Regulator output setting 0 R28 LPM setting 1 R29 Gate scan setting 0 R30 Gate mode setting 1 R31 Common amplitude setting 0 R32 Common center setting 1 R33 DC/DC power on setting 0 R34 Reset DA7 CDA7
RGONR VS4ON VS3ON VS2ON VD2ON VD1ON DCON VRSEL2VRSEL1 VRSEL0 FUP ACS1 CLS1 ACS0 CLS0 EXRV LFS3 FS3 VSEL2 LFS2 FS2 VMS FS1 VCD2 FS0 RGON LPM SCN0 DA0 CDA0 RES
VSEL1 VSEL0 LFS1 SCN2 DA2 CDA2 LFS0 SCN1 DA1 CDA1
LACS1 LACS0
OE2SEL OE1SELSTVSEL DA6 CDA6 DA5 CDA5 PONM DA4 CDA4 PON DA3 CDA3
COMHI COMSEL COMON NLINE2 NLINE1
DUPF1 DUPF0 PUPT1 PUPT0
4.2 Command Description
Reset the internal data at power application by inputting a low level to the /GRESET pin. (1/5)
Resistor R24 Bit D0 Symbol DCON Reset 0 Function DC/DC converter control Description Control ON/OFF of DC/DC converter. DC/DC converter OFF DC/DC converter ON D1 VD1ON 0 VDD1 boost control Control ON/OFF of VDD1 boost. VDD1 boost OFF VDD1 boost ON D2 VD2ON 0 VDD2 boost control Control VDD2 boost ON/OFF. VDD2 boost OFF VDD2 boost ON D3 VS2ON 0 VSS2 boost control Control VSS2 boost ON/OFF. VSS2 boost OFF VSS2 boost ON D4 VS3ON 0 VSS3 boost control Control VSS3 boost ON/OFF. VSS3 boost OFF VSS3 boost ON D5 VS4ON 0 VSS4 boost control Control VSS4 boost ON/OFF. VSS4 boost OFF VSS4 boost ON D6 RGONR 0 VR regulator control Control ON/OFF of VR regulator. VR regulator OFF VR regulator ON
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Preliminary Product Information S15797EJ1V4PM
PD161644
(2/5)
Resistor R25 Bit D0 Symbol VCD2 Reset 0 Function VDD2 boost selection Description Select the number of VDD2 boost step (x2/x3). VDD2 = VDC x 2 VDD2 = VDC x 3 D1 VMS 1 VDD2 boost mode selection D2 VRSEL0 1 VR regulator output voltage selection Select VDD2 boost mode. VDD2 = Single boost mode VDD2 = Dual boost mode Select output voltage of VR regulator. When IFSEL = 1, VR is fixed to 5 V. VR = 3 V D3 VRSEL1 0 VR = 3.5 V VR = 4 V VR = 4.5 V VR = 4.75 V D4 VRSEL2 1 VR = 5 V VR = 5.25 V VR = 5.5 V R26 D0 D1 D2 FS0 FS1 FS2 1 0 1 VDD2, VSS4 boost frequency selection in scan mode VDD1, VSS2, VSS3 boost frequency D3 FS3 0 selection in scan mode Select VDD2, VSS4 boost frequency in scan mode. When IFSEL = 1, FS1 is fixed to 0. fOSC/2 fOSC/4 fOSC/8 fOSC/16 Select VDD1, VSS2, VSS3 boost frequency in scan mode. When IFSEL = 1, FS3 is fixed to 0. fOSC/2 fOSC/4 fOSC/8 fOSC/16 D4 CLS0 1 DC/DC OSC frequency selection D5 CLS1 0 Select oscillation frequency of OSC for DC/DC converter. When IFSEL = 1, CLS1 is fixed to 1. fOSC = 18 kHz, DCCLK: Open fOSC = 25 kHz, DCCLK: Open fOSC = 37 kHz, DCCLK: Open External CK input mode D6 FUP 0 Switching of DC/DC OSC frequency Select oscillation frequency of OSC for DC/DC converter. When IFSEL = 1, the frequency is fixed to fOSC. fOSC fOSC x 2
Preliminary Product Information S15797EJ1V4PM
17
PD161644
(3/5)
Resistor R27 Bit D0 Symbol RGON Reset 0 Function VS regulator control Description Control ON/OFF of VS regulator. VS regulator OFF VS regulator ON D1 VSEL0 1 VS regulator output voltage selection Select the output voltage of VS regulator. VSEL0 = 0: VS = 5 V, VSEL = 1: VS = 4 V when IFSEL = 1. VS = 3 V D2 VSEL1 0 VS = 3.5 V VS = 4 V VS = 4.5 V VS = 4.75 V D3 VSEL2 1 VS = 5 V VS = 5.25 V VS = 5.5 V D4 EXRV 0 VS regulator resistor selection Select external resistor of VS regulator. Internal resistor mode Connect external resistor to MVS and set any level of voltage D5 ACS0 0 Amp. current selection in scan mode D6 ACS1 0 Select Amp. current of VR and VS regulators in scan mode. When IFSEL = 1, ACS1 is fixed to 0. Amp. current = 5 A Amp. current = 10 A Amp. current = 15 A Amp. current = 30 A R28 D0 LPM 0 Low power mode control Control in low power mode. When IFSEL = 1, LPM is fixed to 0. Scan mode Low power mode D1 LFS0 0 VDD2, VSS4 boost frequency selection in D2 LFS1 0 low power mode Select boost frequency of VDD2, VSS4 in low power mode. fOSC/8 fOSC/16 fOSC/32 fOSC/64 D3 LFS2 0 VDD1, VSS2, VSS3 boost frequency selection in low power D4 LFS3 0 mode Select boost frequency of VDD1, VSS2, VSS3 in low power mode. fOSC/8 fOSC/16 fOSC/32 fOSC/64 D5 LACS0 0 Amp. current selection in low power mode D6 LACS1 0 Select Amp. current in low power mode. Amp. current = 1.25 A Amp. current = 2.5 A Amp. current = 5 A Amp. current = 7.5 A
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Preliminary Product Information S15797EJ1V4PM
PD161644
(4/5)
Resistor R29 Bit D0 D1 D2 D3 Symbol SCN0 SCN1 SCN2 STVSEL Reset 1 1 1 0 Start pulse input/output valid level selection Function Gate scan selection Description Select scan order of gate scan. MODE1 MODE2 MODE3 MODE4 MODE5 Select start pulse input/output valid level to STVR/STVL. But there is no pin to select start pulse input/output valid level. When IFSEL = H (When using control pins), low-fixed is valid. Refer to 4.3 Command Setting Values When IFSEL = H (When Using Control Pins). Low level is valid. High level is valid. D4 OE1SEL 0 OE1 valid level selection Select valid level of OE1. But there is no pin to select valid level of OE1. When IFSEL = H (When using control pins), low-fixed is valid. Refer to 4.3 Command Setting Values When IFSEL = H (When Using Control Pins). OE1 = Low, gate output OFF OE1 = High, gate output OFF D5 OE2SEL 0 OE2 valid level selection Select valid level of OE2. There is no pin to select valid level of OE2. When IFSEL = H (When using control pins), low-fixed is valid. Refer to 4.3 Command Setting Values When IFSEL = H (When Using Control Pins). OE2 = Low, gate output ON OE2 = High, gate output ON R30 D0 NLINE1 1 Gate mode selection Select 1-line skip, 2-line skip or N frame inversion of a gate scan. When IFSEL = 1, this is fixed to normal mode. Normal mode D1 NLINE2 1 1-line skip mode 2-line skip mode N frame inversion D2 COMON 0 COM output control Control ON/OFF of COM output. When IFSEL = 1, COMON is fixed to 0. COM_AMP, COM output OFF COM_AMP, COM output ON D3 COMSEL 0 VCOM center input selection D4 COMHI 0 VCOM output selection Select VCOM center voltage input. Internal D/A is valid. VCOMIN input voltage is valid. Select VCOM output. VCOM = Hi-Z VCOM = Output
Preliminary Product Information S15797EJ1V4PM
19
PD161644
(5/5)
Resistor R31 R32 R33 Bit D0 to D7 D0 D1 D2 Symbol DA0 to DA7 PUPT0 PUPT1 DUPF0 Reset 0 0 0 1 1 Setting of DC/DC converter power on operating frequency D3 DUPF1 0 Function COM amplitude control COM center level control Setting of DC/DC converter power on time Description Control COM output amplitude using 8-bit D/A. Control COM output center level using 8-bit D/A. This pin sets the ON time of VDD1 and VDD2, VSS2 to VSS4, and RGON when the DC/DC converter is started up. This setting is valid only when PONM = 1. When IFSEL = 1, PUPT1 is fixed to 0. This pin sets the DC/DC operating frequency when the DC/DC converter is started up. When IFSEL = 1, DUPF1 is fixed to 0. fOSC/8 fOSC/16 fOSC/2 fOSC/4 D4 PON 0 Switching DC/DC converter startup operating frequency This pin selects the VDD1, VDD2, VSS2 to VSS4 rising operating frequency when the DC/DC converter is started up. This setting is valid only when PONM = 1. Normal operation Power on operation startup operation D5 PONM 1 DC/DC operation startup operating selection Select internal/external sequence of DC/DC converter power on operation. External sequence Internal sequence R34 D0 RES - Command reset This is the command reset function. A command reset must always be executed after power application. All contents of registers are initialized. This bit is automatically cleared after command reset execution (RES = 1). It is therefore not necessary to set this bit to 0 again by software (to select normal operation). Also, because this bit changes from 1 to 0 very quickly following a command reset, it is not necessary to leave any time before setting the next command after setting a command reset. Normal operation Command reset
D0 to D7 CDA0 to CDA7
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Preliminary Product Information S15797EJ1V4PM
PD161644
4.3 Command Setting Values When IFSEL = H (When Using Control Pins)
(1/2)
Register R24 Bit D0 D1 D2 D3 D4 D5 D6 R25 D0 D1 D2 D3 D4 R26 D0 D1 D2 D3 D4 D5 D6 R27 D0 D1 D2 D3 D4 D5 D6 R28 D0 D1, D2 D3, D4 D5, D6 R29 D0 D1 D2 D3 D4 D5 Symbol DCON VD1ON VD2ON VS2ON VS3ON VS4ON RGONR VCD2 VMS VRSEL0 VRSEL1 VRSEL2 FS0 FS1 FS2 FS3 CLS0 CLS1 FUP RGON VSEL0 VSEL1 VSEL2 EXRV ACS0 ACS1 LPM LFS0, LFS1 LFS2, LFS3 LACS0, LACS1 SCN0 SCN1 SCN2 STVSEL OE1SEL OE2SEL Setting value - 1 1 1 1 0 - - - 1 0 1 - 0 - 0 - 1 0 - - - - - - 0 0 0,1 0,1 0,1 - - - 0 0 0 FS0 control pin is valid. fOSC/2, fOSC/4 FS2 control pin is valid. fOSC/2, fOSC/4 CLS1 control pin is valid. fOSC = 37 kHz, External fOSC RGON control pin is valid. VSEL control pin is valid. VS = 5 V VS = 4 V EXRV control pin is valid. ACS0 control pin is valid. Current = 5 A, Current = 15 A Scan mode fOSC/32 fOSC/32 Amp. current = 2.5 A SCN0 control pin is valid SCN1 control pin is valid SCN2 control pin is valid low-level is valid OE1 = low-level, gate output OFF OE2 = low-level, gate output ON DCON control pin is valid. VDD1 boost ON VDD2 boost ON VSS2 boost ON VSS3 boost ON VSS4 boost OFF RGONR control pin is valid. VCD2 control pin is valid. VMS control pin is valid. VR = 5 V Conditions
Remark When IFSEL = H (when using the control pins), the GCS, GCL, and GDA pins are pulled down to low level, so be sure to leave these pins open. When IFSEL = L (when using the serial interface), DCON, RGONR, VCD2, VMS, FS0, FS2, CLS0, RGON, VSEL, EXRV, ACS0, SCN0, SCN1, SCN2, PUPT0, DUPF0 pins should be left open.
Preliminary Product Information S15797EJ1V4PM
21
PD161644
(2/2)
Register R30 Bit D0 D1 D2 R31 R32 R33 D0 to D7 D0 to D7 D0 D1 D2 D3 D4 D5 R34 D0 Symbol NLINE1 NLINE2 COMON DA0 to DA7 CDA0 to CDA7 PUPT0 PUPT1 DUPF0 DUPF1 PON PONM RES Setting value 1 1 0 0 0 - 0 - 0 1 1 0 COM_AMP, COM output OFF 0 0 PUPT0 control pin is valid RGONR = 2048/fOSC RGONR = 256/fOSC DUPF0 control pin is valid fOSC/8 fOSC/16 Internal sequence Internal sequence Normal operation Conditions normal mode
Remark When IFSEL = H (when using the control pins), the GCS, GCL, and GDA pins are pulled down to low level, so be sure to leave these pins open. When IFSEL = L (when using the serial interface), DCON, RGONR, VCD2, VMS, FS0, FS2, CLS0, RGON, VSEL, EXRV, ACS0, SCN0, SCN1, SCN2, PUPT0, DUPF0 pins should be left open.
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Preliminary Product Information S15797EJ1V4PM
PD161644
5. MODE DESCRIPTION
5.1 Output Mode and Gate Scan Selection
Normal mode: NLINE1 =1, NLINE2 = 1
Scan MODE MODE1 R,/L H L MODE2 H L MODE3 H L MODE4 H L MODE5 H L 1240, 241 2412,1 1121 * 241123, 122 122241 * 1212, 1 1161 * 241163, 162 162241 * 1612, 1 1201, 241203, 202 202241 * 2012, 1 1, 241, 2, 240, 3, 239.....118, 124, 119, 123, 120, 122, 121 121, 122, 120, 123, 119, 124.....4, 239, 3, 240, 2, 241, 1 Scan direction Dummy output 241 1 122 1 162 1 202 1 121 1 Cascade output 240 2 123 2 163 2 203 2 122 241
1-line step mode: NLINE1 =1, NLINE2 = 0
Scan MODE MODE1 R,/L H L MODE2 H Scan direction 1, 3, 5...235, 237, 239, 241 * 2, 4, 6...236, 238, 240 241, 239, 237...7, 5, 3, 1 * 240, 238, 236...6, 4, 2 1, 3, 5...117, 119, 121 * 240, 238, 236...128, 126, 124, 122, * 2, 4, 6...116, 118, 120 * 241, 239, 237...127, 125, 123 L 122, 124, 126...236, 238, 240 * 121, 119, 117...7, 5, 3, 1, * 123, 125, 127...237, 239, 241 * 120, 118, 116...6, 4, 2 MODE3 H 1, 3, 5...157, 159, 161 * 240, 238, 236...168, 166, 164, 162 * 2, 4, 6...156, 158, 160 * 241, 239, 237...167, 165, 163 L 162, 164, 166...236, 238, 240 * 161, 159, 157...7, 5, 3, 1, * 163, 165, 167...237, 239, 241 * 160, 158, 156...6, 4, 2 MODE4 H 1, 3, 5...197, 199, 201 * 240, 238, 236...208, 206, 204, 202, * 2, 4, 6...196, 198, 200 * 241, 239, 237...207, 205, 203 L 202, 204, 206...236, 238, 240 * 201, 199, 197...7, 5, 3, 1, * 203, 205, 207...237, 239, 241 * 200, 198, 196...6, 4, 2 1 2 202 203 1 2 162 163 1 2 Dummy output 241 1 122 Cascade output 240 2 123
Preliminary Product Information S15797EJ1V4PM
23
PD161644
2-line step mode: NLINE1 = 0, NLINE2 = 1
Scan MODE MODE1 R,/L H * 3, 6, 9...234, 237, 240 L 241, 238, 235...10, 7, 4, 1 * 240, 237, 234...9, 6, 3 * 239, 236, 233...8, 5, 2 MODE2 H 1, 4, 7...115, 118, 121 * 239, 236, 233...131, 128, 125, 122, * 2, 5, 8...113, 116, 119 * 241, 238, 235...130, 127, 124 * 3, 6, 9...114, 117, 120 * 240, 237, 234,...129, 126, 123 L 122, 125, 128...233, 236, 239 * 121, 118, 115...10, 7, 4, 1, * 123, 126, 129...234, 237, 240 * 120, 117, 114...9, 6, 3 * 124, 127, 130...235, 238, 241 * 119, 116, 113...8, 5, 2 MODE3 H 1, 4, 7...154, 157, 160 * 240, 237, 234...171, 168, 165, 162, * 2, 5, 8...155, 158, 161 * 239, 236, 233...170, 167, 164 * 3, 6, 9...153, 156, 159 * 241, 238, 235...169, 166, 163 L 162, 165, 168...234, 237, 240 * 160, 157, 154...10, 7, 4, 1, * 163, 166, 169...235, 238, 241 * 159, 156, 153...9, 6, 3 * 164, 167, 170...233, 236, 239 * 161, 158, 155..8, 5, 2 MODE4 H 1, 4, 7...193, 196, 199 * 241, 238, 235...211, 208, 205, 202, * 2, 5, 8...194, 197, 200 * 240, 237, 234...210, 207, 204 * 3, 6, 9...195, 198, 201 * 239, 236, 233...209, 206, 203 L 202, 205, 208...235, 238, 241 * 199, 196, 193...10, 7, 4, 1, * 203, 206, 209...2337, 236, 239 * 201, 198, 195...9, 6, 3 * 204, 207, 210...234, 240, 200 * 197, 194...8, 5, 2 1 2 202 203 1 2 162 163 1 2 122 123 1 2 Scan direction 1, 4, 7...232, 235, 238, 241 * 2, 5, 8...233, 236, 239 Dummy output 241 Cascade output 240
N-frame reverse: NLINE1 = 0, NLINE2 = 0
Scan MODE MODE1 R,/L H FMR 1 0 L 1 0 1240, 241 2412, 1 (reverse operation) 2412, 1 1240, 241 (reverse operation) Scan direction Dummy output 241 241 1 1 Cascade output 240 2 2 240
5.2 DC/DC OSC Frequency Selection
CLS0 0 1 0 1 CLS1 0 0 1 1 OSC oscillation frequency for DC/DC converter fOSC = 18 kHz fOSC = 25 kHz fOSC = 37 kHz fOSC = External CK DCCLK Open Open Open External CK input
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Preliminary Product Information S15797EJ1V4PM
PD161644
5.3 DC/DC Converter Control
DCON 0 1 1 1 1 1 1 1 1 1 1 VD1ON x 0 1 - - - - - - - - VD2ON x - - 0 1 - - - - - - VS2ON x - - - - 0 1 - - - - VS3ON x - - - - - - 0 1 - - VS4ON x - - - - - - - - 0 1 State of VDD1, VDD2, VSS2, VSS3, VSS4 VDD1, VDD2, VSS2, VSS3, VSS4: OFF VDD1: OFF VDD1: ON VDD2: OFF VDD2: ON VSS2: OFF VSS2: ON VSS3: OFF VSS3: ON VSS4: OFF VSS4: ON
Remark x: 0 or 1 5.4 VDD2 Boost Selection
VCD2 0 1 VDD2 VDC x 2 boost VDC x 3 boost
5.5 Division Ratio Selection of the DC/DC Converter at Power on
PONM 1 1 1 1 0 0 0 0 0 PON x x x x 1 1 1 1 0 DUPF0 0 1 0 1 0 1 0 1 x DUPF1 0 0 1 1 0 0 1 1 x Division ratio of the DC/DC converter OSC frequency Internal sequence: OSC = fOSC/8 Internal sequence: OSC = fOSC/16 Internal sequence: OSC = fOSC/2 Internal sequence: OSC = fOSC/4 External sequence: OSC = fOSC/8 External sequence: OSC = fOSC/16 External sequence: OSC = fOSC/2 External sequence: OSC = fOSC/4 Normal mode
Remark x: 0 or 1 5.6 DC/DC Converter Power on Time Selection
PONM 1 1 1 1 0 0 PON x x x x 1 0 PUPT0 0 1 0 1 x x PUPT1 0 0 1 1 x x VD2ON 16/fOSC 16/fOSC 16/fOSC 16/fOSC External input RGONR 2048/fOSC 256/fOSC 512/fOSC 1024/fOSC External input VS2ON to VS4ON 1.5 x 2048/fOSC 1.5 x 256/fOSC 1.5 x 512/fOSC 1.5 x 1024/fOSC External input VD1ON 2.5 x 2048/fOSC 2.5 x 256/fOSC 2.5 x 512/fOSC 2.5 x 1024/fOSC External input Internal sequence Internal sequence Internal sequence Internal sequence External sequence Normal mode
Remark x: 0 or 1
Preliminary Product Information S15797EJ1V4PM
25
PD161644
5.7 Division Ratio Selection of the DC/DC Converter OSC Frequency
LPM 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 FS0 0 1 0 1 x x x x x x x x x x x x FS1 0 0 1 1 x x x x x x x x x x x x FS2 x x x x 0 1 0 1 x x x x x x x x FS3 x x x x 0 0 1 1 x x x x x x x x LFS0 x x x x x x x x 0 1 0 1 x x x x LFS1 x x x x x x x x 0 0 1 1 x x x x LFS2 x x x x x x x x x x x x 0 0 1 1 LFS3 x x x x x x x x x x x x 0 0 1 1 Division ratio of the DC/DC converter OSC frequency VDD2, VSS4: fOSC/2 VDD2, VSS4: fOSC/4 VDD2, VSS4: fOSC/8 VDD2, VSS4: fOSC/16 VDD1, VSS2, VSS3: fOSC/2 VDD1, VSS2, VSS3: fOSC/4 VDD1, VSS2, VSS3: fOSC/8 VDD1, VSS2, VSS3: fOSC/16 VDD2, VSS4: fOSC/8 VDD2, VSS4: fOSC/16 VDD2, VSS4: fOSC/32 VDD2, VSS4: fOSC/64 VDD1, VSS2, VSS3: fOSC/8 VDD1, VSS2, VSS3: fOSC/16 VDD1, VSS2, VSS3: fOSC/32 VDD1, VSS2, VSS3: fOSC/64
Remark x: 0 or 1 5.8 Amp. Current Selection
RGON, RGONR 0 1 1 1 1 1 1 1 1 LPM x 0 0 0 0 1 1 1 1 ACS0 x 0 0 1 1 x x x x ACS1 x 0 1 0 1 x x x x LACS0 x x x x x 0 0 1 1 LACS1 x x x x x 0 1 0 1 VR condition VSS1 Output Output Output Output Output Output Output Output VS condition VSS1 Output Output Output Output Output Output Output Output State of Circuit Current Amp, CS Power OFF Amp. current = 5 A Amp. current = 10 A Amp. current = 15 A Amp. current = 30 A Amp. current = 1.25 A Amp. current = 2.5 A Amp. current = 5 A Amp. current = 7.5 A
Remark x: 0 or 1
5.9 VR Regulator Selection Output Register control
RGONR 0 1 1 1 1 1 1 1 1 VRSEL0 x 0 1 0 1 0 1 0 1 VRSEL1 x 0 0 1 1 0 0 1 1 VRSEL2 x 0 0 0 0 1 1 1 1 3V 4V VR VR regulator OFF (VR = VSS1) : Internal resistor connection : Internal resistor connection 3.5 V : Internal resistor connection 4.5 V : Internal resistor connection 4.75 V: Internal resistor connection 5V : Internal resistor connection 5.25 V: Internal resistor connection 5.5 V : Internal resistor connection
Remark x: 0 or 1
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Preliminary Product Information S15797EJ1V4PM
PD161644
Pin control
RGONR 0 1 VR VR regulator OFF (VR = VSS1) 5 V: Internal resistor connection
5.10 VS Regulator Selection Output Register control
RGON 0 1 1 1 1 1 1 1 1 1 EXRV x 1 0 0 0 0 0 0 0 0 VSEL0 x x 0 1 0 1 0 1 0 1 VSEL1 x x 0 0 1 1 0 0 1 1 VSEL2 x x 0 0 0 0 1 1 1 1 MVS condition Hi-Z Amp.-input Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z Hi-Z VS VS regulator OFF (VS = VSS1) External resistor connection 3V 3.5 V 4V 4.5 V 4.75 V 5V 5.25 V 5.5 V : Internal resistor connection : Internal resistor connection : Internal resistor connection : Internal resistor connection : Internal resistor connection : Internal resistor connection : Internal resistor connection : Internal resistor connection
Remark x: 0 or 1
Pin control
RGON 0 1 1 VSEL x 0 1 VR VS regulator OFF (VS = VSS1) 5 V : Internal resistor connection 4 V : Internal resistor connection
Remark x: 0 or 1 5.11 Control of VM Output Control, VCOM Output
COMON 0 1 1 COMHI x 0 1 DAC, COM_AMP OFF ON ON VCOM Hi-Z Hi-Z Output
Remark x: 0 or 1
Preliminary Product Information S15797EJ1V4PM
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PD161644
5 5.12 VCOM Output Frequency Adjustment This is used to adjust the output amplitude of VCOM output. The VCOM output amplitude voltage (VCOMpp) can be adjusted as shown by the expression below using power supply control register 9 (R31), which is the output voltage of a D/A converter circuit for which VS is the reference potential. VCOMpp = VS x 2 x {4/5 x (DAR31/255) } Remark DAR31: R31 setting values The values of R31 that can be set are determined by the relationship of booster voltages VDD2 and VSS4 to the potential level of the actual common drive waveform after VCOM center adjustment. Set the VCOM output amplitude voltage according to R31, the VCOM output center potential voltage setting level according to power supply control register 10 (R32), or the VCOM output center potential input from VCOMIN in the relationships shown in the figure below. Figure 5-1. Voltage Ranges that can be set for Common Drive Waveform
VDD2 -0.2 V Common drive waveform VCOMH
1/2VCOMpp
VDD2
VSS VCOML VSS4 +0.2 V VSS4
VCOMpp 2 V VCOMH VDD2 - 0.2 V VCOML VSS4 + 0.2 V Remark VCOMH = 1/2 VCOMpp + VCOMC VCOML = 1/2 VCOMpp - VCOMC VCOMC: R32 setting values [COMSEL(R30) = 0] or VCOMIN input voltage level [COMSEL (R30) = 1]
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Preliminary Product Information S15797EJ1V4PM
1/2VCOMpp
Voltage ranges that can be set for common drive waveform
VCOMC
VCOMpp
PD161644
VCOM output amplitude voltage (VCOMpp) adjustment and D/A converter setting values
DA7 0 0 0
* * *
DA6 0 0 0
* * *
DA5 0 0 0
* * *
DA4 0 0 0
* * *
DA3 0 0 0
* * *
DA2 0 0 0
* * *
DA1 0 0 1
* * *
DA0 0 1 0
* * *
DAR31 0 1 2
* * *
VCOMpp (VS = 5 V) 0.0000 V (Setting prohibited) 0.0314 V (Setting prohibited) 0.0627 V (Setting prohibited)
* * *
0 0 0 0 0
* * *
0 0 1 1 1
* * *
1 1 0 0 0
* * *
1 1 0 0 0
* * *
1 1 0 0 0
* * *
1 1 0 0 0
* * *
1 1 0 0 1
* * *
0 1 0 1 0
* * *
62 63 64 65 66
* * *
1.9451 V (Setting prohibited) 1.9765 V (Setting prohibited) 2.0078 V 2.0392 V 2.0706 V
* * *
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
0 1 1
1 0 1
253 254 255
7.9373 V 7.9686 V 8.0000 V
Remark The range in which the VCOM output amplitude can be varied is restricted by the output voltage of VDD2 and VSS4. 5 5.13 VCOM Output Center Adjustment This is used to adjust the center potential level of VCOM output. The VCOM output center potential voltage (VCOMC) can be adjusted as shown by the expression below using power supply control register 9 (R32), which is the output voltage of a D/A converter circuit for which VS is the reference potential. VCOMpp = VS x {4/5 x (DAR32/255) } Remark DAR32: R32 setting values VCOM output center potential voltage (VCOMC) and D/A converter setting values
DA7 0 0 0 0 0
* * *
DA6 0 0 0 0 0
* * *
DA5 0 0 0 0 0
* * *
DA4 0 0 0 0 0
* * *
DA3 0 0 0 0 0
* * *
DA2 0 0 0 0 1
* * *
DA1 0 0 1 1 0
* * *
DA0 0 1 0 1 0
* * *
DAR31 0 1 2 3 4
* * *
VCOMC (VS = 5 V) 0.0000 V 0.0157 V 0.0314 V 0.0471 V 0.0627 V
* * *
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
1 1 1
0 1 1
1 0 1
253 254 255
3.9686 V 3.9843 V 4.0000 V
Remark The range in which the VCOM output center can be varied is restricted by the output voltage of VDD2 and VSS4.
Preliminary Product Information S15797EJ1V4PM
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PD161644
The values of R32 that can be set are determined by the relationship of booster voltages VDD2 and VSS4 to the potential level of the actual common drive waveform due to VCOM output amplitude voltage (VCOMpp) adjustment. Refer to 5.12 VCOM Output Frequency Adjustment for the relationship between the VCOM output center potential voltage according to R32 and the VCOM output amplitude voltage (VCOMpp) according to power supply control register 9 (R31).
5.14 VCOM Center Adjustment Selection The method of setting the center voltage of common drive waveform VCOM is selected according to the setting of COMSEL (R30). When COMSEL is set to 1, directly input the VCOM center voltage to the VOMIN pin from outside the IC.
COMSEL 0 1 VCOM center adjustment Internal D/A is valid (R31 setting is valid). VCOMIN input voltage is valid.
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Preliminary Product Information S15797EJ1V4PM
PD161644
6. PANNEL CONNECTION EXAMPLES
[MODE1]
MODE1R (SCN0 = 1, SCN1 = 1, SCN2 = 1, R,/L = 1) 1 MODE1R (SCN0 = 1, SCN1 = 1, SCN2 = 1, R,/L = 1) 1
TFT Panel
121
TFT Panel
122
240
240
1
PD161644
240
1
1
240
Source driver
PD161644
Source driver
MODE1L (SCN0 = 1, SCN1 = 1, SCN2 = 1, R,/L = 0)
MODE1L (SCN0 = 1, SCN1 = 1, SCN2 = 1, R,/L = 0)
Source driver
PD161644
241 2
Source driver
PD161644
241 122,121 2
241
241
TFT Panel
122
TFT Panel
121
2 MODE1R (SCN0 = 1, SCN1 = 1, SCN2 = 1, R,/L = 1) 2 1 3 4
2 MODE1L (SCN0 = 1, SCN1 = 1, SCN2 = 1, R,/L = 0)
Source driver
PD161644
241 2
TFT Panel
241 239 240 238
237 239
238 240
TFT Panel
1
240
PD161644
Source driver
5 3
4 2
Preliminary Product Information S15797EJ1V4PM
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PD161644
[MODE2]
MODE2R (SCN0 = 1, SCN1 = 1, SCN2 = 0, R,/L = 1) 1 MODE2L (SCN0 = 1, SCN1 = 1, SCN2 = 0, R,/L = 0)
Source driver
PD161644
241 122,121 2
TFT
121
Panel
241
122
TFT
123 241
Panel
121
1
121,123 241
PD161644
Source driver
2
[MODE3]
MODE3R (SCN0 = 1, SCN1 = 0, SCN2 = 1, R,/L = 1) 1 MODE3L (SCN0 = 1, SCN1 = 0, SCN2 = 1, R,/L = 0)
Source driver
PD161644
241 162,161 2
TFT
161
Panel
241
162
241 163
TFT Panel
161
1
161,163 241
PD161644
Source driver
2
[MODE4]
MODE4R (SCN0 = 1, SCN1 = 0, SCN2 = 0, R,/L = 1) 1 MODE4L (SCN0 = 1, SCN1 = 0, SCN2 = 0, R,/L = 0)
Source driver
PD161644
241 202,201 2
TFT Panel
201 241 241 201 202
TFT
203
Panel
1
201,203 241
PD161644
Source driver
2
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Preliminary Product Information S15797EJ1V4PM
PD161644
7. CONNECTION EXAMPLE WITH SOURCE DRIVER
DUMMY O1 O2 DUMMY TESTOUT2 TESTIN2 TESTIN1 TESTOUT1 PVCC1 DUPF0 PUPT0 SCN2 SCN1 SCN0 ACS0 EXRV VSEL CLS0 FS2 FS0 VMS RGONR PVSS1 PVSS3 VMON DUMMY PVCC1 R,/L IFSEL PVSS1 VCOMIN VCOM COML COMH VM VB VSS3 VSS4 VSS2 C6C6+ C5C5+ C4C4+ C3C3+ VDD1 C2C2+ C1C1+ VDD2 VSS1 DUMMY VDC VCC1 VSS1 VR VGD MVS VS DUMMY PVCC1 VCD2 RGON DCON FRM VCIN PVSS1 /GRESET GCS GCL GDA STVR STVL DCCLK CLK OE1 OE2 VSS3 DUMMY
IFSEL : L (when in serial interface input)
OPEN (pull-down)
IFSEL : H (control pin input)
Connect to PVSS/PVCC1
BUMP SIDE UP
0.1 uF/10 V 0.1 uF/10 V 0.1 uF/10 V
1 uF/10 V 1 uF/10 V
1 uF/10 V
1 uF/25 V
1 uF/25 V
Schottky diode
O240 O241 DUMMY
DUMMY VC2 DUMMY Y528 Y527 Y526
DUMMY VC2 DUMMY GOE2 GOE1 GCLK(CPV) DMSTB GSTB(STV) GDA GCL GCS /GRESET VCOUT3 GFRM VCC1 TOUT TOUT TOUT TOUT DUMMY TOUT DUMMY DAC0-DAC7 TBGR TBSEL2 TBSEL1
VSS(MODE)
VCOUT2 V0-V5 VS FBRSEL
VSS(MODE)
BGRIN VCOMR
VSS(MODE)
RGB00-25 DOTCLK HSYNC VSYNC
VSS(MODE)
BUMP SIDE UP
TOSCO TOSCI TOSCSELI TOSCSELO TSTRTST TSTVIHL
VCC1(MODE)
TDELAY1-6
VSS(MODE)
BLCS_I SO SCL SI RGB/CPU /RD /WR RS /RESET /CS
VSS(MODE)
CPU interface
VSS(MODE)
D0-D17 CSTB
VSS(MODE)
IF_SHARE
VCC1(MODE)
DDS
VSS(MODE)
VCC1(MODE)
BWS1
VSS(MODE)
BWS0
VCC1(MODE)
DTX2
VSS(MODE)
DTX1
VCC1(MODE)
C86
VSS(MODE)
PSX
VCC1(MODE)
DCKEG
VSS(MODE)
VSEG
VCC1(MODE)
HSEG
VSS(MODE)
SCLEG0
VCC1(MODE)
SCLEG1
VSS(MODE)
OSCIN
VSS(MODE)
OSCOUT
VSS(MODE)
Select on-chip oscillator
Using D17-D01 only as parallel interface.
BWS2
OSCSEL
VCC1(MODE)
TOUT0-17
VCC1(MODE)
BLSDA BLSCL /BLCS_O
VSS(MODE)
Y3 Y2 Y1 DUMMY VC1 DUMMY
GOE2 GOE1 GCLK DMSTB GSTB GDA GCL GCS /GRESET VCOUT3 GFRM DUMMY VC1 DUMMY
Back panel LCD control
RGB interface
VSS(MODE)
Because of using specified interface for gate driver interface, leave them open.
Generate logic part supply voltage inside PD161621.
DUMMY VCOM DUMMY VCOUT1 DUMMY CVPH CVPL CVNH CVNL VSS VSTBY VCC1 VCC11 SF_VCC1 DCON RGON LPM VCD2
VCC+ VSS 2.5 to 3.3 V 2.5 to 3.3 V
Preliminary Product Information S15797EJ1V4PM
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PD161644
8. VALUE OF WIRING RESISTANCE TO EACH PIN
The recommended wiring resistance values are shown below. The wiring resistance values affect the current capacity of the power supply, so be sure to design using values that do not exceed those recommended. Table 8-1. Recommended Wiring Resistor Values
Pin name VSS1 VCC1 VDC VS VDD2 C1 C2
+ -
Wiring Resistor Values () < 10 < 10 < 10 < 10 < 10 < 10 < 10 < 10 < 10 < 50 < 50 < 50 < 50 < 50 < 50 < 50 < 50 < 50 < 50 < 50 < 50
C1 C2
+ -
VDD1 VSS2 VSS3 VSS4 C3 C4 C5 C6
+ -
C3 C4 C5 C6
+ -
+ -
+ -
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Preliminary Product Information S15797EJ1V4PM
PD161644
9. RECOMMENDED CAPACITANCE VALUES OF EXTERNAL CAPACITOR
The recommended capacitance values of the external capacitor are shown below. These values should be finally determined only after performing sufficient evaluation on the module. Table 9-1. Recommended Values of External Capacitor
Pin name VS VR VDD1 VDD2 VSS2 VSS3 VSS4 COMH COML C1 , C1 C2 , C1 C3 , C1 C4 , C1 C5 , C1
+ + + + + + - - - - - -
Recommended value of capacitors (F) 1 to 4.7 1 to 4.7 0.47 to 1 1 to 4.7 0.47 to 1 0.47 to 1 1 to 4.7 1 to 4.7 1 to 4.7 1 to 4.7 1 to 4.7 0.47 to 1 0.47 to 1 0.47 to 1 1 to 4.7
Withstanding voltage (V) 6.3 or more 6.3 or more 25 or more 15 or more 25 or more 25 or more 10 or more 6.3 or more 6.3 or more 10 or more 10 or more 10 or more 10 or more 10 or more 10 or more
C6 , C1
Preliminary Product Information S15797EJ1V4PM
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PD161644
10. SERIAL INTERFACE
When the serial interface has been selected, if the chip is active (GCS = L), serial data input (GDA) and serial clock input (GCL) can be received. Serial data is read from D7 and then from D6 to D0 on the rising edge of the serial clock, via the serial input pin. This data is synchronized on the eighth serial clock's rising edge and is then converted to parallel data for processing. The serial interface signal chart is shown below. Figure 10-1. Serial Interface Signal Chart
GCS GDA GCL
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
A7
A6
A5
A4
A3
A2
A1
A0
D7
D6
D5
D4
D3
D2
D1
D0
Command
Data to set command
Note that odd bytes of data received after the reset command is input are recognized as commands, and even bytes of data are recognized as data values to be set to commands. Remarks 1. The shift register and counter are reset to their initial values when the chip select signal is inactive. Do not set the chip select signal to inactive between transmission of an 8-bit command and transmission of the 8bit data set for the command. 2. When using GCL wiring, take care concerning the possible effects of terminating reflection and noise from external sources. We recommend checking operation with the actual device.
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Preliminary Product Information S15797EJ1V4PM
PD161644
11. TIMING CHARTS (MODE1: SCN0 = 1, SCN1 = 1, SCN2 = 1)
R,/L = H, STVSEL = 0, OE1SEL = 0, OE2SEL = 0
1 2 3 4 239 240 241 242 243 244 245 246 247
CLK OE1 OE2 STVR O1 O2 O3 O239 O240 O241 STVL (O1) (O2) (O3) (O4) (O5) (O6)
R,/L = L, STVSEL = 1, OE1SEL = 1, OE2SEL = 1
1 2 3 4 239 240 241 242 243 244 245 246 247
CLK OE1 OE2 STVL O240 O239 O238 O2 O1 O241 STVR (O240) (O239) (O238) (O237) (O236) (O235)
Preliminary Product Information S15797EJ1V4PM
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PD161644
12. POWER ON/OFF SEQUENCE
There are three ways to turn on the power of the PD161644: * Simple sequence * Command control sequence * Simple sequence 12.1 Power ON sequence (1) Power supply control via serial interface (simple sequence) Control /GRESET pin and each command of PONM, VD2ON, RGONR, RGON, VS2ON, VS3ON, VD1ON, and DCON using the following sequence, after applying power to VDC, VCC1, and VCC11.
VDC
VCC1
2.5 V 0 ns MIN.
VCC11
1.8 V 0 ns MIN.
/GRESET
Wait 0 ns MIN.
PONM
Wait 0 ns MIN.
Turn on the power Note supply to be used
Wait 0 ns MIN.
DCON
<1> Issue the reset command (R34) <2> Set a value to R25 to R33 (any value)
Power-on operation is complete after the time specified by PUPT0 and PUPT1 has elapsed.
Note Turn on the power supply to be used among VD2ON, RGONR, RGON, VS2ON, VS3ON, and VD1ON.
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Preliminary Product Information S15797EJ1V4PM
PD161644
(2) Power control by serial interface (command control sequence) Control /GRESET pin and each command of PON, DCON, VD2ON, RGONR, RGON, VS2ON, VS3ON, VD1ON, and VS4ON after power on of VDC, VCC1, VCC11 as shown below.
VDC
VCC1
2.5 V
0 ns MIN.
VCC11
1.8 V
0 ns MIN.
/GRESET
Wait 0 ms MIN.
PON
Wait 0 ms MIN.
DCON
Wait 1 ms MIN.
VD2ON
Wait 25 ms MIN.
RGONR
NOTE 1
Wait 0 ms MIN.
RGON
Wait 40 ms MIN.
VS2ON, VS3ON
NOTE 2
Wait 60 ms MIN.
VD1ON
Wait 60 ms MIN.
VS4ON
NOTE 3
Wait 60 ms MIN.
<1> Issue the reset command (R34) <2> Set a value to R25 to R32 (any value)
Power-on operation is complete.
Notes 1. This pin only needs to be controlled when the VR amplifier is used. 2. VS2ON only needs to be controlled when VSS2 is used. 3. This pin only needs to be controlled when VCOM is used.
Preliminary Product Information S15797EJ1V4PM
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PD161644
(3) Power control by pins (simple sequence) Control each pin of /GRESET, RGON, and DCON after power on of VDC, VCC1, VCC11 as shown below.
VDC VCC1
0 ns MIN. 2.5 V 1.8 V 0 ns MIN.
VCC11
/GRESET
wait 10 ms MIN.
RGON
wait 0 ms MIN.
DCON
Power supply startup is complete after the time specified by PUPT0 and PUPT1 has elapsed
Remarks 1. When using RGON, pull it up to the high level by wiring the RGONR pin. 2. When using VSS4, pull it up to the high level by wiring the COMON pin.
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Preliminary Product Information S15797EJ1V4PM
PD161644
12.2 Power OFF sequence When turning the power off, turn off the pins and commands used for control simultaneously, both when performing control via the serial interface and via the pins. (1) Power control by serial interface (Simplified sequence) Control DCON pin as shown below.
VDC 0 ns VCC1 0 ns VCC11 0 ns /GRESET 0 ns DCON
(2) Power control by serial interface (Command control sequence) Control each pin of /GRESET, RGON, and DCON as shown below.
VDC 0 ns VCC1 0 ns VCC11 0 ns /GRESET PON 0 ms VS4ON Note1 0 ms VD1ON VS2ON, VS3ON Note2 RGON 0 ms RGONR Note3 0 ms VD2ON 0 ms DCON 0 ms 0 ms
Notes 1. This pin only needs to be controlled when the VCOM is used. 2. VS2ON only needs to be controlled when VSS2 is used. 3. This pin only needs to be controlled when VR amplifier is used. 41
Preliminary Product Information S15797EJ1V4PM
PD161644
(3) Power control by pins (Simplified sequence) Control each pin of /GRESET, RGON, and DCON as shown below.
VDC VCC1 VCC11 0 ns 0 ns 0 ns /GRESET DCON RGON 0 ns 0 ns
Remarks 1. When using RGON, pull it up to the high level by wiring the RGONR pin. 2. When using VSS4, pull it up to the high level by wiring the COMON pin.
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Preliminary Product Information S15797EJ1V4PM
PD161644
13. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25C, VSS = 0 V)
Parameter Supply Voltage Supply Voltage Supply Voltage Supply Voltage Input Voltage Note 1 Input Current Note 1 Output Current Note 2 Output Current Note 3 Operating Ambient Temperature Storage Temperature Symbol VCC1 VDC VSS3 VDD1-VSS3 VI II IO1 IO2 TA Tstg Rating -0.5 to +4.0 -0.5 to +4.0 VDD1 -42 V to +0.5 -0.5 to +42 -0.5 to VCC1+0.5 1 10 +10 -40 to +85 -55 to +150 Unit V V V V V mA mA mA C C
Notes 1. CLK, STVR, STVL, R,/L, OE1, OE2, GCS, GCL, GDA, DCCLK, VCIN, DCON, RGON, VCD2, /GRESET, IFSEL, EXRV, SCN0, SCN1 2. STVR, STVL, VM, VCOM 3. VS Caution Product quality may suffer if the absolute maximum rating is exceeded even momentarily for any parameter. That is, the absolute maximum ratings are rated values at which the product is on the verge of suffering physical damage, and therefore the product must be used under conditions that ensure that the absolute maximum ratings are not exceeded. Recommended Operating Conditions (TA = -40 to +85C, VSS = 0 V)
Parameter Supply Voltage Supply Voltage Supply Voltage Supply Voltage Supply Voltage Supply Voltage Input Voltage Note Symbol VCC1 VDC VDD1 VSS3 VDD1-VSS3 VGD VI 0 Condition MIN. 2.5 2.5 10 -20 20 TYP. 2.7 2.7 15 -15 30 MAX. 3.3 3.3 20 -10 40 6.0 VCC1 Unit V V V V V V V
Note CLK, STVR, STVL, R,/L, OE1, OE2, GCS, GCL, GDA, DCCLK, VCIN, DCON, RGON, VCD2, /GRESET, IFSEL, EXRV, SCN0, SCN1
Preliminary Product Information S15797EJ1V4PM
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PD161644
Electrical Characteristics (TA = -40 to +85C, VCC1 = 2.5 to 3.3 V, VDC = 2.5 to 3.3 V, VDD1 = 15 V, VSS3 = -15 V, VS = 5 V, VSS1 = 0 V) (1/2)
Parameter High-level input voltage Low-level input voltage High-level output voltage Low-level output voltage VDD1 boost voltage VDD2 boost voltage1 VDD2 boost voltage2 VDD2 boost voltage3 VSS2 boost voltage VSS3 boost voltage VSS4 boost voltage VDD1 output resister VDD2 output resistor1 VDD2 output resistor2 VDD2 output resistor3 VSS2 output resistor VSS3 output resistor VSS4 output resistor VS output voltage VR output voltage VS output resistor VR output resistor COMH output voltage COML output voltage VCOM output high-level voltage VCOM output low-level voltage COM output resistor1 COM output resistor2 VM output low-level voltage VM output resistance Output ON resistance Symbol VIH1 VIL1 VOH VOL VDD1 VDD21 VDD22 VDD23 VSS2 VSS3 VSS4 RVDD1 RVDD21 RVDD22 RVDD23 RVSS2 RVSS3 RVSS4 VS VR RVS RVR VcomH VcomL VVcomH VVcomL RCOM1 RCOM2 VM1L RM1 RON1 STVR, STVL, IOH = - 40 A STVR, STVL, IOH = +40 A IDD1 = 300 A, 3 x boost, Note 2 IDD2 = 1 mA , VCD2 = L, VMS = H (2 x boost, dual), Note 2 IDD2 = 1 mA , VCD2 = L, VMS = L (2 x boost, single), Note 2 IDD2 = 1 mA , VCD2 = H (3 x boost), Note 2 ISS2 = - 300 A, -2 x boost, Note 2 ISS3 = - 300 A, -3 x boost, Note 2 ISS4 = - 300 A, -1 x boost, Note 2 IDD1 = 300 A, 3 x boost, Note 2 IDD2 = 1 mA , VCD2 = L, VMS = H (2x boost, dual), Note 2 IDD2 = 1 mA , VCD2 = L, VMS = L (2x boost, single), Note 2 IDD2 = 1 mA , VCD2 = H (3 x boost), Note 2 ISS2 = - 300 A , -2 x boost, Note 2 ISS2 = - 300 A , -3 x boost, Note 2 ISS2 = - 300 A , -1 x boost, Note 2 No load No load VDD2 = 6 V, IS = 1 mA, VS = 5 V VDD2 = 6 V, IR = 1 mA, VR = 5 V No load, DA (7:0) = CDA (7:0) = A0H No load, DA (7:0) = CDA (7:0) = A0H IVCOM = 1 mA, DA (7:0) = CDA (7:0) = A0H, VCIN = H IVCOM = -1 mA, DA (7:0) = CDA (7:0) = A0H, VCIN = L COM output = High, ICOM = 1 mA COM output = Low, ICOM = -1 mA No load No load When IVM = 100 A, VSS2 is selected. O1 to O241 VCC1 -0.4 0 2.7 VGD 1.9 VDC 1.8 VDC 2.7 VDC -2 VS -3 VS -VDC - - - - - - - 4.5 4.5 - - 4.5 -0.5 4.5 -0.5 - - 0.9 VSS2 0.9 VSS3 - 1 - - - - - - - 3 100 250 450 3 3 300 5 5 15 15 5 0 5 0 100 100 VSS2 VSS3 300 2 Note 1 Condition MIN. 0.8 VCC1 0.2 VCC1 VCC1 0.4 3 VGD 2 VDC 2 VDC 3 VDC -1.8 VS -2.7 VS -0.9 VDC 5 200 400 700 5 5 500 5.5 5.5 30 30 5.5 0.5 5.5 0.5 200 200 1.1 VSS2 1.1 VSS3 400 4 TYP. MAX. Unit V V V V V V V V V V V k k k V V V V V V V V k
VM output high-level voltage VM1H
Notes 1. CLK, STVR, STVL, R,/L, OE1, OE2, GCS, GCL, GDA, VCOM, DCON, RGON, LPM, VCD2, /GRESET, IFSEL, EXRV, SCN0, SCN1, VCIN 2. External capacitor: 1 F, CLS0 = H, CLS1 = L, FS0 = H, FS1 = L, FS2 = H, FS3 = L, FUP = L 3. ACS0 = H, ACS1 = H, VDD2 = VDC x 2, dual mode, VDD1 = VGD x 3, VSS2 = VGD x (-2), VSS3 = VGD x (-3), VSS4 = VDC x (-1), VGD = VS, CLS0 = H, CLS1 = L, FS0 = H, FS1 = L, FS2 = H, FS3 = L, FUP = L
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Preliminary Product Information S15797EJ1V4PM
PD161644
(2/2)
Parameter Input current Input leak current Dynamic current Dynamic current Static current Static current VREF voltage Symbol II1 IIL ICC1 IDC ICC1 IDC VREF Note 1 STVR, STVL VCC1, fCLK = 12.5 kHz, no load, Note 3 VDC, fCLK = 12.5 kHz, no load, Note 3 VCC1, stand-by VDC, stand-by Condition MIN. -1 -1 - - - - 1.08 TYP. 0 0 - - - - 1.20 MAX. 1 1 200 1.8 5 5 1.32 Unit
A A A
mA
A A
V
Notes 1. CLK, STVR, STVL, R,/L, OE1, OE2, GCS, GCL, GDA, VCOM, DCON, RGON, LPM, VCD2, /GRESET, IFSEL, EXRV, SCN0, SCN1, VCIN 2. External capacitor: 1 F, CLS0 = H, CLS1 = L, FS0 = H, FS1 = L, FS2 = H, FS3 = L, FUP = L 3. ACS0 = H, ACS1 = H, VDD2 = VDC x 2, dual mode, VDD1 = VGD x 3, VSS2 = VGD x (-2), VSS3 = VGD x (-3), VSS4 = VDC x (-1), VGD = VS, CLS0 = H, CLS1 = L, FS0 = H, FS1 = L, FS2 = H, FS3 = L, FUP = L
Preliminary Product Information S15797EJ1V4PM
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PD161644
Switching Characteristics (TA = -40 to +85C, VCC1 = 2.5 to 3.3 V, VDC = 2.5 to 3.3 V, VDD1 = 15 V, VSS3 = -15 V, VS = 5 V, VSS1 = 0 V)
Parameter Cascade Output Delay Time Symbol tPHL1 tPLH1 Driver Output Delay Time 1 tPHL2 tPLH2 Driver Output Delay Time2 Driver Output Delay Time 3 Output Rise Time Output Fall Time Input Capacitance DC/DC Oscillation Frequency DCCLK Input Frequency VCIN Input Frequency Clock Input Frequency tPHL3 tPLH3 tPHL4 tPLH4 tTLH tTHL CI fDCDC fDCCLK fVCIN fCLK When connected in cascade TA = 25C CLS1 = L, CLS0 = H, FUP = L 12.5 25 CL = 20 pF CLK STVL (STVR) CL = 50 pF CLK On CL = 50 pF OE1 On CL = 50 pF OE2 On CL = 50 pF Condition MIN. TYP. MAX. 800 800 1 1 1 1 1 1 1 1 15 37.5 50 50 400 Unit ns ns
s s s s s s s s
pF kHz kHz kHz kHz
Timing Requirement (TA = -40 to +85C, VCC1 = 2.5 to 3.3 V, VDC = 2.5 to 3.3 V, VDD1 = 15 V, VSS3 = -15 V, VS = 5 V, VSS1 = 0 V)
Parameter Clock Pulse High Period Clock Pulse Low Period Enable Pulse High Period Data Setup Time Data Hold Time Serial Clock Cycle GCL High-level Pulse Width GCL Low-level Pulse Width GDA Data Setup Time GDA Data Hold Time GCS-GCL Time GCL-GCS Time Symbol PWCLK(H) PWCLK(L) PWOE tSETUP tHOLD tSCYC tSHW tSLW tSDS tSDH tCSS tCSH CLK CLK OE1, OE2 STVR (STVL) CLK CLKSTVR (STVL) GCL GCL GCL GDA GDA GCS GCS Condition MIN. 500 500 1.0 200 200 250 100 100 100 100 150 150 TYP. MAX. Unit ns ns
s
ns ns ns ns ns ns ns ns ns
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Preliminary Product Information S15797EJ1V4PM
PD161644
Switching Characteristics Waveform (R,/L = H, STVSEL = 0, OE1SEL = 0, OE2SEL = 0) (a) Gate interface
1/fCLK PWCLK(H) PWCLK(L) VCC1 CLK 50% 50% 50% 50% VSS1 tSETUP tHOLD VCC1 STVR (STVL) 50% 50% VSS1 tPHL1 tPLH1 VCC1 STVL (STVR) 50% 50% VSS1 tPLH2 tTLH 90% On tPHL2 90% tTHL VDD1
( ): R,/L = L
10%
10% VB
PWOE VCC1 OE1 50% 50% VSS1 tPHL3 90% On 10% VB PWOE VCC1 OE2 50% 50% VSS1 tPLH4 tPHL4 VDD1 90% On 10% VB tPLH3 VDD1
Preliminary Product Information S15797EJ1V4PM
47
PD161644
(b) Serial interface
tCSS tCSH
GCS
tSCYC tSLW
GCL
tf tSDS tr
tSHW
tSDH
GDA
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Preliminary Product Information S15797EJ1V4PM
PD161644
[MEMO]
Preliminary Product Information S15797EJ1V4PM
49
PD161644
[MEMO]
50
Preliminary Product Information S15797EJ1V4PM
PD161644
NOTES FOR CMOS DEVICES
1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation of static electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid using insulators that easily build static electricity. Semiconductor devices must be stored and transported in an anti-static container, static shielding bag or conductive material. All test and measurement tools including work bench and floor should be grounded. The operator should be grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar precautions need to be taken for PW boards with semiconductor devices on it. 2 HANDLING OF UNUSED INPUT PINS FOR CMOS Note: No connection for CMOS device inputs can be cause of malfunction. If no connection is provided to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each unused pin should be connected to VDD or GND with a resistor, if it is considered to have a possibility of being an output pin. All handling related to the unused pins must be judged device by device and related specifications governing the devices. 3 STATUS BEFORE INITIALIZATION OF MOS DEVICES Note: Power-on does not necessarily define initial status of MOS device. Production process of MOS does not define the initial operation status of the device. Immediately after the power source is turned ON, the devices with reset function have not yet been initialized. Hence, power-on does not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until the reset signal is received. Reset operation must be executed immediately after power-on for devices having reset function.
Preliminary Product Information S15797EJ1V4PM
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