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Si9140
Vishay Siliconix
SMP Controller For High Performance Process Power Supplies
FEATURES
* Runs on 3.3- or 5-V Supplies * Adjustable, High Precision Output Voltage * High Frequency Operation (>1 MHz) * High Efficiency Synchronous Switching * Full Set of Protection Circuitry * 2000-V ESD Rating (SI9140CQ/DQ)
DESCRIPTION
Siliconix' Si9140 Buck converter IC is a high-performance, surface-mount switchmode controller made to power the new generation of low-voltage, high-performance microprocessors. The Si9140 has an input voltage range of 3 to 6.5 V to simplify power supply designs in desktop PCs. Its high-frequency switching capability and wide bandwidth feedback loop provide tight, absolute static and transient load regulation. Circuits using the Si9140 can be implemented with low-profile, inexpensive inductors, and will dramatically minimize power supply output and processor decoupling capacitance. The Si9140 is designed to meet the stringent regulation requirements of new and future high-frequency microprocessors, while improving the overall efficiency in new "green" systems. Today's state-of-the-art microprocessors run at frequencies over 100 MHz. Processor clock speeds are going up and so are current requirements, but operating voltages are going down. These simultaneous changes have made dedicated, high-frequency, point-of-use buck converters an essential part of any system design. These point-of-use converters must operate at higher frequencies and provide wider feedback bandwidths than existing converters, which typically operate at less than 250 kHz and have feedback bandwidths of less than 50 kHz. The Si9140's 100-kHz feedback loop bandwidth ensures a minimum improvement of one-half the required output/decoupling capacitance, resulting in a tremendous reduction in board size and cost of implementation. With the microprocessing power of any PC representing an investment of hundreds of dollars, designers need to ensure that the reliable operation of the processor will not be affected by the power supply. The Si9140 provides this assurance. A demo board, the Si9140DB, is available.
APPLICATION CIRCUIT
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Si9140
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to GND. VDD, VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 V PGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.3 V VDD to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 V Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 V to VDD +0.3 V Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-0.3 V to VDD +0.3 V Peak Output Drive Current . . . . . . . . . . . . . . . . . . . . . . . . . . .350 mA Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 to 150C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . 150C Power Dissipation (Package)a 16-Pin SOIC (Y Suffix)b . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 900 mW 16-Pin TSSOP (Q Suffix)c . . . . . . . . . . . . . . . . . . . . . . . . . . . 925 mW
* Exposure to Absolute Maximum rating conditions for extended periods may affect device reliability. Stresses above Absolute Maximum rating may cause permanent damage. Functional operation at conditions other than the operating conditions specified is not implied. Only one Absolute Maximum rating should be applied at any one time.
Thermal Impedance (JA) 16-Pin SOIC (Y Suffix) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 140C/W 16-Pin TSSOP (Q Suffix). . . . . . . . . . . . . . . . . . . . . . . . . . . . 135C/W Operating Temperature C Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 70C D Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40 to 85C Notes a. Device mounted with all leads soldered or welded to PC board. b. Derate 7.2 mW/C above 25C. c. Derate 7.4 mW/C above 25C.
RECOMMENDED OPERATING RANGE
Voltages Referenced to GND. VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 V to 6.5 V VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 V to 6.5 V fOSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 kHz to 2 MHz ROSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 k to 250 k COSC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 pF to 200 pF Linear Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD Digital Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to VDD VREF Load Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . >150 k
SPECIFICATIONS
Limits Test Conditions Unless Otherwise Specifieda Parameter Reference
Output Voltage VREF IREF = -10 A TA = 25C 1.455 1.477 1.50 1.545 1.523 V C Suffix 0 to 70C D Suffix -40 to 85C 3 V VDD 6.5 V, VDD = VS GND = PGND
Symbol
Minb
Typ
Maxb
Unit
Oscillator
Maximum Frequencyc Accuracy ROSC Voltage Voltage Stabilityc Temperature Stabilityc fMAX fOSC VROSC f/f 4 V VDD 6 V, Ref to 5 V, TA = 25C Referenced to 25C -8 5 VDD = 5 V, COSC = 47 pF, ROSC = 5.0 k VDD = 5 V COSC = 100 pF, ROSC = 7.50 k, TA = 25C 2.0 0.85 1.0 1.0 8 1.15 MHz V %
Error Amplifier (COSC = GND, OSC Disabled)
Input Bias Current Open Loop Voltage Gain Offset Voltage Unity Gain Bandwidthc Output Current Power Supply Rejectionc IFB AVOL VOS BW IEA PSRR Source (VFB = 1 V, NI = VREF) Sink (VFB = 2 V, NI = VREF) 3 V < VDD < 6.5 V 0.4 VNI = VREF VNI = VREF , VFB = 1.0 V -1.0 47 -15 55 0 10 -2.0 0.8 60 -1.0 15 1.0 A dB mV MHz mA dB
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Si9140
Vishay Siliconix
SPECIFICATIONS
Limits Test Conditions Unless Otherwise Specifieda Parameter UVLOSET Voltage Monitor
Under Voltage Lockout Hysteresis UVLO Input Current VUVLOHL VUVLOLH VHYS IUVLO(SET) UVLOSET High to Low UVLOSET Low to High VUVLOLH - VUVLOHL VUVLO = 0 to VDD -100 0.85 1.0 1.2 175 100 1.15 V mV nA C Suffix 0 to 70C D Suffix -40 to 85C 3 V VDD 6.5 V, VDD = VS GND = PGND
Symbol
Minb
Typ
Maxb
Unit
Output Drive (DR AND DS)
Output High Voltage Output Low Voltage Peak Output Current Peak Output Current Break-Before-Make VOH VOL ISOURCE ISINK tBBM VS = VDD = 5 V, IOUT = -10 mA VS = VDD = 5 V, IOUT = 10 mA VS = VDD = 5 V, VOUT = 0 V VS = VDD = 5 V, VOUT = 5 V VDD = 6.5 V 200 4.7 4.8 0.2 -380 300 40 0.3 -260 V
mA nS
Logic
ENABLE Turn-On Delay ENABLE Logic Low ENABLE Logic High ENABLE Input Current tdEN VENL VENH IEN ENABLE = 0 to VDD 0.8 VDD -1.0 1.0 ENABLE Delay to Output, ENLH, VDD = 5 V 1.5 0.2 VDD s V A
VGOOD Comparator (Voltage-Good Comparator)
Input Offset Voltage Input Hysteresis Input Bias Current Output Sink I Output Low Voltage VOS VINHYS IBMON ISINK VOL VIN Common Mode Voltage = VREF, VDD = 5 V VIN = VREF, VDD = 5 V VOUT = 5 V, VDD = 5 V IOUT = 2 mA, VDD = 5 V -45 0 10 -1 6 0 9 350 500 1 45 mV A mA mV
Supply
Supply Current-Normal Mode Supply Current-Standby Mode Notes a. 100 pF includes CSTRAY on COSC. b. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. c. Guaranteed by design, not subject to production testing. IDD fOSC = 1 MHz, ROSC = 7.50 k ENABLE < 0.4 V 1.6 250 2.3 330 mA A
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Si9140
Vishay Siliconix
TYPICAL CHARACTERISTICS (25C UNLESS OTHERWISE NOTED)
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Si9140
Vishay Siliconix
TYPICAL CHARACTERISTICS (25C UNLESS OTHERWISE NOTED)
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S-58034--Rev. G, 15-Mar-99 5
Si9140
Vishay Siliconix
TYPICAL CHARACTERISTICS (25C UNLESS OTHERWISE NOTED)
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Si9140
Vishay Siliconix
PIN CONFIGURATIONS
ORDERING INFORMATION
Temperature Range
0 to 70C -40 to 85C
ORDERING INFORMATION
Part Number
Si9140CY Si9140DY
Temperature Range
0 to 70C -40 to 85C
Part Number
SI9140CQ Si9140DQ
PIN DESCRIPTION
Pin 1: VDD The positive power supply for all functional blocks except output driver. A bypass capacitor of 0.1 F (minimum) is recommended. Pin 2: MON Non-inverting input of a comparator. Inverting input is tied internally to reference voltage. This comparator is typically used to monitor the output voltage and to flag the processor when the output voltage falls out of regulation. Pin 3: VGOOD This is an open drain output. It will be held at ground when the voltage at MON (Pin 2) is less than the internal reference. An external pull-up resistor will pull this pin high if the MON pin (Pin 2) is higher than the VREF. (Refer to Pin 2 description.) Pin 4: COMP This pin is the output of the error amplifier. A compensation network is connected from this pin to the FB pin to stabilize the system. This pin drives one input of the internal pulse width modulation comparator. Pin 6: NI The non-inverting input of the error amplifier. In normal operation it is externally connected to VREF or an external reference. Pin 7: VREF This pin supplies a 1.5-V reference. Pin 8: GND (Ground) Pin 9: ENABLE A logic high on this pin allows normal operation. A logic low places the chip in the standby mode. In standby mode normal operation is disabled, supply current is reduced, the oscillator stops and DS goes high while DR goes low. Pin 5: FB The inverting input of the error amplifier. An external resistor divider is connected to this pin to set the regulated output voltage. The compensation network is also connected to this pin.
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Vishay Siliconix
Pin 10: ROSC A resistor connected from this pin to ground sets the oscillator's capacitor COSC, charge and discharge current. See the oscillator section of the description of operation. Pin 11: COSC An external capacitor is connected to this pin to set the oscillator frequency.
0.75 f OSC ----------------------------------R OSC x C OSC (at V DD = 5.0 V)
Pin 13: PGND The negative return for the VS supply. Pin 14: DS This CMOS push-pull output pin drives the external p-channel MOSFET. This pin will be high in the standby mode. A break-before-make function between DS and DR is built-in. Pin 15: DR This CMOS push-pull output pin drives the external n-channel MOSFET. This pin will be low in the standby mode. A break-before-make function between the DS and DR is built-in. Pin 16: VS The positive terminal of the power supply which powers the CMOS output drivers. A bypass capacitor is required.
Pin 12: UVLOSET This pin will place the chip in the standby mode if the UVLOSET voltage drops below 1.2 V. Once the UVLOSET voltage exceeds 1.2 V, the chip operates normally. There is a built-in hysteresis of 165 mV.
FUNCTIONAL BLOCK DIAGRAM
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Si9140
Vishay Siliconix
TIMING WAVEFORMS
DESCRIPTION OF OPERATION
Schematics of the Si9140 dc-to-dc conversion solutions for high-performance PC microprocessors are shown in Figure 1 and 2 respectively. These solutions are geared to meet the extremely demanding transient regulation and power requirements of these new microprocessors at minimal cost and with a minimal parts count. The two solutions are nearly identical, except for slight variations in output voltage, load transient amplitude, and specified power. Figure 3 is a schematic diagram for a 3.3-V logic converter.
FIGURE 1. 2.9 V @ 10 A
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FIGURE 2. 2.5 V @ 8.5 A
FIGURE 3. 3.3 V @ 5 A
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Si9140
Vishay Siliconix
FIGURE 4. 1.5-V Converter for GTL+ Bus @ 5 A Figure 4 is a schematic diagram of a converter which produces 1.5 V for a GTL bus. Each of these dc-to-dc converters has four major sections: * PWM Controller-regulates the output voltage * Switch and Synchronous Rectification MOSFETs-delivers the power to the load * Inductor-filters and stores the energy * Input/Output Capacitor-filters the ripple The functions of each circuit are explained in detail below. Design equations are provided to optimize each application circuit. (first-order RC system). Current mode has the advantage of providing an inherently good line regulation. But the situations where line voltage is fixed, as in the point-of-use conversion for microprocessors, this feature is wasted. Current mode control also provides automatic pulse-to-pulse current limiting. This feature requires a current sense resistor as stated above. These characteristics make voltage mode control ideal for high-end microprocessor power supplies.
PWM CONTROLLER
There are generally two types of controllers, voltage mode or current mode. In voltage mode control, an error voltage is generated by comparing the output voltage to the reference voltage. The error voltage is then compared to an artificial ramp, and the result is the duty cycle necessary to regulate the output voltage. In current mode, an actual inductor current is used, in place of the artificial ramp, to sense the voltage across the current sense resistor. The logic and timing sequence for voltage mode control is shown in Figure 5. The Si9140 offers voltage mode control, which is better suited for applications requiring both fast transient response and high output current. Current mode control requires a current sense resistor to monitor the inductor current. A 10-m sense resistor in a 10-A design will dissipate 1 W, decreasing efficiency by 3.5%. Such a design would require a 2-W resistor to satisfy derating criteria, besides requiring additional board space. Voltage mode control is a second-order LC system and has a faster natural transient response compared to current mode control FIGURE 5. Voltage Mode Logic and Timing Diagram The error amplifier of the PWM controller plays a major role in determining the output voltage, stability, and the transient response of the power supply. In the Si9140, the non-inverting input of the error amplifier is available for use with an external precision reference for tighter tolerance regulation. With a two-pair lead-lag compensation network, it is easy to create a stable 100-kHz closed loop converter with the Si9140 error amplifier.
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Si9140
Vishay Siliconix
The Si9140 achieves the 5-S transient response by generating a 100-kHz closed-loop bandwidth. This is possible only by switching above 400 kHz and utilizing an error amplifier with at least a 10-MHz bandwidth. The Si9140 controller has a 25-MHz unity gain bandwidth error amplifier. The switching frequency must be at least four times greater than the desired closed-loop bandwidth to prevent oscillation. To respond to the stimuli, the error amplifier bandwidth needs to be at least 10 times larger than the desired bandwidth. Figure 7 is the measured transient response (time domain) for the 10-A step response. The measured transient response shows the processor voltage regulating to 70 mV, well within the 0.145-V regulation. The Si9140's switching frequency is determined by the external ROSC and COSC values, allowing designers to set the switching frequency of their choice. For applications where space is the main constraint, the switching frequency can be set as high as 2 MHz to minimize inductor and output capacitor size. In applications where efficiency is the main concern, the switching frequency can be set low to maximize battery life. The switching frequency for high-performance processors applications circuits are set for 400 kHz. The equation for switching frequency is:
0.75 f OSC ----------------------------------R OSC x C OSC (at V DD = 5.0 V)
The precision reference is set at 1.5 V 1.5%. The reference is capable of sourcing up to 1 mA. The combination of 1.5% reference and 3.5% transient load regulation safely complies with the 5% regulation requirement. If additional margin is desired, an external precision reference can be used in place of the internal 1.5-V reference. FIGURE 6. 100-kHz BW Synchronous Buck Converter The Si9140 solution requires only three 330-F OS-CON capacitors on the output of power supply to meet the 10-A transient requirement. Other converter solutions on the market with 20- to 50-kHz closed loop bandwidths typically require two to five times the output capacitance specified above to match the Si9140's performance. The theoretical issues and analytical steps involved in compensating a feedback network are beyond the scope of this application note. However, to ease the converter design for today's high-performance microprocessors, typical component values for the feedback network are provided in Table 1 for various combinations of output capacitance. Figure 6 shows the Bode plot (frequency domain) of the 2.9-V converter shown schematically in Figure 1. TABLE 1. Feedback Network Component Values Total Output and Decoupling Capacitance
3 x 330 6 x 100 25 x 1 F Fa Fb b. . . . . . . . . . . .Os-con . . . . . . . . . . .Tantalum . . . . . . . . . . .Ceramic
SWITCHING AND SYNCHRONOUS RECTIFICATION MOSFETS
The synchronous gate drive outputs of Si9140 PWM controller drive the high-side p-channel switch MOSFET and the low-side n-channel synchronous rectifier MOSFET. The physical difference between the non-synchronous to synchronous rectification requires an additional MOSFET across the free-wheeling diode (D1). The inductor current will reach 0 A if the peak-to-peak inductor current equals twice the output current. In synchronous rectification mode, current is allowed to flow backwards from the inductor (L1) through the synchronous MOSFET (Q3) and to the output capacitors (C2) once the current reaches 0 A. Refer to schematic on Figure 1. In non-synchronous rectification, the diode (D1) prevents the current from flowing in the reverse direction. This minor difference has a drastic affect on the performance of a power supply. By allowing the current to flow in the reverse direction, it preserves the continuous inductor current mode, maintaining the wide converter bandwidth and improving efficiency. Also, maintaining the continuous current mode during light load to full load guarantees consistent transient response throughout a wide range of load conditions.
C4
5.6 pF
C5
180 pF
R5
240 k
2 x 330 Fa . . . . . . . . . . .Os-con 4 x 100 Fb . . . . . . . . . . .Tantalum 25 x 1 Fb . . . . . . . . . . . .Ceramic 3 x 330 Fa . . . . . . . . . . .Tantalum 4 x 100 Fb . . . . . . . . . . .Tantalum 25 x 1 Fb . . . . . . . . . . . .Ceramic
10 pF
220 pF
200 k
10 pF
100 pF
100 k
Notes: a. Power supply output capacitance. b. processor decoupling capacitance. S-58034--Rev. G, 15-Mar-99 12 FaxBack 408-970-5600, request 70026 www.siliconix.com
Si9140
Vishay Siliconix
The transition from stop clock and auto halt to active mode is a perfect example. The microprocessor current can vary from 0.5 A to 10 A or greater during these transitions. If the converter were to operate in discontinuous current mode during the stop clock and auto halt modes, the transfer function of the converter would be different compared to operation in the active mode. In discontinuous current mode, the converter bandwidth can be 10 to 15 times lower than the continuous current mode (Figure 8). Therefore, the response time will also be 10 to 15 times slower, violating the microprocessor's regulator requirements. This could result in unreliable operation of the microprocessor.
FIGURE 7.
For these reasons, synchronous rectification is a must in today's microprocessors power supply design. Pulseskipping modes are undesirable in high-performance microprocessor power supplies, especially when the minimum load current is as high as 500 mA. This pulse-skipping mode disables the synchronous rectification during light load and generates a random noise spectrum which may produce EMI problems. Siliconix' TrenchFETTM technology has resulted in 20-m n-channel (Si4410DY) and 35-m p-channel (Si4435DY) MOSFETs in the SO-8 surface-mount package. These LITTLE FOOT(R) products totally eliminate the need for an external heatsink.
FIGURE 8. Non-Synchronous Converter BW
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Si9140
Vishay Siliconix
Worst case current of 10 A can be handled with two paralleled Si4435DY and two paralleled Si4410DY MOSFETs, which results in the efficiency levels shown in Figure 9. Good electrical designs must provide an adequate margin for the specification, but they should not be grossly overdesigned to lower costs. LITTLE FOOT power MOSFETs allow designers to balance cost and performance considerations without sacrificing either. If the design requires only an 8.5-A continuous current, for example, one Si4410DY can be eliminated. Table 2 shows the number of MOSFETs required to handle the various output current levels of today's highperformance microprocessors. For other output power levels, the equations below should be used to calculate the power handling capability of the MOSFET.
FIGURE 9. Efficiency
TABLE 2. Converter Requirements Figure 1, 2, and 3) IO (A) Maximum
5A 8.5 A 10 A 14.5 A
Quantity High-side P-Channel SI4435DY
1 2 2 3
Quantity Low-side N-Channel SI4410DY
1 1 2 2
Quantity Input (C1-C3) Capacitor OS-CON 220 F
1 2 2 3
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Vishay Siliconix
Q SW x V IN x f OSC I PP x V O x C x f OSC 2 P Dissipation in switch = I RMS SW x R SW + --------------------------------------------- + ---------------------------------------------------2 2 VO 2 2 ( I PEAK + I PP + I PEAK x I PP ) x ----------------3 x V IN Q RECT x V IN x f OSC x R RECT + --------------------------------------------------2
I RMS
SW
=
P Dissipation in synchronous rectification = I RMS
2 RECT
I RMS
RECT
=
V IN - V O 2 2 ( I PEAK + I PP + I PEAK x I PP ) x ---------------------3 x V IN
I PP = I PEAK + I
2
VO I = -----------------------------------L x f OSC x V IN P IN - ( 0.5 x V O x I ) I PEAK = ----------------------------------------------------VO VO x IO P IN = -----------------
IRMSSW RSW IRMSRECT RRECT QSW QRECT VIN VO IO fOSC C
= = = = = = = = = = = =
Switch rms current Switch on resistance Synchronous rectifier rms current Synchronous rectifier on resistance Total gate charge of switch Total gate charge of synchronous rectifier Input voltage Output voltage Output current Switching frequency efficiency Crossover time
Current IO
IPEAK 0A
IPP
time
INDUCTOR
The size and value of the inductor are critical in meeting overall circuit dimensional requirements and in assuring proper transient voltage regulation. The size of the core is determined by the output power, the material of the core, and the operating frequency. To handle higher output power, the core must be larger. Luckily, a higher switching frequency will lower the inductance value, decreasing the core size. However, a higher switching frequency can also mean greater core loss. In applications where the dc flux density is high and the ac flux density swing is only 100 to 200 gauss, the core loss will be negligible compared to the wire loss. Kool Mu is the best material to use at 500 kHz to deliver 30 W in the minimum volume. Ferrite has a lower core cost and loss at this
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frequency, but the core size is fairly large. If the power supply is designed on the motherboard and space is not a critical issue, ferrite is a better choice. The higher switching frequency reduces the core size by decreasing the amount of energy that must be stored between switching periods. It also accelerates the transient response to the load by decreasing the inductance value. The inductance is calculated with following equation:
VO L = -------------------------------------V IN x I x f OSC
2
I = desired output current ripple. maximum output current.
Typically I = 25% of
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