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DA1016B.001 27 January, 2004 MAS1016B AM Receiver IC * High Sensitivity * Very Low Power Consumption * Wide Supply Voltage Range * Power Down Control * Control for AGC On * High Selectivity by Crystal Filter DESCRIPTION The MAS1016B AM Receiver chip is a highly sensitive, simple to use AM receiver specially intended to receive time signals in the frequency range from 40 kHz to 100 kHz. Only a few external components are required for time signal receiver. The circuit has preamplifier, wide range automatic gain control, demodulator and output comparator built in. The output signal can be processed directly by an additional digital circuitry to extract the data from the received signal. The control for AGC (automatic gain control) can be used to switch AGC on or off if necessary. WWVB in USA and JJY in Japan require use of AGC control procedure, which is simplified in MAS1016B. FEATURES * * * * * * * * * Highly Sensitive AM Receiver, 0.5 VRMS typ. Wide Supply Voltage Range from 1.1 V to 3.6 V Very Low Power Consumption 50 A typ. Power Down Control Only a Few External Components Necessary Control for AGC On Wide Frequency Range from 40 kHz to 100 kHz High Selectivity by Quartz Crystal Filter Die and TSSOP-16 Package APPLICATIONS * * Time Signal Receiver Designed for MSF (UK), WWVB (USA), JJY (Japan) and DCF77 (Germany) Receiver for ASK Modulated Data Signals BLOCK DIAGRAM QO QI AON (=AGC on) RFI AGC Amplifier Demodulator & Comparator OUT Power Supply/Biasing 1 (10) VDD VSS PDN AGC DEC DA1016B.001 27 January, 2004 PAD LAYOUT 1788 m VSS RFI PDN AON DEC MAS1016B 1786 m VDD QO QI AGC OUT DIE size = 1.79 x 1.79 mm; PAD size = 100 x 100 m Note: Because the substrate of the die is internally connected to VDD, the die has to be connected to VDD or left floating. Please make sure that VDD is the first pad to be bonded. Pick-and-place and all component assembly are recommended to be performed in ESD protected area. Note: Coordinates are pad center points where origin has been located in the center of VDD pad Pad Identification Power Supply Voltage Quarz Filter Output Quarz Filter Input AGC Capacitor Receiver Output Demodulator Capacitor AGC On Control Power Down Input Receiver Input Power Supply Ground Name VDD QO QI AGC OUT DEC AON PDN RFI VSS X-coordinate 0 m 306 m 587 m 866 m 1143 m 1111 m 868 m 551 m 309 m 16 m Y-coordinate 0 m 19 m 19 m 19 m 19 m 1436 m 1436 m 1436 m 1436 m 1415 m Note 1 2 3 Notes: 1) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |IOUT| > 5 A - at power down the output is high impedance 2) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up with current < 1 A which is switched off at power down 3) PDN = VSS means receiver on; PDN = VDD means receiver off 2 (10) DA1016B.001 27 January, 2004 ABSOLUTE MAXIMUM RATINGS Parameter Supply Voltage Input Voltage Power Dissipation Operating Temperature Storage Temperature Symbol VDD-VSS VIN PMAX TOP TST Conditions Min -0.3 VSS-0.3 -20 -40 Max 5.0 VDD+0.3 100 70 120 Unit V V mW o C o C ELECTRICAL CHARACTERISTICS Operating Conditions: VDD = 1.4V, Temperature = 25C Parameter Operating Voltage Current Consumption Stand-By Current Input Frequency Range Minimum Input Voltage Maximum Input Voltage Input Levels |lIN|<0.5 A Output Current VOL<0.2 VDD;VOH >0.8 VDD Output Pulse Symbol VDD IDD IDDoff fIN VIN min VIN max VIL VIH |IOUT| T0 T1 Conditions Min 1.10 Typ 50 Max 3.60 100 0.1 100 1 0.2 VDD Unit V A A kHz Vrms mVrms V A 40 0.5 20 0.8 VDD 5 1 Vrms VIN 20 mVrms 1 Vrms VIN 20 mVrms 50 150 8 50 140 230 ms ms s ms Startup Time Output Delay Time TStart TDelay 100 3 (10) DA1016B.001 27 January, 2004 TYPICAL APPLICATION Note 1 X1 QO FerriteAntenna RFI AGC Amplifier QI AON (=AGC on) Demodulator & Comparator OUT Receiver output VDD 1.4 V Power Supply/Biasing VSS PDN Note 2 CAGC 0.47...1 uF CDEM 47 nF AGC DEC Note 1: Crystal The crystal as well as ferrite antenna frequencies are chosen according to the time signal system. Ferrite antenna frequencies and recommended crystal frequencies are presented in table 1. For more details about crystal selection see DAEV1016B. Table 1 Time-Signal System Frequencies Time-Signal System Location Frequency DCF77 MSF WWVB JJY Germany United Kingdom USA Japan 77.5 60 60 40 and 60 Recommended Crystal Frequency 77.503 60.003 60.003 40.003 and 60.003 Unit kHz kHz kHz kHz Note 2: AGC Capacitor The AGC capacitor value is also chosen according to time-signal system. Recommended capacitor values are presented in table 2. WWVB and JJY systems require external control of AON (=AGC on) pin to receive pulses correctly. For more details about required control of AON in WWVB and JJY systems see DAEV1016B. The AGC and DEC capacitors should have low leakage currents due to very small 40 nA signal currents through the capacitors. The insulation resistance of these capacitors should be higher than 70 M. Also probes with at least 100 M impedance should be used for voltage probing of AGC and DEC pins. Table 2 Recommended AGC Capacitor Value Time-Signal System Recommended AGC Capacitor Value DCF77 MSF WWVB JJY 470nF 1uF 220nF + Special AGC Control 220nF + Special AGC Control 4 (10) DA1016B.001 27 January, 2004 SAMPLES IN SBDIL 20 PACKAGE NC 1 20 VSS 19 NC 18 RFI 17 PDN 16 AON 15 DEC 14 NC 13 NC 12 NC 11 NC Top Marking Definitions: YYWW = Year Week XXXXX.X = Lot Number MAS1016B YYWW XXXXX.X VDD 2 NC 3 QO 4 NC 5 QI 6 AGC 7 OUT 8 NC 9 NC 10 PIN DESCRIPTION Pin Name NC VDD NC QO NC QI AGC OUT NC NC NC NC NC NC DEC AON PDN RFI NC VSS Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 Type P AO AI AO DO Function Positive Power Supply Quartz Filter Output 1 Quartz Filter Input AGC Capacitor Receiver Output Note 2 AO DI AI AI G Demodulator Capacitor AGC On Control Power Down Input Receiver Input Power Supply Ground 3 4 Notes: 1) Pin 5 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also recommended to be connected to VSS to minimize noise coupling. 2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |IOUT| > 5 A - at power down the output is high impedance 3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up (to AGC on) with current < 1 A which is switched off at power down 4) PDN = VSS means receiver on; PDN = VDD means receiver off 5 (10) DA1016B.001 27 January, 2004 PIN CONFIGURATION & TOP MARKING FOR PLASTIC TSSOP-16 PACKAGE VDD NC QO NC QI AGC NC OUT VSS NC RFI NC PDN AON NC DEC YYWW 1016B Top Marking Definitions: YYWW = Year Week PIN DESCRIPTION Pin Name Pin Type Function Note VDD NC QO NC QI AGC NC OUT DEC NC AON PDN NC RFI NC VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 P AO AI AO DO AO DI AI AI G Positive Power Supply Quartz Filter Output 1 Quartz Filter Input AGC Capacitor Receiver Output Demodulator Capacitor AGC On Control Power Down Input Receiver Input Power Supply Ground 2 3 4 Notes: 1) Pin 4 between quartz crystal filter pins must be connected to VSS to eliminate package leadframe parasitic capacitances disturbing the crystal filter performance. All other NC (Not Connected) pins are also recommended to be connected to VSS to minimize noise coupling. 2) OUT = VSS when carrier amplitude at maximum; OUT = VDD when carrier amplitude is reduced (modulated) - the output is a current source/sink with |IOUT| > 5 A - at power down the output is high impedance 3) AON = VSS means AGC off (hold current gain level); AON = VDD means AGC on (working) - Internal pull-up (to AGC on) with current < 1 A which is switched off at power down 4) PDN = VSS means receiver on; PDN = VDD means receiver off 6 (10) DA1016B.001 27 January, 2004 PACKAGE (TSSOP16) OUTLINES C D Seating Plane B A F G H E O Pin 1 Detail A B B L I I1 K P Section B-B J1 J M N Detail A Dimension Min Max Unit A 6.40 BSC B 4.30 4.50 C 5.00 BSC D 0.05 0.15 E 1.10 F 0.19 0.30 G 0.65 BSC H 0.18 0.28 I 0.09 0.20 I1 0.09 0.16 J 0.19 0.30 J1 0.19 0.25 K 8 0 L 0.24 0.26 M 0.50 0.75 (The length of a terminal for soldering to a substrate) N 1.00 REF O 12 P 12 Dimensions do not include mold flash, protrusions, or gate burrs. All dimensions are in accordance with JEDEC standard MO-153. mm mm mm mm mm mm mm mm mm mm mm mm mm mm mm 7 (10) DA1016B.001 27 January, 2004 SOLDERING INFORMATION Resistance to Soldering Heat Maximum Temperature Maximum Number of Reflow Cycles Reflow profile Seating Plane Co-planarity Lead Finish According to RSH test IEC 68-2-58/20 2*220C 240C 2 Thermal profile parameters stated in JESD22-A113 should not be exceeded. http://www.jedec.org max 0.08 mm Solder plate 7.62 - 25.4 m, material Sn 85% Pb 15% EMBOSSED TAPE SPECIFICATIONS Tape Feed Direction P0 D0 P2 A E1 F1 W D1 A P A0 Tape Feed Direction T Section A - A B0 S1 K0 Dimension Min Pin 1 Designator Max Unit A0 B0 D0 D1 E1 F1 K0 P P0 P2 S1 T W 6.50 5.20 1.50 +0.10 / -0.00 1.50 1.65 7.20 1.20 11.90 4.0 1.95 0.6 0.25 11.70 6.70 5.40 1.85 7.30 1.40 12.10 2.05 0.35 12.30 mm mm mm mm mm mm mm mm mm mm mm mm mm 8 (10) DA1016B.001 27 January, 2004 REEL SPECIFICATIONS W2 A D B Tape Slot for Tape Start C N W1 2000 Components on Each Reel Reel Material: Conductive, Plastic Antistatic or Static Dissipative Carrier Tape Material: Conductive Cover Tape Material: Static Dissipative Carrier Tape Cover Tape End Start Trailer Dimension Min Components Max Leader Unit A B C D N W1 (measured at hub) W2 (measured at hub) Trailer Leader 330 1.5 12.80 20.2 50 12.4 13.50 14.4 18.4 160 390, of which minimum 160mm of empty carrier tape sealed with cover tape 1500 mm mm mm mm mm mm mm mm mm Weight g 9 (10) DA1016B.001 27 January, 2004 ORDERING INFORMATION Product Code Product Package Comments MAS1016BTB1 MAS1016B AM Receiver IC Wafer, EWS tested MAS1016BTC1 MAS1016B AM Receiver IC Wafer, EWS tested MAS1016BUA1-T MAS1016B AM Receiver IC TSSOP-16 Please contact Micro Analog Systems Oy for other wafer thickness options. Thickness 480 m Thickness 400 m Tape & Reel LOCAL DISTRIBUTOR MICRO ANALOG SYSTEMS OY CONTACTS Micro Analog Systems Oy Kamreerintie 2, P.O.Box 51 FIN-02771 Espoo, FINLAND Tel. +358 9 80 521 Fax +358 9 805 3213 http://www.mas-oy.com NOTICE Micro Analog Systems Oy reserves the right to make changes to the products contained in this data sheet in order to improve the design or performance and to supply the best possible products. Micro Analog Systems Oy assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights unless otherwise specified in this data sheet, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Micro Analog Systems Oy makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. 10 (10) |
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